lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7
   8 # Status tracking
   9
  10 move things along from one stage to the next
  11
  12 ## Currently working on
  13
  14  - Project Management
  15  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  16  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  17  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder with [[mnolan]]
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
  19     - functions needed for simulator
  20     - Shared 10% with [[mnolan]]
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> test core to regfiles
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  25    - shared with cole
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
  41    - EUR 400 shared 25% [[mnolan]] EUR 100
  42
  43 ## Completed but not yet submitted:
  44
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
  46    - EUR 200 50% shared, cole, EUR 100
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
  48    - EUR 200
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
  50    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
  52    - EUR 500 shared 20% samuel, EUR 100
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
  55    - EUR 400 shared 50% [[mnolan]] EUR 200
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
  57    - EUR 500 shared [[mnolan]] samuel, TBD split
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  59    - EUR 250 shared 40% [[mnolan]] EUR 100
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  61    - EUR 300 shared 1/3 [[mnolan]] EUR 100
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
  63    - EUR 300 shared 1/6 [[mnolan]] EUR 50
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  65    - EUR 300 shared 50% [[mnolan]] EUR 150
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
  67    - EUR 400 shared 25% [[mnolan]] EUR 100
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
  69    - EUR 150
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
  71    - EUR 750
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
  73   - EUR 100
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
  75   - EUR 100
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
  77    - EUR 100
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
  79    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
  81    - EUR 500
  82
  83 ## Submitted for NLNet RFP
  84
  85 submitted but not confirmed paid:
  86
  87 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
  88
  89 ## Paid
  90
  91 donation from NLNet confirmed received:
  92
  93 ### Project 2019-02-012 28-apr-2020
  94
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
  96    - 6600 scoreboard multi-read/write
  97    - EUR 600
  98  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
  99    - Partitioned equals and greater than comparison
 100    - Shared 50% with [[mnolan]]
 101    - EUR 200 (each)
 102  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 103    - partitioned scalar/vector shift
 104    - Shared 50% with [[lkcl]]
 105    - EUR 350 (each)
 106
 107 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 108
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 110     - auto-parser of POWER9
 111     - Shared 50% with [[mnolan]]
 112     - EUR 500 (each)
 113
 114 ### Project 2019-10-029 Date 14mar2020
 115
 116 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
 117
 118 ### Project 2019-02-012 Date 12mar2020
 119
 120 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 121 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 122 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 123 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 124
 125 ### Project 2019-02-012 Date 28jan2020
 126
 127 * admin tasks
 128 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 129