lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7
   8 # Status tracking
   9
  10 move things along from one stage to the next
  11
  12 ## Currently working on
  13
  14  - Project Management
  15  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  16  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documrntation
  19    - EUR
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  21    - EUR
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  31  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  32  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  35    - shared with cole
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  37    - EUR 50, shared with samuel 10%
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  42    - EUR 50, shared with samuel (EUR 350)
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  49    - EUR 200
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  56    - donated
  57    - parent #198
  58    - EUR 200
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  60   - MultiCompUnit (and Function Units) proof
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  62   - donated
  63   - parent #195
  64
  65 ## Completed but not yet submitted:
  66
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
  68   - Project 2019-10-043 06dec2020 wishbone
  69   - EUR 0 (TBD)
  70
  71 ### Project 2019-10-029 14mar2020 coriolis2
  72
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
  74    - (total EUR 100 shared 50% with staf)
  75    - EUR 50 lkcl
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
  77    - (total EUR 1500 shared 50% with LIP6)
  78    - EUR 750 lkcl
  79  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
  80    - (total EUR 400 shared 75% with LIP6)
  81    - EUR 300 lkcl
  82
  83 ### Project 2019-02-012 06dec2020 Core
  84
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
  86    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
  87  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
  88    - EUR 750 donated
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
  90    - EUR 1500
  91
  92 ### Project 2019-10-043 06dec2020 wishbone
  93
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
  95    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
  97    - EUR 200
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
  99    - EUR 100
 100  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 101    - EUR 200
 102  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 103    - EUR 100
 104  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 105    - EUR 200
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 107    - EUR 450
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 109    - EUR 100
 110  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 111    - EUR 200 donated
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 113    - EUR 250 (share with cole)
 114
 115 ### Project 2019-10-032 06dec2020 proofs
 116
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 118    - parent #195
 119    - EUR 400 donated
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 121    - parent #195
 122    - EUR 300 donated
 123  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 124    - EUR 400 donated
 125    - parent #195
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 127    - EUR 400 donated
 128    - parent #195
 129
 130 ## Submitted for NLNet RFP
 131
 132 submitted but not confirmed paid:
 133
 134 ### Project 2019-02-012 04sep2020 Core
 135
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 137    - EUR 2000 total, shared with florent.  EUR 1200
 138
 139 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 140
 141 ## Paid
 142
 143 donation from NLNet confirmed received:
 144
 145 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 146
 147  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 148     - EUR 2000, python POWER9 simulator
 149     - Shared 50% with [[mnolan]], EUR 1000
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 151     - EUR 250, functions needed for simulator
 152     - Shared 20% with [[mnolan]], EUR 50
 153
 154 ### proofs 2019-10-032
 155
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 157    - EUR 500 shared 20% samuel, EUR 100
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 159    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 161    - EUR 400 shared 25% [[mnolan]] EUR 100
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 163    - EUR 150
 164
 165 ### wishbone 2019-10-043
 166
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 168    - EUR 500
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 170     - EUR 300
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 172     - EUR 250
 173  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 174    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 176    - EUR 300
 177  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 178    - EUR 400, 50% shared [[programmerjake]] EUR 200
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 180    - EUR 750, 33% shared [[programmerjake]] EUR 250
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 182    - EUR 200 50% shared, cole, EUR 100
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 184    - EUR 200
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 186    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 188    - EUR 150
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 190    - EUR 400 shared 50% [[mnolan]] EUR 200
 191  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 192    - EUR 250 shared 40% [[mnolan]] EUR 100
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 194    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 196    - EUR 300 shared 50% [[mnolan]] EUR 150
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 198    - EUR 750
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 200   - EUR 100
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 202   - EUR 100
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 204    - EUR 100
 205  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 206    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 207
 208 ### Project 2019-02-012 28-apr-2020
 209
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 211    - 6600 scoreboard multi-read/write
 212    - EUR 600
 213  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 214    - Partitioned equals and greater than comparison
 215    - Shared 50% with [[mnolan]]
 216    - EUR 200 (each)
 217  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 218    - partitioned scalar/vector shift
 219    - Shared 50% with [[lkcl]]
 220    - EUR 350 (each)
 221
 222 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 223
 224  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 225     - auto-parser of POWER9
 226     - Shared 50% with [[mnolan]]
 227     - EUR 500 (each)
 228
 229 ### Project 2019-10-029 Date 14mar2020
 230
 231 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 232   - EUR 1200
 233
 234 ### Project 2019-02-012 Date 12mar2020
 235
 236 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 237 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 238 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 239 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 240
 241 ### Project 2019-02-012 Date 28jan2020
 242
 243 * admin tasks
 244 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 245