lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  19    - EUR 250
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  21    - EUR 1250
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  32  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  36    - EUR
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  41  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  42  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  45    - shared with cole
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  47    - EUR 50, shared with samuel 10%
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  52    - EUR 50, shared with samuel (EUR 350)
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  58    - EUR 200
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  61    - donated
  62    - parent #198
  63    - EUR 200
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  65   - MultiCompUnit (and Function Units) proof
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  67   - donated
  68   - parent #195
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  70
  71 ## Completed but not yet submitted:
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
  73    - EUR 1600
  74    - EUR 800 shared with [[klehman]]
  75    - EUR 800 shared with [[lkcl]]
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
  77    - EUR 500 shared between:
  78    - EUR 100 [[lkcl]]
  79    - EUR 325 dmitry
  80    - EUR 75 maciej
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  82    - EUR 800
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  87    - EUR 800 shared between:
  88    - EUR 500 [[lkcl]]
  89    - EUR 300 [[tplaten]]
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  91    - EUR 5500 shared between:
  92    - EUR 3850 lkcl
  93    - EUR 1650 Others
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  95    - EUR 1600
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
  97    - EUR 600
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  99    - EUR 500
 100  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 102  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 104  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 105
 106
 107  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 108    - EUR 150
 109    - donated
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 111    - EUR 200
 112    - donated
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 114    - EUR 150
 115    - donated
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 117    - EUR 200
 118    - donated
 119  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 120    - EUR 700
 121    - (lip6.fr donated)
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 123    - (total EUR 400 25% donated by LIP6)
 124    - EUR 100 lkcl
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 126    - EUR 900
 127    - shared with [[lxo]]
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 129    - EUR 1100
 130    - shared with lauri, jacob
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 132    - EUR 1250
 133    - Shared 50% with Staf
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 135    - EUR 300
 136    - Shared with Staf, cole
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 138    - EUR 450
 139    - Shared with Staf
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 141  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 142    - EUR 3000
 143    - shared with Staf 50%
 144  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 145    - Project 2019-10-043 06dec2020 wishbone
 146    - EUR (TBD)
 147
 148 ### Project 2019-10-029 14mar2020 coriolis2
 149
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 151    - (total EUR 100 shared 50% with staf)
 152    - EUR 50 lkcl
 153  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 154    - (total EUR 1500 shared 50% with LIP6)
 155    - EUR 750 lkcl
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 157    - (total EUR 400 shared 75% with LIP6)
 158    - EUR 300 lkcl
 159
 160 ### Project 2019-02-012 06dec2020 Core
 161
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 163    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 164  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 165    - EUR 750 donated
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 167    - EUR 1500
 168
 169 ### Project 2019-10-043 06dec2020 wishbone
 170
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 172    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 173  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 174    - EUR 200
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 176    - EUR 100
 177  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 178    - EUR 200
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 180    - EUR 100
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 182    - EUR 200
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 184    - EUR 450
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 186    - EUR 100
 187  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 188    - EUR 200 donated
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 190    - EUR 250 (share with cole)
 191
 192 ### Project 2019-10-032 06dec2020 proofs
 193
 194  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 195    - parent #195
 196    - EUR 400 donated
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 198    - parent #195
 199    - EUR 300 donated
 200  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 201    - EUR 400 donated
 202    - parent #195
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 204    - EUR 400 donated
 205    - parent #195
 206
 207 ## Submitted for NLNet RFP
 208
 209 submitted but not confirmed paid:
 210
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 212
 213 ### Project 2019-02-012 04sep2020 Core
 214
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 216    - EUR 2000 total, shared with florent.  EUR 1200
 217
 218 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 219
 220 ## Paid
 221
 222 donation from NLNet confirmed received:
 223
 224 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 225
 226  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 227     - EUR 2000, python POWER9 simulator
 228     - Shared 50% with [[mnolan]], EUR 1000
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 230     - EUR 250, functions needed for simulator
 231     - Shared 20% with [[mnolan]], EUR 50
 232
 233 ### proofs 2019-10-032
 234
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 236    - EUR 500 shared 20% samuel, EUR 100
 237  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 238    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 239  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 240    - EUR 400 shared 25% [[mnolan]] EUR 100
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 242    - EUR 150
 243
 244 ### wishbone 2019-10-043
 245
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 247    - EUR 500
 248  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 249     - EUR 300
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 251     - EUR 250
 252  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 253    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 255    - EUR 300
 256  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 257    - EUR 400, 50% shared [[programmerjake]] EUR 200
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 259    - EUR 750, 33% shared [[programmerjake]] EUR 250
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 261    - EUR 200 50% shared, cole, EUR 100
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 263    - EUR 200
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 265    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 267    - EUR 150
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 269    - EUR 400 shared 50% [[mnolan]] EUR 200
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 271    - EUR 250 shared 40% [[mnolan]] EUR 100
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 273    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 275    - EUR 300 shared 50% [[mnolan]] EUR 150
 276  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 277    - EUR 750
 278  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 279   - EUR 100
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 281   - EUR 100
 282  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 283    - EUR 100
 284  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 285    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 286
 287 ### Project 2019-02-012 28-apr-2020
 288
 289  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 290    - 6600 scoreboard multi-read/write
 291    - EUR 600
 292  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 293    - Partitioned equals and greater than comparison
 294    - Shared 50% with [[mnolan]]
 295    - EUR 200 (each)
 296  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 297    - partitioned scalar/vector shift
 298    - Shared 50% with [[lkcl]]
 299    - EUR 350 (each)
 300
 301 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 302
 303  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 304     - auto-parser of POWER9
 305     - Shared 50% with [[mnolan]]
 306     - EUR 500 (each)
 307
 308 ### Project 2019-10-029 Date 14mar2020
 309
 310 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 311   - EUR 1200
 312
 313 ### Project 2019-02-012 Date 12mar2020
 314
 315 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 316 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 317 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 318 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 319
 320 ### Project 2019-02-012 Date 28jan2020
 321
 322 * admin tasks
 323 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 324