lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7
   8 # Status tracking
   9
  10 move things along from one stage to the next
  11
  12 ## Currently working on
  13
  14  - Project Management
  15  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  16  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  17  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documrntation
  21    - EUR
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  23    - EUR
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  33  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  34  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  37    - shared with cole
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  39    - EUR 50, shared with samuel 10%
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  44    - EUR 50, shared with samuel (EUR 350)
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  51    - EUR 200
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  58    - donated
  59    - parent #198
  60    - EUR 200
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  62   - MultiCompUnit (and Function Units) proof
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  64   - donated
  65   - parent #195
  66
  67 ## Completed but not yet submitted:
  68
  69 - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
  70    - EUR 1250
  71    - Shared 50% with Staf
  72 - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
  73    - EUR TBD
  74    - Shared with Staf
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
  77    - EUR 3000
  78    - shared with Staf 50%
  79  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
  80    - Project 2019-10-043 06dec2020 wishbone
  81    - EUR (TBD)
  82
  83 ### Project 2019-10-029 14mar2020 coriolis2
  84
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
  86    - (total EUR 100 shared 50% with staf)
  87    - EUR 50 lkcl
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
  89    - (total EUR 1500 shared 50% with LIP6)
  90    - EUR 750 lkcl
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
  92    - (total EUR 400 shared 75% with LIP6)
  93    - EUR 300 lkcl
  94
  95 ### Project 2019-02-012 06dec2020 Core
  96
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
  98    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
  99  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 100    - EUR 750 donated
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 102    - EUR 1500
 103
 104 ### Project 2019-10-043 06dec2020 wishbone
 105
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 107    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 109    - EUR 200
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 111    - EUR 100
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 113    - EUR 200
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 115    - EUR 100
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 117    - EUR 200
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 119    - EUR 450
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 121    - EUR 100
 122  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 123    - EUR 200 donated
 124  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 125    - EUR 250 (share with cole)
 126
 127 ### Project 2019-10-032 06dec2020 proofs
 128
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 130    - parent #195
 131    - EUR 400 donated
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 133    - parent #195
 134    - EUR 300 donated
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 136    - EUR 400 donated
 137    - parent #195
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 139    - EUR 400 donated
 140    - parent #195
 141
 142 ## Submitted for NLNet RFP
 143
 144 submitted but not confirmed paid:
 145
 146 ### Project 2019-02-012 04sep2020 Core
 147
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 149    - EUR 2000 total, shared with florent.  EUR 1200
 150
 151 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 152
 153 ## Paid
 154
 155 donation from NLNet confirmed received:
 156
 157 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 158
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 160     - EUR 2000, python POWER9 simulator
 161     - Shared 50% with [[mnolan]], EUR 1000
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 163     - EUR 250, functions needed for simulator
 164     - Shared 20% with [[mnolan]], EUR 50
 165
 166 ### proofs 2019-10-032
 167
 168  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 169    - EUR 500 shared 20% samuel, EUR 100
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 171    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 172  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 173    - EUR 400 shared 25% [[mnolan]] EUR 100
 174  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 175    - EUR 150
 176
 177 ### wishbone 2019-10-043
 178
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 180    - EUR 500
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 182     - EUR 300
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 184     - EUR 250
 185  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 186    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 188    - EUR 300
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 190    - EUR 400, 50% shared [[programmerjake]] EUR 200
 191  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 192    - EUR 750, 33% shared [[programmerjake]] EUR 250
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 194    - EUR 200 50% shared, cole, EUR 100
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 196    - EUR 200
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 198    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 200    - EUR 150
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 202    - EUR 400 shared 50% [[mnolan]] EUR 200
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 204    - EUR 250 shared 40% [[mnolan]] EUR 100
 205  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 206    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 208    - EUR 300 shared 50% [[mnolan]] EUR 150
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 210    - EUR 750
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 212   - EUR 100
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 214   - EUR 100
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 216    - EUR 100
 217  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 218    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 219
 220 ### Project 2019-02-012 28-apr-2020
 221
 222  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 223    - 6600 scoreboard multi-read/write
 224    - EUR 600
 225  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 226    - Partitioned equals and greater than comparison
 227    - Shared 50% with [[mnolan]]
 228    - EUR 200 (each)
 229  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 230    - partitioned scalar/vector shift
 231    - Shared 50% with [[lkcl]]
 232    - EUR 350 (each)
 233
 234 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 235
 236  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 237     - auto-parser of POWER9
 238     - Shared 50% with [[mnolan]]
 239     - EUR 500 (each)
 240
 241 ### Project 2019-10-029 Date 14mar2020
 242
 243 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 244   - EUR 1200
 245
 246 ### Project 2019-02-012 Date 12mar2020
 247
 248 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 249 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 250 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 251 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 252
 253 ### Project 2019-02-012 Date 28jan2020
 254
 255 * admin tasks
 256 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 257