1 # Luke Kenneth Casson Leighton
3 Lead dev and Project Coordinator for Libre-SOC.
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
9 move things along from one stage to the next
11 ## Currently working on
14 * <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
15 * <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
16 * <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder with [[mnolan]]
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
19 - functions needed for simulator
20 - Shared 10% with [[mnolan]]
22 ## Completed but not yet submitted:
25 ## Submitted for NLNet RFP
27 submitted but not confirmed paid:
29 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
33 donation from NLNet confirmed received:
35 ### Project 2019-02-012 28-apr-2020
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
38 - 6600 scoreboard multi-read/write
40 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
41 - Partitioned equals and greater than comparison
42 - Shared 50% with [[mnolan]]
44 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
45 - partitioned scalar/vector shift
46 - Shared 50% with [[lkcl]]
49 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
52 - auto-parser of POWER9
53 - Shared 50% with [[mnolan]]
56 ### Project 2019-10-029 Date 14mar2020
58 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
60 ### Project 2019-02-012 Date 12mar2020
62 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
63 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
64 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
65 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
67 ### Project 2019-02-012 Date 28jan2020
70 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>