lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  19    - EUR 250
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
  21    - EUR 300
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
  23    - EUR 250
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  25    - EUR 1250
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  36  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  40    - EUR
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  45  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  46  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  49    - shared with cole
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  51    - EUR 50, shared with samuel 10%
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  56    - EUR 50, shared with samuel (EUR 350)
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  62    - EUR 200
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  65    - donated
  66    - parent #198
  67    - EUR 200
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  69   - MultiCompUnit (and Function Units) proof
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  71   - donated
  72   - parent #195
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  74
  75 ## Completed but not yet submitted:
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
  77    - EUR 1600
  78    - EUR 800 shared with [[klehman]]
  79    - EUR 800 shared with [[lkcl]]
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
  81    - EUR 500 shared between:
  82    - EUR 100 [[lkcl]]
  83    - EUR 325 dmitry
  84    - EUR 75 maciej
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  86    - EUR 800
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  91    - EUR 800 shared between:
  92    - EUR 500 [[lkcl]]
  93    - EUR 300 [[tplaten]]
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  95    - EUR 5500 shared between:
  96    - EUR 3850 lkcl
  97    - EUR 1650 Others
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  99    - EUR 1600
 100  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 101    - EUR 600
 102  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 103    - EUR 500
 104  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 105  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 107  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 109
 110
 111  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 112    - EUR 150
 113    - donated
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 115    - EUR 200
 116    - donated
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 118    - EUR 150
 119    - donated
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 121    - EUR 200
 122    - donated
 123  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 124    - EUR 700
 125    - (lip6.fr donated)
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 127    - (total EUR 400 25% donated by LIP6)
 128    - EUR 100 lkcl
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 130    - EUR 900
 131    - shared with [[lxo]]
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 133    - EUR 1100
 134    - shared with lauri, jacob
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 136    - EUR 1250
 137    - Shared 50% with Staf
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 139    - EUR 300
 140    - Shared with Staf, cole
 141  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 142    - EUR 450
 143    - Shared with Staf
 144  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 145  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 146    - EUR 3000
 147    - shared with Staf 50%
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 149    - Project 2019-10-043 06dec2020 wishbone
 150    - EUR (TBD)
 151
 152 ### Project 2019-10-029 14mar2020 coriolis2
 153
 154  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 155    - (total EUR 100 shared 50% with staf)
 156    - EUR 50 lkcl
 157  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 158    - (total EUR 1500 shared 50% with LIP6)
 159    - EUR 750 lkcl
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 161    - (total EUR 400 shared 75% with LIP6)
 162    - EUR 300 lkcl
 163
 164 ### Project 2019-02-012 06dec2020 Core
 165
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 167    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 168  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 169    - EUR 750 donated
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 171    - EUR 1500
 172
 173 ### Project 2019-10-043 06dec2020 wishbone
 174
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 176    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 177  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 178    - EUR 200
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 180    - EUR 100
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 182    - EUR 200
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 184    - EUR 100
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 186    - EUR 200
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 188    - EUR 450
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 190    - EUR 100
 191  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 192    - EUR 200 donated
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 194    - EUR 250 (share with cole)
 195
 196 ### Project 2019-10-032 06dec2020 proofs
 197
 198  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 199    - parent #195
 200    - EUR 400 donated
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 202    - parent #195
 203    - EUR 300 donated
 204  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 205    - EUR 400 donated
 206    - parent #195
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 208    - EUR 400 donated
 209    - parent #195
 210
 211 ## Submitted for NLNet RFP
 212
 213 submitted but not confirmed paid:
 214
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 216
 217 ### Project 2019-02-012 04sep2020 Core
 218
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 220    - EUR 2000 total, shared with florent.  EUR 1200
 221
 222 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 223
 224 ## Paid
 225
 226 donation from NLNet confirmed received:
 227
 228 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 229
 230  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 231     - EUR 2000, python POWER9 simulator
 232     - Shared 50% with [[mnolan]], EUR 1000
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 234     - EUR 250, functions needed for simulator
 235     - Shared 20% with [[mnolan]], EUR 50
 236
 237 ### proofs 2019-10-032
 238
 239  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 240    - EUR 500 shared 20% samuel, EUR 100
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 242    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 244    - EUR 400 shared 25% [[mnolan]] EUR 100
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 246    - EUR 150
 247
 248 ### wishbone 2019-10-043
 249
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 251    - EUR 500
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 253     - EUR 300
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 255     - EUR 250
 256  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 257    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 259    - EUR 300
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 261    - EUR 400, 50% shared [[programmerjake]] EUR 200
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 263    - EUR 750, 33% shared [[programmerjake]] EUR 250
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 265    - EUR 200 50% shared, cole, EUR 100
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 267    - EUR 200
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 269    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 271    - EUR 150
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 273    - EUR 400 shared 50% [[mnolan]] EUR 200
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 275    - EUR 250 shared 40% [[mnolan]] EUR 100
 276  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 277    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 278  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 279    - EUR 300 shared 50% [[mnolan]] EUR 150
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 281    - EUR 750
 282  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 283   - EUR 100
 284  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 285   - EUR 100
 286  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 287    - EUR 100
 288  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 289    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 290
 291 ### Project 2019-02-012 28-apr-2020
 292
 293  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 294    - 6600 scoreboard multi-read/write
 295    - EUR 600
 296  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 297    - Partitioned equals and greater than comparison
 298    - Shared 50% with [[mnolan]]
 299    - EUR 200 (each)
 300  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 301    - partitioned scalar/vector shift
 302    - Shared 50% with [[lkcl]]
 303    - EUR 350 (each)
 304
 305 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 306
 307  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 308     - auto-parser of POWER9
 309     - Shared 50% with [[mnolan]]
 310     - EUR 500 (each)
 311
 312 ### Project 2019-10-029 Date 14mar2020
 313
 314 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 315   - EUR 1200
 316
 317 ### Project 2019-02-012 Date 12mar2020
 318
 319 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 320 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 321 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 322 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 323
 324 ### Project 2019-02-012 Date 28jan2020
 325
 326 * admin tasks
 327 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 328