lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9 * <https://libre-soc.org/task_db/>
  10
  11 # Priority tasks to keep an eye on
  12
  13 * <https://bugs.libre-soc.org/show_bug.cgi?id=864> parallel prefix EUR 3000
  14 * <https://bugs.libre-soc.org/show_bug.cgi?id=899> transcendentals sim EUR 4000
  15 * <https://bugs.libre-soc.org/show_bug.cgi?id=898> binutils objdump EUR 2500
  16 * <https://bugs.libre-soc.org/show_bug.cgi?id=728> ISACaller, Dmitry
  17   EUR 1000
  18 * <https://bugs.libre-soc.org/show_bug.cgi?id=871> Pack/Unpack
  19   EUR 700
  20 * <https://bugs.libre-soc.org/show_bug.cgi?id=197> 6600 proof
  21   EUR 5000
  22 * <https://bugs.libre-soc.org/show_bug.cgi?id=906> de-data-classify
  23
  24 # Status tracking
  25
  26 move things along from one stage to the next
  27
  28 ## Currently working on
  29
  30  - Project Management
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=594> PartitionedSignal RFC
  32    - EUR 1500
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=665> nmigen c compiler
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISANS letter
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=240> ISA switch
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=238> Compressed writeup
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=858> SVP64 Primer
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=867> svindex
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> binutils draft instructions
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=533> cr int draft instructions
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=251> 3D MESA
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
  49    - EUR 150
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
  51    - EUR 150
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
  53    - EUR 1000
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  56    - EUR 250
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  58    - EUR 1000 of 1250 shared
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  68  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  72    - EUR
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  76  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  77  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  79  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  80    - shared with cole
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  82    - EUR 50, shared with samuel 10%
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  84
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  87    - EUR 50, shared with samuel (EUR 350)
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  93    - EUR 200
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  96    - donated
  97    - parent #198
  98    - EUR 200
  99  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
 100   - MultiCompUnit (and Function Units) proof
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
 102   - donated
 103   - parent #195
 104  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
 105
 106 ## Completed but not yet submitted:
 107
 108 TO SORT
 109
 110 28feb2022
 111
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
 113    * EUR 1500 (shared with [[tplaten]])
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
 115    * EUR 1500 (shared with [[tplaten]])
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
 117    * EUR 1000 (shared with [[tplaten]])
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
 119    * EUR 500 (shared with [[programmerjake]])
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
 121    * EUR 400 (shared with [[programmerjake]])
 122
 123 before that
 124
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
 126    - EUR 1600
 127    - EUR 800 shared with [[klehman]]
 128    - EUR 800 shared with [[lkcl]]
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
 130    - EUR 800
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
 133  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 135    - EUR 500
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 139  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 141
 142
 143  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 144    - EUR 150
 145    - donated
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 147    - EUR 200
 148    - donated
 149  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 150    - EUR 150
 151    - donated
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 153    - EUR 200
 154    - donated
 155  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 156    - EUR 700
 157    - (lip6.fr donated)
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 159    - (total EUR 400 25% donated by LIP6)
 160    - EUR 100 lkcl
 161  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 162    - EUR 900
 163    - shared with [[lxo]]
 164  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 165    - EUR 1100
 166    - shared with lauri, jacob
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 168    - EUR 1250
 169    - Shared 50% with Staf
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 171    - EUR 300
 172    - Shared with Staf, cole
 173  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 174    - EUR 450
 175    - Shared with Staf
 176  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 177  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 178    - Project 2019-10-043 06dec2020 wishbone
 179    - EUR (TBD)
 180
 181 ### Project 2019-10-029 14mar2020 coriolis2
 182
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 184    - (total EUR 100 shared 50% with staf)
 185    - EUR 50 lkcl
 186  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 187    - (total EUR 1500 shared 50% with LIP6)
 188    - EUR 750 lkcl
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 190    - (total EUR 400 shared 75% with LIP6)
 191    - EUR 300 lkcl
 192
 193 ### Project 2019-02-012 06dec2020 Core
 194
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 196    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 197  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 198    - EUR 750 donated
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 200    - EUR 1500
 201
 202 ### Project 2019-10-043 06dec2020 wishbone
 203
 204  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 205    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 206  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 207    - EUR 200
 208  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 209    - EUR 100
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 211    - EUR 200
 212  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 213    - EUR 100
 214  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 215    - EUR 200
 216  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 217    - EUR 450
 218  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 219    - EUR 100
 220  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 221    - EUR 200 donated
 222  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 223    - EUR 250 (share with cole)
 224
 225 ### Project 2019-10-032 06dec2020 proofs
 226
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 228    - parent #195
 229    - EUR 400 donated
 230  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 231    - parent #195
 232    - EUR 300 donated
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 234    - EUR 400 donated
 235    - parent #195
 236  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 237    - EUR 400 donated
 238    - parent #195
 239
 240 ## Submitted for NLNet RFP
 241
 242 submitted 2021-dec-09 but not confirmed paid
 243
 244  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 245    - EUR 300
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 247    - EUR 250
 248  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 249  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 251    - EUR 800 shared between:
 252    - EUR 500 [[lkcl]]
 253    - EUR 300 [[tplaten]]
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 255    - EUR 5500 shared between:
 256    - EUR 3850 lkcl
 257    - EUR 1650 Others
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 259    - EUR 1600
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 261    - EUR 600
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 263    - EUR 500 shared between:
 264    - EUR 100 [[lkcl]]
 265    - EUR 325 dmitry
 266    - EUR 75 maciej
 267  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 268
 269
 270 ### Project 2019-02-012 04sep2020 Core
 271
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 273    - EUR 2000 total, shared with florent.  EUR 1200
 274
 275 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 276
 277 ## Paid
 278
 279 donation from NLNet confirmed received:
 280
 281 ### coriolis2 2021-apr-04
 282
 283  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 284    - EUR 3000
 285    - shared with Staf 50%
 286
 287 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 288
 289  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 290     - EUR 2000, python POWER9 simulator
 291     - Shared 50% with [[mnolan]], EUR 1000
 292  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 293     - EUR 250, functions needed for simulator
 294     - Shared 20% with [[mnolan]], EUR 50
 295
 296 ### proofs 2019-10-032
 297
 298  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 299    - EUR 500 shared 20% samuel, EUR 100
 300  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 301    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 302  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 303    - EUR 400 shared 25% [[mnolan]] EUR 100
 304  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 305    - EUR 150
 306
 307 ### wishbone 2019-10-043
 308
 309  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 310    - EUR 500
 311  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 312     - EUR 300
 313  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 314     - EUR 250
 315  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 316    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 317  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 318    - EUR 300
 319  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 320    - EUR 400, 50% shared [[programmerjake]] EUR 200
 321  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 322    - EUR 750, 33% shared [[programmerjake]] EUR 250
 323  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 324    - EUR 200 50% shared, cole, EUR 100
 325  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 326    - EUR 200
 327  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 328    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 329  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 330    - EUR 150
 331  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 332    - EUR 400 shared 50% [[mnolan]] EUR 200
 333  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 334    - EUR 250 shared 40% [[mnolan]] EUR 100
 335  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 336    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 337  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 338    - EUR 300 shared 50% [[mnolan]] EUR 150
 339  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 340    - EUR 750
 341  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 342   - EUR 100
 343  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 344   - EUR 100
 345  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 346    - EUR 100
 347  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 348    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 349
 350 ### Project 2019-02-012 28-apr-2020
 351
 352  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 353    - 6600 scoreboard multi-read/write
 354    - EUR 600
 355  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 356    - Partitioned equals and greater than comparison
 357    - Shared 50% with [[mnolan]]
 358    - EUR 200 (each)
 359  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 360    - partitioned scalar/vector shift
 361    - Shared 50% with [[lkcl]]
 362    - EUR 350 (each)
 363
 364 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 365
 366  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 367     - auto-parser of POWER9
 368     - Shared 50% with [[mnolan]]
 369     - EUR 500 (each)
 370
 371 ### Project 2019-10-029 Date 14mar2020
 372
 373 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 374   - EUR 1200
 375
 376 ### Project 2019-02-012 Date 12mar2020
 377
 378 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 379 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 380 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 381 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 382
 383 ### Project 2019-02-012 Date 28jan2020
 384
 385 * admin tasks
 386 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 387