1 # Luke Kenneth Casson Leighton
3 Lead dev and Project Coordinator for Libre-SOC.
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
10 move things along from one stage to the next
12 ## Currently working on
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
16 - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
17 - https://bugs.libre-soc.org/show_bug.cgi?id=575
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
19 - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
22 - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
23 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
25 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
30 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
31 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
36 - EUR 50, shared with samuel 10%
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
40 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
41 - EUR 50, shared with samuel (EUR 350)
42 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
44 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
45 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
46 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
52 - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
53 - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
54 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
58 - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
59 - MultiCompUnit (and Function Units) proof
60 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
64 ## Completed but not yet submitted:
66 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
69 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
72 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
75 - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
78 - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
79 - (total EUR 400 25% donated by LIP6)
81 - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
84 - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
86 - shared with lauri, jacob
87 - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
89 - Shared 50% with Staf
90 - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
92 - Shared with Staf, cole
93 - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
96 - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
97 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
99 - shared with Staf 50%
100 - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
101 - Project 2019-10-043 06dec2020 wishbone
104 ### Project 2019-10-029 14mar2020 coriolis2
106 - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
107 - (total EUR 100 shared 50% with staf)
109 - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
110 - (total EUR 1500 shared 50% with LIP6)
112 - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
113 - (total EUR 400 shared 75% with LIP6)
116 ### Project 2019-02-012 06dec2020 Core
118 - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
119 - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
120 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
122 - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
125 ### Project 2019-10-043 06dec2020 wishbone
127 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
128 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
129 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
131 - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
133 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
135 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
137 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
139 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
141 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
143 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
145 - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
146 - EUR 250 (share with cole)
148 ### Project 2019-10-032 06dec2020 proofs
150 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
153 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
156 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
159 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
163 ## Submitted for NLNet RFP
165 submitted but not confirmed paid:
167 ### Project 2019-02-012 04sep2020 Core
169 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
170 - EUR 2000 total, shared with florent. EUR 1200
172 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
176 donation from NLNet confirmed received:
178 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
180 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
181 - EUR 2000, python POWER9 simulator
182 - Shared 50% with [[mnolan]], EUR 1000
183 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
184 - EUR 250, functions needed for simulator
185 - Shared 20% with [[mnolan]], EUR 50
187 ### proofs 2019-10-032
189 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
190 - EUR 500 shared 20% samuel, EUR 100
191 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
192 - EUR 300 shared 1/6 [[mnolan]] EUR 50
193 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
194 - EUR 400 shared 25% [[mnolan]] EUR 100
195 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
198 ### wishbone 2019-10-043
200 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
202 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
204 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
206 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
207 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
208 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
210 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
211 - EUR 400, 50% shared [[programmerjake]] EUR 200
212 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
213 - EUR 750, 33% shared [[programmerjake]] EUR 250
214 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
215 - EUR 200 50% shared, cole, EUR 100
216 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
218 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
219 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
220 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
222 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
223 - EUR 400 shared 50% [[mnolan]] EUR 200
224 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
225 - EUR 250 shared 40% [[mnolan]] EUR 100
226 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
227 - EUR 300 shared 1/3 [[mnolan]] EUR 100
228 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
229 - EUR 300 shared 50% [[mnolan]] EUR 150
230 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
232 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
234 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
236 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
238 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
239 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
241 ### Project 2019-02-012 28-apr-2020
243 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
244 - 6600 scoreboard multi-read/write
246 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
247 - Partitioned equals and greater than comparison
248 - Shared 50% with [[mnolan]]
250 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
251 - partitioned scalar/vector shift
252 - Shared 50% with [[lkcl]]
255 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
257 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
258 - auto-parser of POWER9
259 - Shared 50% with [[mnolan]]
262 ### Project 2019-10-029 Date 14mar2020
264 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
267 ### Project 2019-02-012 Date 12mar2020
269 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
270 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
271 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
272 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
274 ### Project 2019-02-012 Date 28jan2020
277 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>