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[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7
8 # Status tracking
9
10 move things along from one stage to the next
11
12 ## Currently working on
13
14 - Project Management
15 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
16 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
17 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder with [[mnolan]]
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
19 - functions needed for simulator
20 - Shared 10% with [[mnolan]]
21 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
22 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> test core to regfiles
23 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
25 - shared with cole
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
34 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
40 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
41 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
42 - EUR 400 shared 25% [[mnolan]] EUR 100
43
44 ## Completed but not yet submitted:
45
46 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
48 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
50 - EUR 400 shared 50% [[mnolan]] EUR 200
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
52 - EUR 500 shared [[mnolan]] samuel, TBD split
53 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
54 - EUR 250 shared 40% [[mnolan]] EUR 100
55 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
56 - EUR 300 shared 1/3 [[mnolan]] EUR 100
57 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
58 - EUR 300 shared 1/6 [[mnolan]] EUR 50
59 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
60 - EUR 300 shared 50% [[mnolan]] EUR 150
61 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
62 - EUR 400 shared 25% [[mnolan]] EUR 100
63 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
64 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
65 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
66 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
67 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
68 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
69 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
70 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
71
72 ## Submitted for NLNet RFP
73
74 submitted but not confirmed paid:
75
76 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
77
78 ## Paid
79
80 donation from NLNet confirmed received:
81
82 ### Project 2019-02-012 28-apr-2020
83
84 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
85 - 6600 scoreboard multi-read/write
86 - EUR 600
87 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
88 - Partitioned equals and greater than comparison
89 - Shared 50% with [[mnolan]]
90 - EUR 200 (each)
91 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
92 - partitioned scalar/vector shift
93 - Shared 50% with [[lkcl]]
94 - EUR 350 (each)
95
96 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
97
98 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
99 - auto-parser of POWER9
100 - Shared 50% with [[mnolan]]
101 - EUR 500 (each)
102
103 ### Project 2019-10-029 Date 14mar2020
104
105 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
106
107 ### Project 2019-02-012 Date 12mar2020
108
109 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
110 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
111 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
112 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
113
114 ### Project 2019-02-012 Date 28jan2020
115
116 * admin tasks
117 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
118