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[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7
8 # Status tracking
9
10 move things along from one stage to the next
11
12 ## Currently working on
13
14 - Project Management
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
16 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
17 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
18 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
19 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
21 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
22 - shared with cole
23 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
24 - EUR 50, shared with samuel 10%
25 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
34 - EUR 400 shared 25% [[mnolan]] EUR 100
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
36 - EUR 500 shared [[mnolan]] samuel, TBD split
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> LD/ST cache-inhibit
39 - EUR 200
40
41 ## Completed but not yet submitted:
42
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
44 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
45 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
46 - EUR 200
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> LD/ST sign-extend
48 - EUR 100
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
50 - EUR 200
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
52 - EUR 100
53 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
54 - EUR 200
55 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
56 - EUR 450
57 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
58 - EUR 100
59
60 ## Submitted for NLNet RFP
61
62 submitted but not confirmed paid:
63
64 ### Project 2019-02-012 04sep2020 Core
65
66 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
67 - EUR 2000 total, shared with florent. EUR 1200
68
69 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
70
71 ## Paid
72
73 donation from NLNet confirmed received:
74
75 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
76
77 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
78 - EUR 2000, python POWER9 simulator
79 - Shared 50% with [[mnolan]], EUR 1000
80 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
81 - EUR 250, functions needed for simulator
82 - Shared 20% with [[mnolan]], EUR 50
83
84 #### proofs 2019-10-032
85
86 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
87 - EUR 500 shared 20% samuel, EUR 100
88 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
89 - EUR 300 shared 1/6 [[mnolan]] EUR 50
90 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
91 - EUR 400 shared 25% [[mnolan]] EUR 100
92 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
93 - EUR 150
94
95 ### wishbone 2019-10-043
96
97 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
98 - EUR 500
99 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
100 - EUR 300
101 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
102 - EUR 250
103 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
104 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
105 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
106 - EUR 300
107 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
108 - EUR 400, 50% shared [[programmerjake]] EUR 200
109 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
110 - EUR 750, 33% shared [[programmerjake]] EUR 250
111 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
112 - EUR 200 50% shared, cole, EUR 100
113 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
114 - EUR 200
115 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
116 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
117 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
118 - EUR 150
119 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
120 - EUR 400 shared 50% [[mnolan]] EUR 200
121 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
122 - EUR 250 shared 40% [[mnolan]] EUR 100
123 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
124 - EUR 300 shared 1/3 [[mnolan]] EUR 100
125 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
126 - EUR 300 shared 50% [[mnolan]] EUR 150
127 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
128 - EUR 750
129 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
130 - EUR 100
131 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
132 - EUR 100
133 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
134 - EUR 100
135 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
136 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
137
138 ### Project 2019-02-012 28-apr-2020
139
140 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
141 - 6600 scoreboard multi-read/write
142 - EUR 600
143 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
144 - Partitioned equals and greater than comparison
145 - Shared 50% with [[mnolan]]
146 - EUR 200 (each)
147 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
148 - partitioned scalar/vector shift
149 - Shared 50% with [[lkcl]]
150 - EUR 350 (each)
151
152 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
153
154 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
155 - auto-parser of POWER9
156 - Shared 50% with [[mnolan]]
157 - EUR 500 (each)
158
159 ### Project 2019-10-029 Date 14mar2020
160
161 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
162
163 ### Project 2019-02-012 Date 12mar2020
164
165 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
166 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
167 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
168 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
169
170 ### Project 2019-02-012 Date 28jan2020
171
172 * admin tasks
173 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
174