2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
6 use work.decode_types.all;
10 rs : in std_ulogic_vector(63 downto 0);
11 rb : in std_ulogic_vector(63 downto 0);
13 invert_in : in std_ulogic;
14 invert_out : in std_ulogic;
15 result : out std_ulogic_vector(63 downto 0)
19 architecture behaviour of logical is
21 logical_0: process(all)
22 variable rb_adj, tmp : std_ulogic_vector(63 downto 0);
25 if invert_in = '1' then
39 if invert_out = '1' then