manual/PRESENTATION_ExSyn/techmap_01_map.v

   1 module \$add (A, B, Y);
   2
   3 parameter A_SIGNED = 0;
   4 parameter B_SIGNED = 0;
   5 parameter A_WIDTH = 1;
   6 parameter B_WIDTH = 1;
   7 parameter Y_WIDTH = 1;
   8
   9 input [A_WIDTH-1:0] A;
  10 input [B_WIDTH-1:0] B;
  11 output [Y_WIDTH-1:0] Y;
  12
  13 generate
  14   if ((A_WIDTH == 32) && (B_WIDTH == 32))
  15     begin
  16       wire [16:0] S1 = A[15:0] + B[15:0];
  17       wire [15:0] S2 = A[31:16] + B[31:16] + S1[16];
  18       assign Y = {S2[15:0], S1[15:0]};
  19     end
  20   else
  21     wire _TECHMAP_FAIL_ = 1;
  22 endgenerate
  23
  24 endmodule