microwatt.core

   1 CAPI=2:
   2
   3 name : ::microwatt:0
   4
   5 filesets:
   6   core:
   7     files:
   8       - decode_types.vhdl
   9       - wishbone_types.vhdl
  10       - common.vhdl
  11       - fetch1.vhdl
  12       - decode1.vhdl
  13       - helpers.vhdl
  14       - decode2.vhdl
  15       - register_file.vhdl
  16       - cr_file.vhdl
  17       - crhelpers.vhdl
  18       - ppc_fx_insns.vhdl
  19       - sim_console.vhdl
  20       - logical.vhdl
  21       - countzero.vhdl
  22       - gpr_hazard.vhdl
  23       - cr_hazard.vhdl
  24       - control.vhdl
  25       - execute1.vhdl
  26       - loadstore1.vhdl
  27       - mmu.vhdl
  28       - dcache.vhdl
  29       - divider.vhdl
  30       - rotator.vhdl
  31       - writeback.vhdl
  32       - insn_helpers.vhdl
  33       - core.vhdl
  34       - icache.vhdl
  35       - plru.vhdl
  36       - cache_ram.vhdl
  37       - core_debug.vhdl
  38       - utils.vhdl
  39     file_type : vhdlSource-2008
  40
  41   soc:
  42     files:
  43       - wishbone_arbiter.vhdl
  44       - wishbone_debug_master.vhdl
  45       - wishbone_bram_wrapper.vhdl
  46       - soc.vhdl
  47       - xics.vhdl
  48       - syscon.vhdl
  49       - sync_fifo.vhdl
  50       - spi_rxtx.vhdl
  51       - spi_flash_ctrl.vhdl
  52     file_type : vhdlSource-2008
  53
  54   fpga:
  55     files:
  56       - fpga/main_bram.vhdl
  57       - fpga/soc_reset.vhdl
  58       - fpga/pp_fifo.vhd
  59       - fpga/pp_soc_uart.vhd
  60       - fpga/pp_utilities.vhd
  61       - fpga/firmware.hex : {copyto : firmware.hex, file_type : user}
  62     file_type : vhdlSource-2008
  63
  64   debug_xilinx:
  65     files:
  66       - dmi_dtm_xilinx.vhdl : {file_type : vhdlSource-2008}
  67
  68   debug_dummy:
  69     files:
  70       - dmi_dtm_dummy.vhdl : {file_type : vhdlSource-2008}
  71
  72   nexys_a7:
  73     files:
  74       - fpga/nexys_a7.xdc : {file_type : xdc}
  75       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  76       - fpga/top-generic.vhdl : {file_type : vhdlSource-2008}
  77       - xilinx-mult.vhdl : {file_type : vhdlSource-2008}
  78
  79   nexys_video:
  80     files:
  81       - fpga/nexys-video.xdc : {file_type : xdc}
  82       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  83       - fpga/top-nexys-video.vhdl : {file_type : vhdlSource-2008}
  84       - xilinx-mult.vhdl : {file_type : vhdlSource-2008}
  85
  86   arty_a7:
  87     files:
  88       - fpga/arty_a7.xdc : {file_type : xdc}
  89       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  90       - fpga/top-arty.vhdl : {file_type : vhdlSource-2008}
  91       - xilinx-mult.vhdl : {file_type : vhdlSource-2008}
  92
  93   cmod_a7-35:
  94     files:
  95       - fpga/cmod_a7-35.xdc : {file_type : xdc}
  96       - fpga/clk_gen_mcmm.vhd : {file_type : vhdlSource-2008}
  97       - fpga/top-generic.vhdl : {file_type : vhdlSource-2008}
  98       - xilinx-mult.vhdl : {file_type : vhdlSource-2008}
  99
 100   litedram:
 101       depend : [":microwatt:litedram"]
 102
 103 targets:
 104   nexys_a7:
 105     default_tool: vivado
 106     filesets: [core, nexys_a7, soc, fpga, debug_xilinx]
 107     parameters :
 108       - memory_size
 109       - ram_init_file
 110       - clk_input
 111       - clk_frequency
 112       - disable_flatten_core
 113     tools:
 114       vivado: {part : xc7a100tcsg324-1}
 115     toplevel : toplevel
 116
 117   nexys_video-nodram:
 118     default_tool: vivado
 119     filesets: [core, nexys_video, soc, fpga, debug_xilinx]
 120     parameters :
 121       - memory_size
 122       - ram_init_file
 123       - clk_input
 124       - clk_frequency
 125       - disable_flatten_core
 126       - spi_flash_offset=10485760
 127     tools:
 128       vivado: {part : xc7a200tsbg484-1}
 129     toplevel : toplevel
 130
 131   nexys_video:
 132     default_tool: vivado
 133     filesets: [core, nexys_video, soc, fpga, debug_xilinx, litedram]
 134     parameters:
 135       - memory_size
 136       - ram_init_file
 137       - use_litedram=true
 138       - disable_flatten_core
 139       - no_bram
 140       - spi_flash_offset=10485760
 141     generate: [dram_nexys_video]
 142     tools:
 143       vivado: {part : xc7a200tsbg484-1}
 144     toplevel : toplevel
 145
 146   arty_a7-35-nodram:
 147     default_tool: vivado
 148     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 149     parameters :
 150       - memory_size
 151       - ram_init_file
 152       - clk_input
 153       - clk_frequency
 154       - disable_flatten_core
 155       - spi_flash_offset=3145728
 156     tools:
 157       vivado: {part : xc7a35ticsg324-1L}
 158     toplevel : toplevel
 159
 160   arty_a7-35:
 161     default_tool: vivado
 162     filesets: [core, arty_a7, soc, fpga, debug_xilinx, litedram]
 163     parameters :
 164       - memory_size
 165       - ram_init_file
 166       - use_litedram=true
 167       - disable_flatten_core
 168       - no_bram
 169       - spi_flash_offset=3145728
 170     generate: [dram_arty]
 171     tools:
 172       vivado: {part : xc7a35ticsg324-1L}
 173     toplevel : toplevel
 174
 175   arty_a7-100-nodram:
 176     default_tool: vivado
 177     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 178     parameters :
 179       - memory_size
 180       - ram_init_file
 181       - clk_input
 182       - clk_frequency
 183       - disable_flatten_core
 184       - spi_flash_offset=4194304
 185     tools:
 186       vivado: {part : xc7a100ticsg324-1L}
 187     toplevel : toplevel
 188
 189   arty_a7-100:
 190     default_tool: vivado
 191     filesets: [core, arty_a7, soc, fpga, debug_xilinx, litedram]
 192     parameters:
 193       - memory_size
 194       - ram_init_file
 195       - use_litedram=true
 196       - disable_flatten_core
 197       - no_bram
 198       - spi_flash_offset=4194304
 199     generate: [dram_arty]
 200     tools:
 201       vivado: {part : xc7a100ticsg324-1L}
 202     toplevel : toplevel
 203
 204   cmod_a7-35:
 205     default_tool: vivado
 206     filesets: [core, cmod_a7-35, soc, fpga, debug_xilinx]
 207     parameters :
 208       - memory_size
 209       - ram_init_file
 210       - reset_low=false
 211       - clk_input=12000000
 212       - clk_frequency
 213       - disable_flatten_core
 214     tools:
 215       vivado: {part : xc7a35tcpg236-1}
 216     toplevel : toplevel
 217
 218   synth:
 219     filesets: [core, soc]
 220     tools:
 221       vivado: {pnr : none}
 222     toplevel: core
 223
 224 generate:
 225   dram_arty:
 226     generator: litedram_gen
 227     parameters: {board : arty}
 228
 229   dram_nexys_video:
 230     generator: litedram_gen
 231     parameters: {board : nexys-video}
 232
 233 parameters:
 234   memory_size:
 235     datatype    : int
 236     description : On-chip memory size (bytes). If no_bram is set, this is the size carved out for the DRAM payload
 237     paramtype   : generic
 238     default     : 16384
 239
 240   ram_init_file:
 241     datatype    : file
 242     description : Initial on-chip RAM contents
 243     paramtype   : generic
 244
 245   reset_low:
 246     datatype    : bool
 247     description : External reset button polarity
 248     paramtype   : generic
 249
 250   clk_input:
 251     datatype    : int
 252     description : Clock input frequency in HZ (for top-generic based boards)
 253     paramtype   : generic
 254     default     : 100000000
 255
 256   clk_frequency:
 257     datatype    : int
 258     description : Generated system clock frequency in HZ (for top-generic based boards)
 259     paramtype   : generic
 260     default     : 100000000
 261
 262   disable_flatten_core:
 263     datatype    : bool
 264     description : Prevent Vivado from flattening the main core components
 265     paramtype   : generic
 266     default     : false
 267
 268   use_litedram:
 269     datatype    : bool
 270     description : Use liteDRAM
 271     paramtype   : generic
 272     default     : false
 273
 274   no_bram:
 275     datatype    : bool
 276     description : No internal block RAM (only DRAM and init code carrying payload)
 277     paramtype   : generic
 278     default     : false
 279
 280   spi_flash_offset:
 281     datatype    : int
 282     description : Offset (in bytes) in the SPI flash of the code payload to run
 283     paramtype   : generic