microwatt.core

   1 CAPI=2:
   2
   3 name : ::microwatt:0
   4
   5 filesets:
   6   core:
   7     files:
   8       - decode_types.vhdl
   9       - wishbone_types.vhdl
  10       - common.vhdl
  11       - fetch1.vhdl
  12       - fetch2.vhdl
  13       - decode1.vhdl
  14       - helpers.vhdl
  15       - decode2.vhdl
  16       - register_file.vhdl
  17       - cr_file.vhdl
  18       - crhelpers.vhdl
  19       - ppc_fx_insns.vhdl
  20       - sim_console.vhdl
  21       - execute1.vhdl
  22       - execute2.vhdl
  23       - loadstore1.vhdl
  24       - loadstore2.vhdl
  25       - multiply.vhdl
  26       - divider.vhdl
  27       - rotator.vhdl
  28       - writeback.vhdl
  29       - insn_helpers.vhdl
  30       - core.vhdl
  31       - icache.vhdl
  32       - core_debug.vhdl
  33     file_type : vhdlSource-2008
  34
  35   soc:
  36     files:
  37       - wishbone_arbiter.vhdl
  38       - wishbone_debug_master.vhdl
  39       - soc.vhdl
  40     file_type : vhdlSource-2008
  41
  42   fpga:
  43     files:
  44       - fpga/pp_fifo.vhd
  45       - fpga/mw_soc_memory.vhdl
  46       - fpga/soc_reset.vhdl
  47       - fpga/pp_soc_uart.vhd
  48       - fpga/pp_utilities.vhd
  49       - fpga/toplevel.vhdl
  50       - fpga/firmware.hex : {copyto : firmware.hex, file_type : user}
  51     file_type : vhdlSource-2008
  52
  53   debug_xilinx:
  54     files:
  55       - dmi_dtm_xilinx.vhdl : {file_type : vhdlSource-2008}
  56
  57   debug_dummy:
  58     files:
  59       - dmi_dtm_dummy.vhdl : {file_type : vhdlSource-2008}
  60
  61   nexys_a7:
  62     files:
  63       - fpga/nexys_a7.xdc : {file_type : xdc}
  64       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  65
  66   nexys_video:
  67     files:
  68       - fpga/nexys-video.xdc : {file_type : xdc}
  69       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  70
  71   arty_a7:
  72     files:
  73       - fpga/arty_a7.xdc : {file_type : xdc}
  74       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  75
  76   cmod_a7-35:
  77     files:
  78       - fpga/cmod_a7-35.xdc : {file_type : xdc}
  79       - fpga/clk_gen_mcmm.vhd : {file_type : vhdlSource-2008}
  80
  81 targets:
  82   nexys_a7:
  83     default_tool: vivado
  84     filesets: [core, nexys_a7, soc, fpga, debug_xilinx]
  85     parameters :
  86       - memory_size
  87       - ram_init_file
  88       - clk_input
  89       - clk_frequency
  90     tools:
  91       vivado: {part : xc7a100tcsg324-1}
  92     toplevel : toplevel
  93
  94   nexys_video:
  95     default_tool: vivado
  96     filesets: [core, nexys_video, soc, fpga, debug_xilinx]
  97     parameters :
  98       - memory_size
  99       - ram_init_file
 100       - clk_input
 101       - clk_frequency
 102     tools:
 103       vivado: {part : xc7a200tsbg484-1}
 104     toplevel : toplevel
 105
 106   arty_a7-35:
 107     default_tool: vivado
 108     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 109     parameters :
 110       - memory_size
 111       - ram_init_file
 112       - clk_input
 113       - clk_frequency
 114     tools:
 115       vivado: {part : xc7a35ticsg324-1L}
 116     toplevel : toplevel
 117
 118   arty_a7-100:
 119     default_tool: vivado
 120     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 121     parameters :
 122       - memory_size
 123       - ram_init_file
 124       - clk_input
 125       - clk_frequency
 126     tools:
 127       vivado: {part : xc7a100ticsg324-1L}
 128     toplevel : toplevel
 129
 130   cmod_a7-35:
 131     default_tool: vivado
 132     filesets: [core, cmod_a7-35, soc, fpga, debug_xilinx]
 133     parameters :
 134       - memory_size
 135       - ram_init_file
 136       - reset_low=false
 137       - clk_input=12000000
 138     tools:
 139       vivado: {part : xc7a35tcpg236-1}
 140     toplevel : toplevel
 141
 142   synth:
 143     filesets: [core, soc]
 144     tools:
 145       vivado: {pnr : none}
 146     toplevel: core
 147
 148 parameters:
 149   memory_size:
 150     datatype    : int
 151     description : On-chip memory size (bytes)
 152     paramtype   : generic
 153
 154   ram_init_file:
 155     datatype    : file
 156     description : Initial on-chip RAM contents
 157     paramtype   : generic
 158
 159   reset_low:
 160     datatype    : bool
 161     description : External reset button polarity
 162     paramtype   : generic
 163
 164   clk_input:
 165     datatype    : int
 166     description : Clock input frequency in HZ (for top-generic based boards)
 167     paramtype   : generic
 168     default     : 100000000
 169
 170   clk_frequency:
 171     datatype    : int
 172     description : Generated system clock frequency in HZ (for top-generic based boards)
 173     paramtype   : generic
 174     default     : 50000000