2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
6 use work.decode_types.all;
8 use work.glibc_random.all;
9 use work.ppc_fx_insns.all;
14 architecture behave of multiply_tb is
15 signal clk : std_ulogic;
16 constant clk_period : time := 10 ns;
18 constant pipeline_depth : integer := 4;
20 signal m1 : Decode2ToMultiplyType;
21 signal m2 : MultiplyToWritebackType;
23 multiply_0: entity work.multiply
24 generic map (PIPELINE_DEPTH => pipeline_depth)
25 port map (clk => clk, m_in => m1, m_out => m2);
30 wait for clk_period/2;
32 wait for clk_period/2;
36 variable ra, rb, rt, behave_rt: std_ulogic_vector(63 downto 0);
37 variable si: std_ulogic_vector(15 downto 0);
42 m1.insn_type <= OP_MUL_L64;
43 m1.write_reg <= "10001";
44 m1.data1 <= '0' & x"0000000000001000";
45 m1.data2 <= '0' & x"0000000000001111";
49 assert m2.valid = '0';
54 assert m2.valid = '0';
57 assert m2.valid = '0';
60 assert m2.valid = '1';
61 assert m2.write_reg_enable = '1';
62 assert m2.write_reg_nr = "10001";
63 assert m2.write_reg_data = x"0000000001111000";
67 assert m2.valid = '0';
73 assert m2.valid = '0';
77 wait for clk_period * (pipeline_depth-1);
78 assert m2.valid = '1';
79 assert m2.write_reg_enable = '1';
80 assert m2.write_reg_nr = "10001";
81 assert m2.write_reg_data = x"0000000001111000";
85 mulld_loop : for i in 0 to 1000 loop
86 ra := pseudorand(ra'length);
87 rb := pseudorand(rb'length);
89 behave_rt := ppc_mulld(ra, rb);
94 m1.insn_type <= OP_MUL_L64;
100 wait for clk_period * (pipeline_depth-1);
102 assert m2.valid = '1';
104 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
105 report "bad mulld expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
109 mulhdu_loop : for i in 0 to 1000 loop
110 ra := pseudorand(ra'length);
111 rb := pseudorand(rb'length);
113 behave_rt := ppc_mulhdu(ra, rb);
115 m1.data1 <= '0' & ra;
116 m1.data2 <= '0' & rb;
118 m1.insn_type <= OP_MUL_H64;
124 wait for clk_period * (pipeline_depth-1);
126 assert m2.valid = '1';
128 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
129 report "bad mulhdu expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
133 mulhd_loop : for i in 0 to 1000 loop
134 ra := pseudorand(ra'length);
135 rb := pseudorand(rb'length);
137 behave_rt := ppc_mulhd(ra, rb);
139 m1.data1 <= ra(63) & ra;
140 m1.data2 <= rb(63) & rb;
142 m1.insn_type <= OP_MUL_H64;
148 wait for clk_period * (pipeline_depth-1);
150 assert m2.valid = '1';
152 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
153 report "bad mulhd expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
157 mullw_loop : for i in 0 to 1000 loop
158 ra := pseudorand(ra'length);
159 rb := pseudorand(rb'length);
161 behave_rt := ppc_mullw(ra, rb);
163 m1.data1 <= (others => ra(31));
164 m1.data1(31 downto 0) <= ra(31 downto 0);
165 m1.data2 <= (others => rb(31));
166 m1.data2(31 downto 0) <= rb(31 downto 0);
168 m1.insn_type <= OP_MUL_L64;
174 wait for clk_period * (pipeline_depth-1);
176 assert m2.valid = '1';
178 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
179 report "bad mullw expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
183 mulhw_loop : for i in 0 to 1000 loop
184 ra := pseudorand(ra'length);
185 rb := pseudorand(rb'length);
187 behave_rt := ppc_mulhw(ra, rb);
189 m1.data1 <= (others => ra(31));
190 m1.data1(31 downto 0) <= ra(31 downto 0);
191 m1.data2 <= (others => rb(31));
192 m1.data2(31 downto 0) <= rb(31 downto 0);
194 m1.insn_type <= OP_MUL_H32;
200 wait for clk_period * (pipeline_depth-1);
202 assert m2.valid = '1';
204 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
205 report "bad mulhw expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
209 mulhwu_loop : for i in 0 to 1000 loop
210 ra := pseudorand(ra'length);
211 rb := pseudorand(rb'length);
213 behave_rt := ppc_mulhwu(ra, rb);
215 m1.data1 <= (others => '0');
216 m1.data1(31 downto 0) <= ra(31 downto 0);
217 m1.data2 <= (others => '0');
218 m1.data2(31 downto 0) <= rb(31 downto 0);
220 m1.insn_type <= OP_MUL_H32;
226 wait for clk_period * (pipeline_depth-1);
228 assert m2.valid = '1';
230 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
231 report "bad mulhwu expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
235 mulli_loop : for i in 0 to 1000 loop
236 ra := pseudorand(ra'length);
237 si := pseudorand(si'length);
239 behave_rt := ppc_mulli(ra, si);
241 m1.data1 <= ra(63) & ra;
242 m1.data2 <= (others => si(15));
243 m1.data2(15 downto 0) <= si;
245 m1.insn_type <= OP_MUL_L64;
251 wait for clk_period * (pipeline_depth-1);
253 assert m2.valid = '1';
255 assert to_hstring(behave_rt) = to_hstring(m2.write_reg_data)
256 report "bad mulli expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.write_reg_data);
259 assert false report "end of test" severity failure;