4 from nmigen
.build
import *
5 from nmigen
.vendor
.xilinx_7series
import *
9 __all__
= ["KC705Platform"]
12 class KC705Platform(Xilinx7SeriesPlatform
):
16 default_clk
= "clk156"
18 Resource("clk156", 0, DiffPairs("K28", "K29", dir="i"),
19 Clock(156e6
), Attrs(IOSTANDARD
="LVDS_25")),
21 Resource("user_led", 0, Pins("AB8", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
22 Resource("user_led", 1, Pins("AA8", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
23 Resource("user_led", 2, Pins("AC9", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
24 Resource("user_led", 3, Pins("AB9", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
25 Resource("user_led", 4, Pins("AE26", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
26 Resource("user_led", 5, Pins("G19", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
27 Resource("user_led", 6, Pins("E18", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
28 Resource("user_led", 7, Pins("F16", dir="o"), Attrs(IOSTANDARD
="LVCMOS15")),
32 attrs
=Attrs(IOSTANDARD
="LVCMOS33")
37 def toolchain_program(self
, products
, name
):
38 openocd
= os
.environ
.get("OPENOCD", "openocd")
39 with products
.extract("{}.bit".format(name
)) as bitstream_filename
:
40 subprocess
.check_call([openocd
,
41 "-c", "source [find board/kc705.cfg]; init; pld load 0 {}; exit"
42 .format(bitstream_filename
)
46 if __name__
== "__main__":
47 from ._blinky
import build_and_program
48 build_and_program(KC705Platform
)