4 from nmigen
.build
import *
5 from nmigen
.vendor
.xilinx_ultrascale
import *
6 from .resources
import *
9 __all__
= ["KCU105Platform"]
12 class KCU105Platform(XilinxUltraScalePlatform
):
17 default_clk
= "clk125"
19 Resource("clk125", 0, DiffPairs("G10", "F10", dir="i"),
20 Clock(125e6
), Attrs(IOSTANDARD
="LVDS")),
22 *LEDResources(pins
="AP8 H23 P20 P21 N22 M22 R23 P23",
23 attrs
=Attrs(IOSTANDARD
="LVCMOS18")),
27 def toolchain_program(self
, products
, name
):
28 openocd
= os
.environ
.get("OPENOCD", "openocd")
29 with products
.extract("{}.bit".format(name
)) as bitstream_filename
:
30 subprocess
.check_call([openocd
,
31 "-c", "source [find board/kcu105.cfg]; init; pld load 0 {}; exit"
32 .format(bitstream_filename
)
36 if __name__
== "__main__":
37 from .test
.blinky
import *
38 KCU105Platform().build(Blinky(), do_program
=True)