opcodes/ChangeLog

   1 2005-06-15  Dave Brolley  <brolley@redhat.com>
   2
   3         Contribute Morpho ms1 on behalf of Red Hat
   4         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
   5         ms1-opc.h: New files, Morpho ms1 target.
   6
   7         2004-05-14  Stan Cox  <scox@redhat.com>
   8
   9         * disassemble.c (ARCH_ms1): Define.
  10         (disassembler): Handle bfd_arch_ms1
  11
  12         2004-05-13  Michael Snyder  <msnyder@redhat.com>
  13
  14         * Makefile.am, Makefile.in: Add ms1 target.
  15         * configure.in: Ditto.
  16
  17 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
  18
  19         * arm-opc.h: Delete; fold contents into ...
  20         * arm-dis.c: ... here.  Move includes of internal COFF headers
  21         next to includes of internal ELF headers.
  22         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
  23         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
  24         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
  25         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
  26         (iwmmxt_wwnames, iwmmxt_wwssnames):
  27         Make const.
  28         (regnames): Remove iWMMXt coprocessor register sets.
  29         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
  30         (get_arm_regnames): Adjust fourth argument to match above changes.
  31         (set_iwmmxt_regnames): Delete.
  32         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
  33         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
  34         and iwmmxt_cregnames, not set_iwmmxt_regnames.
  35         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
  36         ISO syntax for function pointer calls.
  37
  38 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
  39
  40         * arm-dis.c: Split up the comments describing the format codes, so
  41         that the ARM and 16-bit Thumb opcode tables each have comments
  42         preceding them that describe all the codes, and only the codes,
  43         valid in those tables.  (32-bit Thumb table is already like this.)
  44         Reorder the lists in all three comments to match the order in
  45         which the codes are implemented.
  46         Remove all forward declarations of static functions.  Convert all
  47         function definitions to ISO C format.
  48         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
  49         Return nothing.
  50         (print_insn_thumb16): Remove unused case 'I'.
  51         (print_insn): Update for changed calling convention of subroutines.
  52
  53 2005-05-25  Jan Beulich  <jbeulich@novell.com>
  54
  55         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
  56         hex (but retain it being displayed as signed). Remove redundant
  57         checks. Add handling of displacements for 16-bit addressing in Intel
  58         mode.
  59
  60 2005-05-25  Jan Beulich  <jbeulich@novell.com>
  61
  62         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
  63         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
  64         masking of 'rm' in 16-bit memory address handling.
  65
  66 2005-05-19  Anton Blanchard  <anton@samba.org>
  67
  68         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
  69         (print_ppc_disassembler_options): Document it.
  70         * ppc-opc.c (SVC_LEV): Define.
  71         (LEV): Allow optional operand.
  72         (POWER5): Define.
  73         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
  74         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
  75
  76 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
  77
  78         * Makefile.in:  Regenerate.
  79
  80 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
  81
  82         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
  83         instructions.  Adjust disassembly of some opcodes to match
  84         unified syntax.
  85         (thumb32_opcodes): New table.
  86         (print_insn_thumb): Rename print_insn_thumb16; don't handle
  87         two-halfword branches here.
  88         (print_insn_thumb32): New function.
  89         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
  90         and print_insn_thumb32.  Be consistent about order of
  91         halfwords when printing 32-bit instructions.
  92
  93 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  94
  95         PR 843
  96         * i386-dis.c (branch_v_mode): New.
  97         (indirEv): Use branch_v_mode instead of v_mode.
  98         (OP_E): Handle branch_v_mode.
  99
 100 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 101
 102         * d10v-dis.c (dis_2_short): Support 64bit host.
 103
 104 2005-05-07  Nick Clifton  <nickc@redhat.com>
 105
 106         * po/nl.po: Updated translation.
 107
 108 2005-05-07  Nick Clifton  <nickc@redhat.com>
 109
 110         * Update the address and phone number of the FSF organization in
 111         the GPL notices in the following files:
 112         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 113         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 114         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 115         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 116         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 117         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 118         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 119         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 120         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 121         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 122         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 123         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 124         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 125         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 126         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 127         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 128         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 129         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 130         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 131         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 132         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 133         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 134         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 135         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 136         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 137         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 138         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 139         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 140         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 141         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 142         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 143         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 144         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 145
 146 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 147
 148         * ia64-opc.c: Include sysdep.h before libiberty.h.
 149
 150 2005-05-05  Nick Clifton  <nickc@redhat.com>
 151
 152         * configure.in (ALL_LINGUAS): Add vi.
 153         * configure: Regenerate.
 154         * po/vi.po: New.
 155
 156 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 157
 158         * configure.in: Fix the check for basename declaration.
 159         * configure: Regenerate.
 160
 161 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 162
 163         * ppc-opc.c (RTO): Define.
 164         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 165         entries to suit PPC440.
 166
 167 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 168
 169         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 170         Add xcrypt-ctr.
 171
 172 2005-04-14  Nick Clifton  <nickc@redhat.com>
 173
 174         * po/fi.po: New translation: Finnish.
 175         * configure.in (ALL_LINGUAS): Add fi.
 176         * configure: Regenerate.
 177
 178 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 179
 180         * Makefile.am (NO_WERROR): Define.
 181         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 182         * Makefile.in: Regenerate.
 183         * aclocal.m4: Regenerate.
 184         * configure: Regenerate.
 185
 186 2005-04-04  Nick Clifton  <nickc@redhat.com>
 187
 188         * fr30-asm.c: Regenerate.
 189         * frv-asm.c: Regenerate.
 190         * iq2000-asm.c: Regenerate.
 191         * m32r-asm.c: Regenerate.
 192         * openrisc-asm.c: Regenerate.
 193
 194 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 195
 196         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 197         visible operands in Intel mode. The first operand of monitor is
 198         %rax in 64-bit mode.
 199
 200 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 201
 202         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 203         easier future additions.
 204
 205 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 206
 207         * configure.in: Check for basename.
 208         * configure: Regenerate.
 209         * config.in: Ditto.
 210
 211 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 212
 213         * i386-dis.c (SEG_Fixup): New.
 214         (Sv): New.
 215         (dis386): Use "Sv" for 0x8c and 0x8e.
 216
 217 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 218             Nick Clifton  <nickc@redhat.com>
 219
 220         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 221         function entry mask addresses.
 222         (entry_addr_occupied_slots): New variable: The number of occupied
 223         elements in entry_addr.
 224         (entry_addr_total_slots): New variable: The total number of
 225         elements in entry_addr.
 226         (parse_disassembler_options): New function.  Fills in the entry_addr
 227         array.
 228         (free_entry_array): New function.  Release the memory used by the
 229         entry addr array.  Suppressed because there is no way to call it.
 230         (is_function_entry): Check if a given address is a function's
 231         start address by looking at supplied entry mask addresses and
 232         symbol information, if available.
 233         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 234
 235 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 236
 237         * cris-dis.c (print_with_operands): Use ~31L for long instead
 238         of ~31.
 239
 240 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         * mmix-opc.c (O): Revert the last change.
 243         (Z): Likewise.
 244
 245 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 246
 247         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 248         (Z): Likewise.
 249
 250 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 251
 252         * mmix-opc.c (O, Z): Force expression as unsigned long.
 253
 254 2005-03-18  Nick Clifton  <nickc@redhat.com>
 255
 256         * ip2k-asm.c: Regenerate.
 257         * op/opcodes.pot: Regenerate.
 258
 259 2005-03-16  Nick Clifton  <nickc@redhat.com>
 260             Ben Elliston  <bje@au.ibm.com>
 261
 262         * configure.in (werror): New switch: Add -Werror to the
 263         compiler command line.  Enabled by default.  Disable via
 264         --disable-werror.
 265         * configure: Regenerate.
 266
 267 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 268
 269         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 270         BOOKE.
 271
 272 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 273
 274         * po/es.po: Commit new Spanish translation.
 275
 276         * po/fr.po: Commit new French translation.
 277
 278 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 279
 280         * vax-dis.c: Fix spelling error
 281         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 282         of just "Entry mask: < r1 ... >"
 283
 284 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 285
 286         * arm-dis.c (arm_opcodes): Document %E and %V.
 287         Add entries for v6T2 ARM instructions:
 288         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 289         (print_insn_arm): Add support for %E and %V.
 290         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 291
 292 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 293             Alan Modra  <amodra@bigpond.net.au>
 294
 295         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 296         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 297         (SPRG_MASK): Delete.
 298         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 299         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 300         mfsprg4..7 after msprg and consolidate.
 301
 302 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 303
 304         * vax-dis.c (entry_mask_bit): New array.
 305         (print_insn_vax): Decode function entry mask.
 306
 307 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 308
 309         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 310
 311 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 312
 313         * po/opcodes.pot: Regenerate.
 314
 315 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 316
 317         * arc-dis.c (a4_decoding_class): New enum.
 318         (dsmOneArcInst): Use the enum values for the decoding class.
 319         Remove redundant case in the switch for decodingClass value 11.
 320
 321 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 322
 323         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 324         accesses.
 325         (OP_C): Consider lock prefix in non-64-bit modes.
 326
 327 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 328
 329         * cris-dis.c (format_hex): Remove ineffective warning fix.
 330         * crx-dis.c (make_instruction): Warning fix.
 331         * frv-asm.c: Regenerate.
 332
 333 2005-02-23  Nick Clifton  <nickc@redhat.com>
 334
 335         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 336         read_memory.
 337
 338         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 339
 340         * crx-dis.c (make_instruction): Move argument structure into inner
 341         scope and ensure that all of its fields are initialised before
 342         they are used.
 343
 344         * fr30-asm.c: Regenerate.
 345         * fr30-dis.c: Regenerate.
 346         * frv-asm.c: Regenerate.
 347         * frv-dis.c: Regenerate.
 348         * ip2k-asm.c: Regenerate.
 349         * ip2k-dis.c: Regenerate.
 350         * iq2000-asm.c: Regenerate.
 351         * iq2000-dis.c: Regenerate.
 352         * m32r-asm.c: Regenerate.
 353         * m32r-dis.c: Regenerate.
 354         * openrisc-asm.c: Regenerate.
 355         * openrisc-dis.c: Regenerate.
 356         * xstormy16-asm.c: Regenerate.
 357         * xstormy16-dis.c: Regenerate.
 358
 359 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 360
 361         * arc-ext.c: Warning fixes.
 362         * arc-ext.h: Likewise.
 363         * cgen-opc.c: Likewise.
 364         * ia64-gen.c: Likewise.
 365         * maxq-dis.c: Likewise.
 366         * ns32k-dis.c: Likewise.
 367         * w65-dis.c: Likewise.
 368         * ia64-asmtab.c: Regenerate.
 369
 370 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 371
 372         * fr30-desc.c: Regenerate.
 373         * fr30-desc.h: Regenerate.
 374         * fr30-opc.c: Regenerate.
 375         * fr30-opc.h: Regenerate.
 376         * frv-desc.c: Regenerate.
 377         * frv-desc.h: Regenerate.
 378         * frv-opc.c: Regenerate.
 379         * frv-opc.h: Regenerate.
 380         * ip2k-desc.c: Regenerate.
 381         * ip2k-desc.h: Regenerate.
 382         * ip2k-opc.c: Regenerate.
 383         * ip2k-opc.h: Regenerate.
 384         * iq2000-desc.c: Regenerate.
 385         * iq2000-desc.h: Regenerate.
 386         * iq2000-opc.c: Regenerate.
 387         * iq2000-opc.h: Regenerate.
 388         * m32r-desc.c: Regenerate.
 389         * m32r-desc.h: Regenerate.
 390         * m32r-opc.c: Regenerate.
 391         * m32r-opc.h: Regenerate.
 392         * m32r-opinst.c: Regenerate.
 393         * openrisc-desc.c: Regenerate.
 394         * openrisc-desc.h: Regenerate.
 395         * openrisc-opc.c: Regenerate.
 396         * openrisc-opc.h: Regenerate.
 397         * xstormy16-desc.c: Regenerate.
 398         * xstormy16-desc.h: Regenerate.
 399         * xstormy16-opc.c: Regenerate.
 400         * xstormy16-opc.h: Regenerate.
 401
 402 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 403
 404         * Makefile.am: Run "make dep-am"
 405         * Makefile.in: Regenerate.
 406
 407 2005-02-15  Nick Clifton  <nickc@redhat.com>
 408
 409         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 410         compile time warnings.
 411         (print_keyword): Likewise.
 412         (default_print_insn): Likewise.
 413
 414         * fr30-desc.c: Regenerated.
 415         * fr30-desc.h: Regenerated.
 416         * fr30-dis.c: Regenerated.
 417         * fr30-opc.c: Regenerated.
 418         * fr30-opc.h: Regenerated.
 419         * frv-desc.c: Regenerated.
 420         * frv-dis.c: Regenerated.
 421         * frv-opc.c: Regenerated.
 422         * ip2k-asm.c: Regenerated.
 423         * ip2k-desc.c: Regenerated.
 424         * ip2k-desc.h: Regenerated.
 425         * ip2k-dis.c: Regenerated.
 426         * ip2k-opc.c: Regenerated.
 427         * ip2k-opc.h: Regenerated.
 428         * iq2000-desc.c: Regenerated.
 429         * iq2000-dis.c: Regenerated.
 430         * iq2000-opc.c: Regenerated.
 431         * m32r-asm.c: Regenerated.
 432         * m32r-desc.c: Regenerated.
 433         * m32r-desc.h: Regenerated.
 434         * m32r-dis.c: Regenerated.
 435         * m32r-opc.c: Regenerated.
 436         * m32r-opc.h: Regenerated.
 437         * m32r-opinst.c: Regenerated.
 438         * openrisc-desc.c: Regenerated.
 439         * openrisc-desc.h: Regenerated.
 440         * openrisc-dis.c: Regenerated.
 441         * openrisc-opc.c: Regenerated.
 442         * openrisc-opc.h: Regenerated.
 443         * xstormy16-desc.c: Regenerated.
 444         * xstormy16-desc.h: Regenerated.
 445         * xstormy16-dis.c: Regenerated.
 446         * xstormy16-opc.c: Regenerated.
 447         * xstormy16-opc.h: Regenerated.
 448
 449 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 450
 451         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 452         address.
 453
 454 2005-02-11  Nick Clifton  <nickc@redhat.com>
 455
 456         * iq2000-asm.c: Regenerate.
 457
 458         * frv-dis.c: Regenerate.
 459
 460 2005-02-07  Jim Blandy  <jimb@redhat.com>
 461
 462         * Makefile.am (CGEN): Load guile.scm before calling the main
 463         application script.
 464         * Makefile.in: Regenerated.
 465         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 466         Simply pass the cgen-opc.scm path to ${cgen} as its first
 467         argument; ${cgen} itself now contains the '-s', or whatever is
 468         appropriate for the Scheme being used.
 469
 470 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 471
 472         * configure: Regenerate to track ../gettext.m4.
 473
 474 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 475
 476         * ia64-gen.c (NELEMS): Define.
 477         (shrink): Generate alias with missing second predicate register when
 478         opcode has two outputs and these are both predicates.
 479         * ia64-opc-i.c (FULL17): Define.
 480         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 481         here to generate output template.
 482         (TBITCM, TNATCM): Undefine after use.
 483         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 484         first input. Add ld16 aliases without ar.csd as second output. Add
 485         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 486         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 487         ar.ccv as third/fourth inputs. Consolidate through...
 488         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 489         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 490         * ia64-asmtab.c: Regenerate.
 491
 492 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 493
 494         * configure: Regenerate to track ../gettext.m4 change.
 495
 496 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 497
 498         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 499         * frv-asm.c: Rebuilt.
 500         * frv-desc.c: Rebuilt.
 501         * frv-desc.h: Rebuilt.
 502         * frv-dis.c: Rebuilt.
 503         * frv-ibld.c: Rebuilt.
 504         * frv-opc.c: Rebuilt.
 505         * frv-opc.h: Rebuilt.
 506
 507 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 508
 509         * configure: Regenerate, ../gettext.m4 was updated.
 510
 511 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 512
 513         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 514         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 515         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 516         * mips-dis.c: Ditto.
 517
 518 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 519
 520         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 521
 522 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 523
 524         * mips-dis.c (no_aliases): New disassembly option flag.
 525         (set_default_mips_dis_options): Init no_aliases to zero.
 526         (parse_mips_dis_option): Handle no-aliases option.
 527         (print_insn_mips): Ignore table entries that are aliases
 528         if no_aliases is set.
 529         (print_insn_mips16): Ditto.
 530         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 531         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 532         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 533         * mips16-opc.c (mips16_opcodes): Ditto.
 534
 535 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 536
 537         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 538         (inheritance diagram): Add missing edge.
 539         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 540         easier for the testsuite.
 541         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 542         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 543         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 544         arch_sh2a_or_sh4_up child.
 545         (sh_table): Do renaming as above.
 546         Correct comment for ldc.l for gas testsuite to read.
 547         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 548         Correct comments for movy.w and movy.l for gas testsuite to read.
 549         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 550
 551 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 552
 553         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 554
 555 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 556
 557         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 558
 559 2005-01-10  Andreas Schwab  <schwab@suse.de>
 560
 561         * disassemble.c (disassemble_init_for_target) <case
 562         bfd_arch_ia64>: Set skip_zeroes to 16.
 563         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 564
 565 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 566
 567         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 568
 569 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 570
 571         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 572         memory references. Convert avr_operand() to C90 formatting.
 573
 574 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 575
 576         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 577
 578 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 579
 580         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 581         (no_op_insn): Initialize array with instructions that have no
 582         operands.
 583         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 584
 585 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 586
 587         * arm-dis.c: Correct top-level comment.
 588
 589 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 590
 591         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 592         architecuture defining the insn.
 593         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 594         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 595         field.
 596         Also include opcode/arm.h.
 597         * Makefile.am (arm-dis.lo): Update dependency list.
 598         * Makefile.in: Regenerate.
 599
 600 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 601
 602         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 603         reflect the change to the short immediate syntax.
 604
 605 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 606
 607         * or32-opc.c (debug): Warning fix.
 608         * po/POTFILES.in: Regenerate.
 609
 610         * maxq-dis.c: Formatting.
 611         (print_insn): Warning fix.
 612
 613 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 614
 615         * arm-dis.c (WORD_ADDRESS): Define.
 616         (print_insn): Use it.  Correct big-endian end-of-section handling.
 617
 618 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 619             Vineet Sharma      <vineets@noida.hcltech.com>
 620
 621         * maxq-dis.c: New file.
 622         * disassemble.c (ARCH_maxq): Define.
 623         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 624         instructions..
 625         * configure.in: Add case for bfd_maxq_arch.
 626         * configure: Regenerate.
 627         * Makefile.am: Add support for maxq-dis.c
 628         * Makefile.in: Regenerate.
 629         * aclocal.m4: Regenerate.
 630
 631 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 632
 633         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 634         mode.
 635         * crx-dis.c: Likewise.
 636
 637 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 638
 639         Generally, handle CRISv32.
 640         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 641         (struct cris_disasm_data): New type.
 642         (format_reg, format_hex, cris_constraint, print_flags)
 643         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 644         callers changed.
 645         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 646         (print_insn_crisv32_without_register_prefix)
 647         (print_insn_crisv10_v32_with_register_prefix)
 648         (print_insn_crisv10_v32_without_register_prefix)
 649         (cris_parse_disassembler_options): New functions.
 650         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 651         parameter.  All callers changed.
 652         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 653         failure.
 654         (cris_constraint) <case 'Y', 'U'>: New cases.
 655         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 656         for constraint 'n'.
 657         (print_with_operands) <case 'Y'>: New case.
 658         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 659         <case 'N', 'Y', 'Q'>: New cases.
 660         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 661         (print_insn_cris_with_register_prefix)
 662         (print_insn_cris_without_register_prefix): Call
 663         cris_parse_disassembler_options.
 664         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 665         for CRISv32 and the size of immediate operands.  New v32-only
 666         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 667         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 668         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 669         Change brp to be v3..v10.
 670         (cris_support_regs): New vector.
 671         (cris_opcodes): Update head comment.  New format characters '[',
 672         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 673         Add new opcodes for v32 and adjust existing opcodes to accommodate
 674         differences to earlier variants.
 675         (cris_cond15s): New vector.
 676
 677 2004-11-04 Jan Beulich <jbeulich@novell.com>
 678
 679         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 680         (indirEb): Remove.
 681         (Mp): Use f_mode rather than none at all.
 682         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 683         replaces what previously was x_mode; x_mode now means 128-bit SSE
 684         operands.
 685         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 686         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 687         pinsrw's second operand is Edqw.
 688         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 689         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 690         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 691         mode when an operand size override is present or always suffixing.
 692         More instructions will need to be added to this group.
 693         (putop): Handle new macro chars 'C' (short/long suffix selector),
 694         'I' (Intel mode override for following macro char), and 'J' (for
 695         adding the 'l' prefix to far branches in AT&T mode). When an
 696         alternative was specified in the template, honor macro character when
 697         specified for Intel mode.
 698         (OP_E): Handle new *_mode values. Correct pointer specifications for
 699         memory operands. Consolidate output of index register.
 700         (OP_G): Handle new *_mode values.
 701         (OP_I): Handle const_1_mode.
 702         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 703         respective opcode prefix bits have been consumed.
 704         (OP_EM, OP_EX): Provide some default handling for generating pointer
 705         specifications.
 706
 707 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 708
 709         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 710         COP_INST macro.
 711
 712 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 713
 714         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 715         (getregliststring): Support HI/LO and user registers.
 716         * crx-opc.c (crx_instruction): Update data structure according to the
 717         rearrangement done in CRX opcode header file.
 718         (crx_regtab):  Likewise.
 719         (crx_optab):  Likewise.
 720         (crx_instruction): Reorder load/stor instructions, remove unsupported
 721         formats.
 722         support new Co-Processor instruction 'cpi'.
 723
 724 2004-10-27  Nick Clifton  <nickc@redhat.com>
 725
 726         * opcodes/iq2000-asm.c: Regenerate.
 727         * opcodes/iq2000-desc.c: Regenerate.
 728         * opcodes/iq2000-desc.h: Regenerate.
 729         * opcodes/iq2000-dis.c: Regenerate.
 730         * opcodes/iq2000-ibld.c: Regenerate.
 731         * opcodes/iq2000-opc.c: Regenerate.
 732         * opcodes/iq2000-opc.h: Regenerate.
 733
 734 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 735
 736         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 737         us4, us5 (respectively).
 738         Remove unsupported 'popa' instruction.
 739         Reverse operands order in store co-processor instructions.
 740
 741 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 742
 743         * Makefile.am: Run "make dep-am"
 744         * Makefile.in: Regenerate.
 745
 746 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 747
 748         * xtensa-dis.c: Use ISO C90 formatting.
 749
 750 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 751
 752         * ppc-opc.c: Revert 2004-09-09 change.
 753
 754 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 755
 756         * xtensa-dis.c (state_names): Delete.
 757         (fetch_data): Use xtensa_isa_maxlength.
 758         (print_xtensa_operand): Replace operand parameter with opcode/operand
 759         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 760         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 761         instruction bundles.  Use xmalloc instead of malloc.
 762
 763 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 764
 765         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 766         initializers.
 767
 768 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 769
 770         * crx-opc.c (crx_instruction): Support Co-processor insns.
 771         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 772         (getregliststring): Change function to use the above enum.
 773         (print_arg): Handle CO-Processor insns.
 774         (crx_cinvs): Add 'b' option to invalidate the branch-target
 775         cache.
 776
 777 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 778
 779         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 780         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 781         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 782         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 783         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 784
 785 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 786
 787         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 788         rather than add it.
 789
 790 2004-09-30  Paul Brook  <paul@codesourcery.com>
 791
 792         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 793         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 794
 795 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 796
 797         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 798         (CONFIG_STATUS_DEPENDENCIES): New.
 799         (Makefile): Removed.
 800         (config.status): Likewise.
 801         * Makefile.in: Regenerated.
 802
 803 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 804
 805         * Makefile.am: Run "make dep-am".
 806         * Makefile.in: Regenerate.
 807         * aclocal.m4: Regenerate.
 808         * configure: Regenerate.
 809         * po/POTFILES.in: Regenerate.
 810         * po/opcodes.pot: Regenerate.
 811
 812 2004-09-11  Andreas Schwab  <schwab@suse.de>
 813
 814         * configure: Rebuild.
 815
 816 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 817
 818         * ppc-opc.c (L): Make this field not optional.
 819
 820 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 821
 822         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 823         Fix parameter to 'm[t|f]csr' insns.
 824
 825 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 826
 827         * configure.in: Autoupdate to autoconf 2.59.
 828         * aclocal.m4: Rebuild with aclocal 1.4p6.
 829         * configure: Rebuild with autoconf 2.59.
 830         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 831         bfd changes for autoconf 2.59 on the way).
 832         * config.in: Rebuild with autoheader 2.59.
 833
 834 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 835
 836         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 837
 838 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 839
 840         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 841         (GRPPADLCK2): New define.
 842         (twobyte_has_modrm): True for 0xA6.
 843         (grps): GRPPADLCK2 for opcode 0xA6.
 844
 845 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 846
 847         Introduce SH2a support.
 848         * sh-opc.h (arch_sh2a_base): Renumber.
 849         (arch_sh2a_nofpu_base): Remove.
 850         (arch_sh_base_mask): Adjust.
 851         (arch_opann_mask): New.
 852         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 853         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 854         (sh_table): Adjust whitespace.
 855         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 856         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 857         instruction list throughout.
 858         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 859         of arch_sh2a in instruction list throughout.
 860         (arch_sh2e_up): Accomodate above changes.
 861         (arch_sh2_up): Ditto.
 862         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 863         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 864         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 865         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 866         * sh-opc.h (arch_sh2a_nofpu): New.
 867         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 868         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 869         instruction.
 870         2004-01-20  DJ Delorie  <dj@redhat.com>
 871         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 872         2003-12-29  DJ Delorie  <dj@redhat.com>
 873         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 874         sh_opcode_info, sh_table): Add sh2a support.
 875         (arch_op32): New, to tag 32-bit opcodes.
 876         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 877         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 878         * sh-opc.h (arch_sh2a): Add.
 879         * sh-dis.c (arch_sh2a): Handle.
 880         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 881
 882 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 883
 884         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 885
 886 2004-07-22  Nick Clifton  <nickc@redhat.com>
 887
 888         PR/280
 889         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 890         insns - this is done by objdump itself.
 891         * h8500-dis.c (print_insn_h8500): Likewise.
 892
 893 2004-07-21  Jan Beulich <jbeulich@novell.com>
 894
 895         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 896         regardless of address size prefix in effect.
 897         (ptr_reg): Size or address registers does not depend on rex64, but
 898         on the presence of an address size override.
 899         (OP_MMX): Use rex.x only for xmm registers.
 900         (OP_EM): Use rex.z only for xmm registers.
 901
 902 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 903
 904         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 905         move/branch operations to the bottom so that VR5400 multimedia
 906         instructions take precedence in disassembly.
 907
 908 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 909
 910         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 911         ISA-specific "break" encoding.
 912
 913 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 914
 915         * arm-opc.h: Fix typo in comment.
 916
 917 2004-07-11  Andreas Schwab  <schwab@suse.de>
 918
 919         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 920
 921 2004-07-09  Andreas Schwab  <schwab@suse.de>
 922
 923         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 924
 925 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 926
 927         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 928         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 929         (crx-dis.lo): New target.
 930         (crx-opc.lo): Likewise.
 931         * Makefile.in: Regenerate.
 932         * configure.in: Handle bfd_crx_arch.
 933         * configure: Regenerate.
 934         * crx-dis.c: New file.
 935         * crx-opc.c: New file.
 936         * disassemble.c (ARCH_crx): Define.
 937         (disassembler): Handle ARCH_crx.
 938
 939 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 940
 941         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 942         * ia64-asmtab.c: Regnerate.
 943
 944 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 945
 946         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 947         (extract_fxm): Don't test dialect.
 948         (XFXFXM_MASK): Include the power4 bit.
 949         (XFXM): Add p4 param.
 950         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 951
 952 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 953
 954         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 955         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 956
 957 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 958
 959         * ppc-opc.c (BH, XLBH_MASK): Define.
 960         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 961
 962 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 963
 964         * i386-dis.c (x_mode): Comment.
 965         (two_source_ops): File scope.
 966         (float_mem): Correct fisttpll and fistpll.
 967         (float_mem_mode): New table.
 968         (dofloat): Use it.
 969         (OP_E): Correct intel mode PTR output.
 970         (ptr_reg): Use open_char and close_char.
 971         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 972         operands.  Set two_source_ops.
 973
 974 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 975
 976         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 977         instead of _raw_size.
 978
 979 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 980
 981         * ia64-gen.c (in_iclass): Handle more postinc st
 982         and ld variants.
 983         * ia64-asmtab.c: Rebuilt.
 984
 985 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 986
 987         * s390-opc.txt: Correct architecture mask for some opcodes.
 988         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 989         in the esa mode as well.
 990
 991 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 992
 993         * sh-dis.c (target_arch): Make unsigned.
 994         (print_insn_sh): Replace (most of) switch with a call to
 995         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 996         * sh-opc.h: Redefine architecture flags values.
 997         Add sh3-nommu architecture.
 998         Reorganise <arch>_up macros so they make more visual sense.
 999         (SH_MERGE_ARCH_SET): Define new macro.
1000         (SH_VALID_BASE_ARCH_SET): Likewise.
1001         (SH_VALID_MMU_ARCH_SET): Likewise.
1002         (SH_VALID_CO_ARCH_SET): Likewise.
1003         (SH_VALID_ARCH_SET): Likewise.
1004         (SH_MERGE_ARCH_SET_VALID): Likewise.
1005         (SH_ARCH_SET_HAS_FPU): Likewise.
1006         (SH_ARCH_SET_HAS_DSP): Likewise.
1007         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1008         (sh_get_arch_from_bfd_mach): Add prototype.
1009         (sh_get_arch_up_from_bfd_mach): Likewise.
1010         (sh_get_bfd_mach_from_arch_set): Likewise.
1011         (sh_merge_bfd_arc): Likewise.
1012
1013 2004-05-24  Peter Barada  <peter@the-baradas.com>
1014
1015         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1016         into new match_insn_m68k function.  Loop over canidate
1017         matches and select first that completely matches.
1018         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1019         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1020         to verify addressing for MAC/EMAC.
1021         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1022         reigster halves since 'fpu' and 'spl' look misleading.
1023         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1024         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1025         first, tighten up match masks.
1026         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1027         'size' from special case code in print_insn_m68k to
1028         determine decode size of insns.
1029
1030 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1031
1032         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1033         well as when -mpower4.
1034
1035 2004-05-13  Nick Clifton  <nickc@redhat.com>
1036
1037         * po/fr.po: Updated French translation.
1038
1039 2004-05-05  Peter Barada  <peter@the-baradas.com>
1040
1041         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1042         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1043         * m68k-op.c: Switch from ColdFire chips to core variants.
1044
1045 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1046
1047         PR 147.
1048         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1049
1050 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1051
1052         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1053         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1054
1055 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1056
1057         * sh-dis.c (print_insn_sh): Print the value in constant pool
1058         as a symbol if it looks like a symbol.
1059
1060 2004-04-22  Peter Barada <peter@the-baradas.com>
1061
1062         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1063         appropriate ColdFire architectures.
1064         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1065         mask addressing.
1066         Add EMAC instructions, fix MAC instructions. Remove
1067         macmw/macml/msacmw/msacml instructions since mask addressing now
1068         supported.
1069
1070 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1071
1072         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1073         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1074         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1075         macro.  Adjust all users.
1076
1077 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1078
1079         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1080         separately.
1081
1082 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1083
1084         * m32r-asm.c: Regenerate.
1085
1086 2004-03-29  Stan Shebs  <shebs@apple.com>
1087
1088         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1089         used.
1090
1091 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1092
1093         * aclocal.m4: Regenerate.
1094         * config.in: Regenerate.
1095         * configure: Regenerate.
1096         * po/POTFILES.in: Regenerate.
1097         * po/opcodes.pot: Regenerate.
1098
1099 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1100
1101         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1102         PPC_OPERANDS_GPR_0.
1103         * ppc-opc.c (RA0): Define.
1104         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1105         (RAOPT): Rename from RAO.  Update all uses.
1106         (powerpc_opcodes): Use RA0 as appropriate.
1107
1108 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1109
1110         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1111
1112 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1113
1114         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1115
1116 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1117
1118         * i386-dis.c (GRPPLOCK): Delete.
1119         (grps): Delete GRPPLOCK entry.
1120
1121 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1122
1123         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1124         (M, Mp): Use OP_M.
1125         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1126         (GRPPADLCK): Define.
1127         (dis386): Use NOP_Fixup on "nop".
1128         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1129         (twobyte_has_modrm): Set for 0xa7.
1130         (padlock_table): Delete.  Move to..
1131         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1132         and clflush.
1133         (print_insn): Revert PADLOCK_SPECIAL code.
1134         (OP_E): Delete sfence, lfence, mfence checks.
1135
1136 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1137
1138         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1139         (INVLPG_Fixup): New function.
1140         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1141
1142 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1143
1144         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1145         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1146         (padlock_table): New struct with PadLock instructions.
1147         (print_insn): Handle PADLOCK_SPECIAL.
1148
1149 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1150
1151         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1152         (OP_E): Twiddle clflush to sfence here.
1153
1154 2004-03-08  Nick Clifton  <nickc@redhat.com>
1155
1156         * po/de.po: Updated German translation.
1157
1158 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1159
1160         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1161         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1162         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1163         accordingly.
1164
1165 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1166
1167         * frv-asm.c: Regenerate.
1168         * frv-desc.c: Regenerate.
1169         * frv-desc.h: Regenerate.
1170         * frv-dis.c: Regenerate.
1171         * frv-ibld.c: Regenerate.
1172         * frv-opc.c: Regenerate.
1173         * frv-opc.h: Regenerate.
1174
1175 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1176
1177         * frv-desc.c, frv-opc.c: Regenerate.
1178
1179 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1180
1181         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1182
1183 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1184
1185         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1186         Also correct mistake in the comment.
1187
1188 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1189
1190         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1191         ensure that double registers have even numbers.
1192         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1193         that reserved instruction 0xfffd does not decode the same
1194         as 0xfdfd (ftrv).
1195         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1196         REG_N refers to a double register.
1197         Add REG_N_B01 nibble type and use it instead of REG_NM
1198         in ftrv.
1199         Adjust the bit patterns in a few comments.
1200
1201 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1202
1203         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1204
1205 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1206
1207         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1208
1209 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1210
1211         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1212
1213 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1214
1215         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1216         mtivor32, mtivor33, mtivor34.
1217
1218 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1219
1220         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1221
1222 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1223
1224         * arm-opc.h Maverick accumulator register opcode fixes.
1225
1226 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1227
1228         * m32r-dis.c: Regenerate.
1229
1230 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1231
1232         * sh-opc.h (sh_table): "fsrra", not "fssra".
1233
1234 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1235
1236         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1237         contraints.
1238
1239 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1240
1241         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1242
1243 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1244
1245         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1246         1.  Don't print scale factor on AT&T mode when index missing.
1247
1248 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1249
1250         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1251         when loaded into XR registers.
1252
1253 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1254
1255         * frv-desc.h: Regenerate.
1256         * frv-desc.c: Regenerate.
1257         * frv-opc.c: Regenerate.
1258
1259 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1260
1261         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1262
1263 2004-01-09  Paul Brook  <paul@codesourcery.com>
1264
1265         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1266         specific opcodes.
1267
1268 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1269
1270         * Makefile.am (libopcodes_la_DEPENDENCIES)
1271         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1272         comment about the problem.
1273         * Makefile.in: Regenerate.
1274
1275 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1276
1277         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1278         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1279         cut&paste errors in shifting/truncating numerical operands.
1280         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1281         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1282         (parse_uslo16): Likewise.
1283         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1284         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1285         (parse_s12): Likewise.
1286         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1287         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1288         (parse_uslo16): Likewise.
1289         (parse_uhi16): Parse gothi and gotfuncdeschi.
1290         (parse_d12): Parse got12 and gotfuncdesc12.
1291         (parse_s12): Likewise.
1292
1293 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1294
1295         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1296         instruction which looks similar to an 'rla' instruction.
1297
1298 For older changes see ChangeLog-0203
1299 \f
1300 Local Variables:
1301 mode: change-log
1302 left-margin: 8
1303 fill-column: 74
1304 version-control: never
1305 End: