opcodes/ChangeLog

   1 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
   2
   3         * mmix-opc.c (O, Z): Force expression as unsigned long.
   4
   5 2005-03-18  Nick Clifton  <nickc@redhat.com>
   6
   7         * ip2k-asm.c: Regenerate.
   8         * op/opcodes.pot: Regenerate.
   9
  10 2005-03-16  Nick Clifton  <nickc@redhat.com>
  11             Ben Elliston  <bje@au.ibm.com>
  12
  13         * configure.in (werror): New switch: Add -Werror to the
  14         compiler command line.  Enabled by default.  Disable via
  15         --disable-werror.
  16         * configure: Regenerate.
  17
  18 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  19
  20         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  21         BOOKE.
  22
  23 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  24
  25         * po/es.po: Commit new Spanish translation.
  26
  27         * po/fr.po: Commit new French translation.
  28
  29 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  30
  31         * vax-dis.c: Fix spelling error
  32         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  33         of just "Entry mask: < r1 ... >"
  34
  35 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  36
  37         * arm-dis.c (arm_opcodes): Document %E and %V.
  38         Add entries for v6T2 ARM instructions:
  39         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  40         (print_insn_arm): Add support for %E and %V.
  41         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  42
  43 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  44             Alan Modra  <amodra@bigpond.net.au>
  45
  46         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  47         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  48         (SPRG_MASK): Delete.
  49         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  50         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  51         mfsprg4..7 after msprg and consolidate.
  52
  53 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  54
  55         * vax-dis.c (entry_mask_bit): New array.
  56         (print_insn_vax): Decode function entry mask.
  57
  58 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  59
  60         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  61
  62 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  63
  64         * po/opcodes.pot: Regenerate.
  65
  66 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  67
  68         * arc-dis.c (a4_decoding_class): New enum.
  69         (dsmOneArcInst): Use the enum values for the decoding class.
  70         Remove redundant case in the switch for decodingClass value 11.
  71
  72 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  73
  74         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  75         accesses.
  76         (OP_C): Consider lock prefix in non-64-bit modes.
  77
  78 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  79
  80         * cris-dis.c (format_hex): Remove ineffective warning fix.
  81         * crx-dis.c (make_instruction): Warning fix.
  82         * frv-asm.c: Regenerate.
  83
  84 2005-02-23  Nick Clifton  <nickc@redhat.com>
  85
  86         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  87         read_memory.
  88
  89         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  90
  91         * crx-dis.c (make_instruction): Move argument structure into inner
  92         scope and ensure that all of its fields are initialised before
  93         they are used.
  94
  95         * fr30-asm.c: Regenerate.
  96         * fr30-dis.c: Regenerate.
  97         * frv-asm.c: Regenerate.
  98         * frv-dis.c: Regenerate.
  99         * ip2k-asm.c: Regenerate.
 100         * ip2k-dis.c: Regenerate.
 101         * iq2000-asm.c: Regenerate.
 102         * iq2000-dis.c: Regenerate.
 103         * m32r-asm.c: Regenerate.
 104         * m32r-dis.c: Regenerate.
 105         * openrisc-asm.c: Regenerate.
 106         * openrisc-dis.c: Regenerate.
 107         * xstormy16-asm.c: Regenerate.
 108         * xstormy16-dis.c: Regenerate.
 109
 110 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 111
 112         * arc-ext.c: Warning fixes.
 113         * arc-ext.h: Likewise.
 114         * cgen-opc.c: Likewise.
 115         * ia64-gen.c: Likewise.
 116         * maxq-dis.c: Likewise.
 117         * ns32k-dis.c: Likewise.
 118         * w65-dis.c: Likewise.
 119         * ia64-asmtab.c: Regenerate.
 120
 121 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 122
 123         * fr30-desc.c: Regenerate.
 124         * fr30-desc.h: Regenerate.
 125         * fr30-opc.c: Regenerate.
 126         * fr30-opc.h: Regenerate.
 127         * frv-desc.c: Regenerate.
 128         * frv-desc.h: Regenerate.
 129         * frv-opc.c: Regenerate.
 130         * frv-opc.h: Regenerate.
 131         * ip2k-desc.c: Regenerate.
 132         * ip2k-desc.h: Regenerate.
 133         * ip2k-opc.c: Regenerate.
 134         * ip2k-opc.h: Regenerate.
 135         * iq2000-desc.c: Regenerate.
 136         * iq2000-desc.h: Regenerate.
 137         * iq2000-opc.c: Regenerate.
 138         * iq2000-opc.h: Regenerate.
 139         * m32r-desc.c: Regenerate.
 140         * m32r-desc.h: Regenerate.
 141         * m32r-opc.c: Regenerate.
 142         * m32r-opc.h: Regenerate.
 143         * m32r-opinst.c: Regenerate.
 144         * openrisc-desc.c: Regenerate.
 145         * openrisc-desc.h: Regenerate.
 146         * openrisc-opc.c: Regenerate.
 147         * openrisc-opc.h: Regenerate.
 148         * xstormy16-desc.c: Regenerate.
 149         * xstormy16-desc.h: Regenerate.
 150         * xstormy16-opc.c: Regenerate.
 151         * xstormy16-opc.h: Regenerate.
 152
 153 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 154
 155         * Makefile.am: Run "make dep-am"
 156         * Makefile.in: Regenerate.
 157
 158 2005-02-15  Nick Clifton  <nickc@redhat.com>
 159
 160         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 161         compile time warnings.
 162         (print_keyword): Likewise.
 163         (default_print_insn): Likewise.
 164
 165         * fr30-desc.c: Regenerated.
 166         * fr30-desc.h: Regenerated.
 167         * fr30-dis.c: Regenerated.
 168         * fr30-opc.c: Regenerated.
 169         * fr30-opc.h: Regenerated.
 170         * frv-desc.c: Regenerated.
 171         * frv-dis.c: Regenerated.
 172         * frv-opc.c: Regenerated.
 173         * ip2k-asm.c: Regenerated.
 174         * ip2k-desc.c: Regenerated.
 175         * ip2k-desc.h: Regenerated.
 176         * ip2k-dis.c: Regenerated.
 177         * ip2k-opc.c: Regenerated.
 178         * ip2k-opc.h: Regenerated.
 179         * iq2000-desc.c: Regenerated.
 180         * iq2000-dis.c: Regenerated.
 181         * iq2000-opc.c: Regenerated.
 182         * m32r-asm.c: Regenerated.
 183         * m32r-desc.c: Regenerated.
 184         * m32r-desc.h: Regenerated.
 185         * m32r-dis.c: Regenerated.
 186         * m32r-opc.c: Regenerated.
 187         * m32r-opc.h: Regenerated.
 188         * m32r-opinst.c: Regenerated.
 189         * openrisc-desc.c: Regenerated.
 190         * openrisc-desc.h: Regenerated.
 191         * openrisc-dis.c: Regenerated.
 192         * openrisc-opc.c: Regenerated.
 193         * openrisc-opc.h: Regenerated.
 194         * xstormy16-desc.c: Regenerated.
 195         * xstormy16-desc.h: Regenerated.
 196         * xstormy16-dis.c: Regenerated.
 197         * xstormy16-opc.c: Regenerated.
 198         * xstormy16-opc.h: Regenerated.
 199
 200 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 201
 202         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 203         address.
 204
 205 2005-02-11  Nick Clifton  <nickc@redhat.com>
 206
 207         * iq2000-asm.c: Regenerate.
 208
 209         * frv-dis.c: Regenerate.
 210
 211 2005-02-07  Jim Blandy  <jimb@redhat.com>
 212
 213         * Makefile.am (CGEN): Load guile.scm before calling the main
 214         application script.
 215         * Makefile.in: Regenerated.
 216         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 217         Simply pass the cgen-opc.scm path to ${cgen} as its first
 218         argument; ${cgen} itself now contains the '-s', or whatever is
 219         appropriate for the Scheme being used.
 220
 221 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 222
 223         * configure: Regenerate to track ../gettext.m4.
 224
 225 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 226
 227         * ia64-gen.c (NELEMS): Define.
 228         (shrink): Generate alias with missing second predicate register when
 229         opcode has two outputs and these are both predicates.
 230         * ia64-opc-i.c (FULL17): Define.
 231         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 232         here to generate output template.
 233         (TBITCM, TNATCM): Undefine after use.
 234         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 235         first input. Add ld16 aliases without ar.csd as second output. Add
 236         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 237         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 238         ar.ccv as third/fourth inputs. Consolidate through...
 239         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 240         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 241         * ia64-asmtab.c: Regenerate.
 242
 243 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 244
 245         * configure: Regenerate to track ../gettext.m4 change.
 246
 247 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 248
 249         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 250         * frv-asm.c: Rebuilt.
 251         * frv-desc.c: Rebuilt.
 252         * frv-desc.h: Rebuilt.
 253         * frv-dis.c: Rebuilt.
 254         * frv-ibld.c: Rebuilt.
 255         * frv-opc.c: Rebuilt.
 256         * frv-opc.h: Rebuilt.
 257
 258 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 259
 260         * configure: Regenerate, ../gettext.m4 was updated.
 261
 262 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 263
 264         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 265         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 266         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 267         * mips-dis.c: Ditto.
 268
 269 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 270
 271         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 272
 273 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 274
 275         * mips-dis.c (no_aliases): New disassembly option flag.
 276         (set_default_mips_dis_options): Init no_aliases to zero.
 277         (parse_mips_dis_option): Handle no-aliases option.
 278         (print_insn_mips): Ignore table entries that are aliases
 279         if no_aliases is set.
 280         (print_insn_mips16): Ditto.
 281         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 282         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 283         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 284         * mips16-opc.c (mips16_opcodes): Ditto.
 285
 286 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 287
 288         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 289         (inheritance diagram): Add missing edge.
 290         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 291         easier for the testsuite.
 292         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 293         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 294         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 295         arch_sh2a_or_sh4_up child.
 296         (sh_table): Do renaming as above.
 297         Correct comment for ldc.l for gas testsuite to read.
 298         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 299         Correct comments for movy.w and movy.l for gas testsuite to read.
 300         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 301
 302 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 303
 304         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 305
 306 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 307
 308         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 309
 310 2005-01-10  Andreas Schwab  <schwab@suse.de>
 311
 312         * disassemble.c (disassemble_init_for_target) <case
 313         bfd_arch_ia64>: Set skip_zeroes to 16.
 314         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 315
 316 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 317
 318         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 319
 320 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 321
 322         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 323         memory references. Convert avr_operand() to C90 formatting.
 324
 325 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 326
 327         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 328
 329 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 330
 331         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 332         (no_op_insn): Initialize array with instructions that have no
 333         operands.
 334         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 335
 336 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 337
 338         * arm-dis.c: Correct top-level comment.
 339
 340 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 341
 342         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 343         architecuture defining the insn.
 344         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 345         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 346         field.
 347         Also include opcode/arm.h.
 348         * Makefile.am (arm-dis.lo): Update dependency list.
 349         * Makefile.in: Regenerate.
 350
 351 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 352
 353         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 354         reflect the change to the short immediate syntax.
 355
 356 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 357
 358         * or32-opc.c (debug): Warning fix.
 359         * po/POTFILES.in: Regenerate.
 360
 361         * maxq-dis.c: Formatting.
 362         (print_insn): Warning fix.
 363
 364 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 365
 366         * arm-dis.c (WORD_ADDRESS): Define.
 367         (print_insn): Use it.  Correct big-endian end-of-section handling.
 368
 369 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 370             Vineet Sharma      <vineets@noida.hcltech.com>
 371
 372         * maxq-dis.c: New file.
 373         * disassemble.c (ARCH_maxq): Define.
 374         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 375         instructions..
 376         * configure.in: Add case for bfd_maxq_arch.
 377         * configure: Regenerate.
 378         * Makefile.am: Add support for maxq-dis.c
 379         * Makefile.in: Regenerate.
 380         * aclocal.m4: Regenerate.
 381
 382 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 383
 384         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 385         mode.
 386         * crx-dis.c: Likewise.
 387
 388 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 389
 390         Generally, handle CRISv32.
 391         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 392         (struct cris_disasm_data): New type.
 393         (format_reg, format_hex, cris_constraint, print_flags)
 394         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 395         callers changed.
 396         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 397         (print_insn_crisv32_without_register_prefix)
 398         (print_insn_crisv10_v32_with_register_prefix)
 399         (print_insn_crisv10_v32_without_register_prefix)
 400         (cris_parse_disassembler_options): New functions.
 401         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 402         parameter.  All callers changed.
 403         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 404         failure.
 405         (cris_constraint) <case 'Y', 'U'>: New cases.
 406         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 407         for constraint 'n'.
 408         (print_with_operands) <case 'Y'>: New case.
 409         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 410         <case 'N', 'Y', 'Q'>: New cases.
 411         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 412         (print_insn_cris_with_register_prefix)
 413         (print_insn_cris_without_register_prefix): Call
 414         cris_parse_disassembler_options.
 415         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 416         for CRISv32 and the size of immediate operands.  New v32-only
 417         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 418         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 419         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 420         Change brp to be v3..v10.
 421         (cris_support_regs): New vector.
 422         (cris_opcodes): Update head comment.  New format characters '[',
 423         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 424         Add new opcodes for v32 and adjust existing opcodes to accommodate
 425         differences to earlier variants.
 426         (cris_cond15s): New vector.
 427
 428 2004-11-04 Jan Beulich <jbeulich@novell.com>
 429
 430         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 431         (indirEb): Remove.
 432         (Mp): Use f_mode rather than none at all.
 433         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 434         replaces what previously was x_mode; x_mode now means 128-bit SSE
 435         operands.
 436         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 437         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 438         pinsrw's second operand is Edqw.
 439         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 440         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 441         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 442         mode when an operand size override is present or always suffixing.
 443         More instructions will need to be added to this group.
 444         (putop): Handle new macro chars 'C' (short/long suffix selector),
 445         'I' (Intel mode override for following macro char), and 'J' (for
 446         adding the 'l' prefix to far branches in AT&T mode). When an
 447         alternative was specified in the template, honor macro character when
 448         specified for Intel mode.
 449         (OP_E): Handle new *_mode values. Correct pointer specifications for
 450         memory operands. Consolidate output of index register.
 451         (OP_G): Handle new *_mode values.
 452         (OP_I): Handle const_1_mode.
 453         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 454         respective opcode prefix bits have been consumed.
 455         (OP_EM, OP_EX): Provide some default handling for generating pointer
 456         specifications.
 457
 458 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 459
 460         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 461         COP_INST macro.
 462
 463 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 464
 465         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 466         (getregliststring): Support HI/LO and user registers.
 467         * crx-opc.c (crx_instruction): Update data structure according to the
 468         rearrangement done in CRX opcode header file.
 469         (crx_regtab):  Likewise.
 470         (crx_optab):  Likewise.
 471         (crx_instruction): Reorder load/stor instructions, remove unsupported
 472         formats.
 473         support new Co-Processor instruction 'cpi'.
 474
 475 2004-10-27  Nick Clifton  <nickc@redhat.com>
 476
 477         * opcodes/iq2000-asm.c: Regenerate.
 478         * opcodes/iq2000-desc.c: Regenerate.
 479         * opcodes/iq2000-desc.h: Regenerate.
 480         * opcodes/iq2000-dis.c: Regenerate.
 481         * opcodes/iq2000-ibld.c: Regenerate.
 482         * opcodes/iq2000-opc.c: Regenerate.
 483         * opcodes/iq2000-opc.h: Regenerate.
 484
 485 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 486
 487         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 488         us4, us5 (respectively).
 489         Remove unsupported 'popa' instruction.
 490         Reverse operands order in store co-processor instructions.
 491
 492 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 493
 494         * Makefile.am: Run "make dep-am"
 495         * Makefile.in: Regenerate.
 496
 497 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 498
 499         * xtensa-dis.c: Use ISO C90 formatting.
 500
 501 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 502
 503         * ppc-opc.c: Revert 2004-09-09 change.
 504
 505 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 506
 507         * xtensa-dis.c (state_names): Delete.
 508         (fetch_data): Use xtensa_isa_maxlength.
 509         (print_xtensa_operand): Replace operand parameter with opcode/operand
 510         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 511         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 512         instruction bundles.  Use xmalloc instead of malloc.
 513
 514 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 515
 516         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 517         initializers.
 518
 519 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 520
 521         * crx-opc.c (crx_instruction): Support Co-processor insns.
 522         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 523         (getregliststring): Change function to use the above enum.
 524         (print_arg): Handle CO-Processor insns.
 525         (crx_cinvs): Add 'b' option to invalidate the branch-target
 526         cache.
 527
 528 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 529
 530         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 531         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 532         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 533         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 534         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 535
 536 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 537
 538         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 539         rather than add it.
 540
 541 2004-09-30  Paul Brook  <paul@codesourcery.com>
 542
 543         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 544         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 545
 546 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 547
 548         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 549         (CONFIG_STATUS_DEPENDENCIES): New.
 550         (Makefile): Removed.
 551         (config.status): Likewise.
 552         * Makefile.in: Regenerated.
 553
 554 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 555
 556         * Makefile.am: Run "make dep-am".
 557         * Makefile.in: Regenerate.
 558         * aclocal.m4: Regenerate.
 559         * configure: Regenerate.
 560         * po/POTFILES.in: Regenerate.
 561         * po/opcodes.pot: Regenerate.
 562
 563 2004-09-11  Andreas Schwab  <schwab@suse.de>
 564
 565         * configure: Rebuild.
 566
 567 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 568
 569         * ppc-opc.c (L): Make this field not optional.
 570
 571 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 572
 573         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 574         Fix parameter to 'm[t|f]csr' insns.
 575
 576 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 577
 578         * configure.in: Autoupdate to autoconf 2.59.
 579         * aclocal.m4: Rebuild with aclocal 1.4p6.
 580         * configure: Rebuild with autoconf 2.59.
 581         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 582         bfd changes for autoconf 2.59 on the way).
 583         * config.in: Rebuild with autoheader 2.59.
 584
 585 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 586
 587         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 588
 589 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 590
 591         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 592         (GRPPADLCK2): New define.
 593         (twobyte_has_modrm): True for 0xA6.
 594         (grps): GRPPADLCK2 for opcode 0xA6.
 595
 596 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 597
 598         Introduce SH2a support.
 599         * sh-opc.h (arch_sh2a_base): Renumber.
 600         (arch_sh2a_nofpu_base): Remove.
 601         (arch_sh_base_mask): Adjust.
 602         (arch_opann_mask): New.
 603         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 604         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 605         (sh_table): Adjust whitespace.
 606         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 607         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 608         instruction list throughout.
 609         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 610         of arch_sh2a in instruction list throughout.
 611         (arch_sh2e_up): Accomodate above changes.
 612         (arch_sh2_up): Ditto.
 613         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 614         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 615         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 616         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 617         * sh-opc.h (arch_sh2a_nofpu): New.
 618         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 619         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 620         instruction.
 621         2004-01-20  DJ Delorie  <dj@redhat.com>
 622         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 623         2003-12-29  DJ Delorie  <dj@redhat.com>
 624         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 625         sh_opcode_info, sh_table): Add sh2a support.
 626         (arch_op32): New, to tag 32-bit opcodes.
 627         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 628         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 629         * sh-opc.h (arch_sh2a): Add.
 630         * sh-dis.c (arch_sh2a): Handle.
 631         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 632
 633 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 634
 635         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 636
 637 2004-07-22  Nick Clifton  <nickc@redhat.com>
 638
 639         PR/280
 640         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 641         insns - this is done by objdump itself.
 642         * h8500-dis.c (print_insn_h8500): Likewise.
 643
 644 2004-07-21  Jan Beulich <jbeulich@novell.com>
 645
 646         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 647         regardless of address size prefix in effect.
 648         (ptr_reg): Size or address registers does not depend on rex64, but
 649         on the presence of an address size override.
 650         (OP_MMX): Use rex.x only for xmm registers.
 651         (OP_EM): Use rex.z only for xmm registers.
 652
 653 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 654
 655         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 656         move/branch operations to the bottom so that VR5400 multimedia
 657         instructions take precedence in disassembly.
 658
 659 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 660
 661         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 662         ISA-specific "break" encoding.
 663
 664 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 665
 666         * arm-opc.h: Fix typo in comment.
 667
 668 2004-07-11  Andreas Schwab  <schwab@suse.de>
 669
 670         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 671
 672 2004-07-09  Andreas Schwab  <schwab@suse.de>
 673
 674         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 675
 676 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 677
 678         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 679         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 680         (crx-dis.lo): New target.
 681         (crx-opc.lo): Likewise.
 682         * Makefile.in: Regenerate.
 683         * configure.in: Handle bfd_crx_arch.
 684         * configure: Regenerate.
 685         * crx-dis.c: New file.
 686         * crx-opc.c: New file.
 687         * disassemble.c (ARCH_crx): Define.
 688         (disassembler): Handle ARCH_crx.
 689
 690 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 691
 692         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 693         * ia64-asmtab.c: Regnerate.
 694
 695 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 696
 697         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 698         (extract_fxm): Don't test dialect.
 699         (XFXFXM_MASK): Include the power4 bit.
 700         (XFXM): Add p4 param.
 701         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 702
 703 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 704
 705         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 706         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 707
 708 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 709
 710         * ppc-opc.c (BH, XLBH_MASK): Define.
 711         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 712
 713 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 714
 715         * i386-dis.c (x_mode): Comment.
 716         (two_source_ops): File scope.
 717         (float_mem): Correct fisttpll and fistpll.
 718         (float_mem_mode): New table.
 719         (dofloat): Use it.
 720         (OP_E): Correct intel mode PTR output.
 721         (ptr_reg): Use open_char and close_char.
 722         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 723         operands.  Set two_source_ops.
 724
 725 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 726
 727         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 728         instead of _raw_size.
 729
 730 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 731
 732         * ia64-gen.c (in_iclass): Handle more postinc st
 733         and ld variants.
 734         * ia64-asmtab.c: Rebuilt.
 735
 736 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 737
 738         * s390-opc.txt: Correct architecture mask for some opcodes.
 739         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 740         in the esa mode as well.
 741
 742 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 743
 744         * sh-dis.c (target_arch): Make unsigned.
 745         (print_insn_sh): Replace (most of) switch with a call to
 746         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 747         * sh-opc.h: Redefine architecture flags values.
 748         Add sh3-nommu architecture.
 749         Reorganise <arch>_up macros so they make more visual sense.
 750         (SH_MERGE_ARCH_SET): Define new macro.
 751         (SH_VALID_BASE_ARCH_SET): Likewise.
 752         (SH_VALID_MMU_ARCH_SET): Likewise.
 753         (SH_VALID_CO_ARCH_SET): Likewise.
 754         (SH_VALID_ARCH_SET): Likewise.
 755         (SH_MERGE_ARCH_SET_VALID): Likewise.
 756         (SH_ARCH_SET_HAS_FPU): Likewise.
 757         (SH_ARCH_SET_HAS_DSP): Likewise.
 758         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 759         (sh_get_arch_from_bfd_mach): Add prototype.
 760         (sh_get_arch_up_from_bfd_mach): Likewise.
 761         (sh_get_bfd_mach_from_arch_set): Likewise.
 762         (sh_merge_bfd_arc): Likewise.
 763
 764 2004-05-24  Peter Barada  <peter@the-baradas.com>
 765
 766         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 767         into new match_insn_m68k function.  Loop over canidate
 768         matches and select first that completely matches.
 769         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 770         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 771         to verify addressing for MAC/EMAC.
 772         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 773         reigster halves since 'fpu' and 'spl' look misleading.
 774         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 775         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 776         first, tighten up match masks.
 777         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 778         'size' from special case code in print_insn_m68k to
 779         determine decode size of insns.
 780
 781 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 782
 783         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 784         well as when -mpower4.
 785
 786 2004-05-13  Nick Clifton  <nickc@redhat.com>
 787
 788         * po/fr.po: Updated French translation.
 789
 790 2004-05-05  Peter Barada  <peter@the-baradas.com>
 791
 792         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 793         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 794         * m68k-op.c: Switch from ColdFire chips to core variants.
 795
 796 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 797
 798         PR 147.
 799         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 800
 801 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 802
 803         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 804         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 805
 806 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 807
 808         * sh-dis.c (print_insn_sh): Print the value in constant pool
 809         as a symbol if it looks like a symbol.
 810
 811 2004-04-22  Peter Barada <peter@the-baradas.com>
 812
 813         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 814         appropriate ColdFire architectures.
 815         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 816         mask addressing.
 817         Add EMAC instructions, fix MAC instructions. Remove
 818         macmw/macml/msacmw/msacml instructions since mask addressing now
 819         supported.
 820
 821 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 822
 823         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 824         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 825         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 826         macro.  Adjust all users.
 827
 828 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 829
 830         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 831         separately.
 832
 833 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 834
 835         * m32r-asm.c: Regenerate.
 836
 837 2004-03-29  Stan Shebs  <shebs@apple.com>
 838
 839         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 840         used.
 841
 842 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 843
 844         * aclocal.m4: Regenerate.
 845         * config.in: Regenerate.
 846         * configure: Regenerate.
 847         * po/POTFILES.in: Regenerate.
 848         * po/opcodes.pot: Regenerate.
 849
 850 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 851
 852         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 853         PPC_OPERANDS_GPR_0.
 854         * ppc-opc.c (RA0): Define.
 855         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 856         (RAOPT): Rename from RAO.  Update all uses.
 857         (powerpc_opcodes): Use RA0 as appropriate.
 858
 859 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 860
 861         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 862
 863 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 864
 865         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 866
 867 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 868
 869         * i386-dis.c (GRPPLOCK): Delete.
 870         (grps): Delete GRPPLOCK entry.
 871
 872 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 873
 874         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 875         (M, Mp): Use OP_M.
 876         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 877         (GRPPADLCK): Define.
 878         (dis386): Use NOP_Fixup on "nop".
 879         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 880         (twobyte_has_modrm): Set for 0xa7.
 881         (padlock_table): Delete.  Move to..
 882         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 883         and clflush.
 884         (print_insn): Revert PADLOCK_SPECIAL code.
 885         (OP_E): Delete sfence, lfence, mfence checks.
 886
 887 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 888
 889         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 890         (INVLPG_Fixup): New function.
 891         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 892
 893 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 894
 895         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 896         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 897         (padlock_table): New struct with PadLock instructions.
 898         (print_insn): Handle PADLOCK_SPECIAL.
 899
 900 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 901
 902         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 903         (OP_E): Twiddle clflush to sfence here.
 904
 905 2004-03-08  Nick Clifton  <nickc@redhat.com>
 906
 907         * po/de.po: Updated German translation.
 908
 909 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 910
 911         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 912         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 913         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 914         accordingly.
 915
 916 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 917
 918         * frv-asm.c: Regenerate.
 919         * frv-desc.c: Regenerate.
 920         * frv-desc.h: Regenerate.
 921         * frv-dis.c: Regenerate.
 922         * frv-ibld.c: Regenerate.
 923         * frv-opc.c: Regenerate.
 924         * frv-opc.h: Regenerate.
 925
 926 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 927
 928         * frv-desc.c, frv-opc.c: Regenerate.
 929
 930 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 931
 932         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 933
 934 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 935
 936         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 937         Also correct mistake in the comment.
 938
 939 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 940
 941         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 942         ensure that double registers have even numbers.
 943         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 944         that reserved instruction 0xfffd does not decode the same
 945         as 0xfdfd (ftrv).
 946         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 947         REG_N refers to a double register.
 948         Add REG_N_B01 nibble type and use it instead of REG_NM
 949         in ftrv.
 950         Adjust the bit patterns in a few comments.
 951
 952 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 953
 954         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 955
 956 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 957
 958         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 959
 960 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 961
 962         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 963
 964 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 965
 966         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 967         mtivor32, mtivor33, mtivor34.
 968
 969 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 970
 971         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 972
 973 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 974
 975         * arm-opc.h Maverick accumulator register opcode fixes.
 976
 977 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 978
 979         * m32r-dis.c: Regenerate.
 980
 981 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 982
 983         * sh-opc.h (sh_table): "fsrra", not "fssra".
 984
 985 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 986
 987         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 988         contraints.
 989
 990 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 991
 992         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 993
 994 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 995
 996         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 997         1.  Don't print scale factor on AT&T mode when index missing.
 998
 999 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1000
1001         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1002         when loaded into XR registers.
1003
1004 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1005
1006         * frv-desc.h: Regenerate.
1007         * frv-desc.c: Regenerate.
1008         * frv-opc.c: Regenerate.
1009
1010 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1011
1012         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1013
1014 2004-01-09  Paul Brook  <paul@codesourcery.com>
1015
1016         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1017         specific opcodes.
1018
1019 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1020
1021         * Makefile.am (libopcodes_la_DEPENDENCIES)
1022         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1023         comment about the problem.
1024         * Makefile.in: Regenerate.
1025
1026 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1027
1028         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1029         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1030         cut&paste errors in shifting/truncating numerical operands.
1031         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1032         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1033         (parse_uslo16): Likewise.
1034         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1035         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1036         (parse_s12): Likewise.
1037         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1038         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1039         (parse_uslo16): Likewise.
1040         (parse_uhi16): Parse gothi and gotfuncdeschi.
1041         (parse_d12): Parse got12 and gotfuncdesc12.
1042         (parse_s12): Likewise.
1043
1044 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1045
1046         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1047         instruction which looks similar to an 'rla' instruction.
1048
1049 For older changes see ChangeLog-0203
1050 \f
1051 Local Variables:
1052 mode: change-log
1053 left-margin: 8
1054 fill-column: 74
1055 version-control: never
1056 End: