1 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
4 * i386-tbl.h: Regenerated.
6 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
8 * i386-opc.tbl: Disallow 16-bit near indirect branches for
10 * i386-tbl.h: Regenerated.
12 2008-02-21 Jan Beulich <jbeulich@novell.com>
14 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
15 and Fword for far indirect jmp. Allow Reg16 and Word for near
16 indirect jmp on x86-64. Disallow Fword for lcall.
17 * i386-tbl.h: Re-generate.
19 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
21 * cr16-opc.c (cr16_num_optab): Defined
23 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
25 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
26 * i386-init.h: Regenerated.
28 2008-02-14 Nick Clifton <nickc@redhat.com>
31 * configure.in (SHARED_LIBADD): Select the correct host specific
32 file extension for shared libraries.
33 * configure: Regenerate.
35 2008-02-13 Jan Beulich <jbeulich@novell.com>
37 * i386-opc.h (RegFlat): New.
38 * i386-reg.tbl (flat): Add.
39 * i386-tbl.h: Re-generate.
41 2008-02-13 Jan Beulich <jbeulich@novell.com>
43 * i386-dis.c (a_mode): New.
44 (cond_jump_mode): Adjust.
45 (Ma): Change to a_mode.
46 (intel_operand_size): Handle a_mode.
47 * i386-opc.tbl: Allow Dword and Qword for bound.
48 * i386-tbl.h: Re-generate.
50 2008-02-13 Jan Beulich <jbeulich@novell.com>
52 * i386-gen.c (process_i386_registers): Process new fields.
53 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
54 unsigned char. Add dw2_regnum and Dw2Inval.
55 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
57 * i386-tbl.h: Re-generate.
59 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
61 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
62 * i386-init.h: Updated.
64 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
66 * i386-gen.c (cpu_flags): Add CpuXsave.
68 * i386-opc.h (CpuXsave): New.
70 (i386_cpu_flags): Add cpuxsave.
72 * i386-dis.c (MOD_0FAE_REG_4): New.
73 (RM_0F01_REG_2): Likewise.
74 (MOD_0FAE_REG_5): Updated.
75 (RM_0F01_REG_3): Likewise.
76 (reg_table): Use MOD_0FAE_REG_4.
77 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
79 (rm_table): Add RM_0F01_REG_2.
81 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
82 * i386-init.h: Regenerated.
83 * i386-tbl.h: Likewise.
85 2008-02-11 Jan Beulich <jbeulich@novell.com>
87 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
88 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
89 * i386-tbl.h: Re-generate.
91 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
94 * configure: Regenerated.
96 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
98 * mips-dis.c: Update copyright.
99 (mips_arch_choices): Add Octeon.
100 * mips-opc.c: Update copyright.
102 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
104 2008-01-29 Alan Modra <amodra@bigpond.net.au>
106 * ppc-opc.c: Support optional L form mtmsr.
108 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
110 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
112 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
114 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
115 * i386-init.h: Regenerated.
117 2008-01-23 Tristan Gingold <gingold@adacore.com>
119 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
120 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
122 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
124 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
125 (cpu_flags): Likewise.
127 * i386-opc.h (CpuMMX2): Removed.
130 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
131 * i386-init.h: Regenerated.
132 * i386-tbl.h: Likewise.
134 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
136 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
138 * i386-init.h: Regenerated.
140 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
142 * i386-opc.tbl: Use Qword on movddup.
143 * i386-tbl.h: Regenerated.
145 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
147 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
148 * i386-tbl.h: Regenerated.
150 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
152 * i386-dis.c (Mx): New.
153 (PREFIX_0FC3): Likewise.
154 (PREFIX_0FC7_REG_6): Updated.
155 (dis386_twobyte): Use PREFIX_0FC3.
156 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
157 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
160 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
162 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
163 (operand_types): Add Mem.
165 * i386-opc.h (IntelSyntax): New.
166 * i386-opc.h (Mem): New.
168 (Opcode_Modifier_Max): Updated.
169 (i386_opcode_modifier): Add intelsyntax.
170 (i386_operand_type): Add mem.
172 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
175 * i386-reg.tbl: Add size for accumulator.
177 * i386-init.h: Regenerated.
178 * i386-tbl.h: Likewise.
180 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
182 * i386-opc.h (Byte): Fix a typo.
184 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
187 * i386-gen.c (operand_type_init): Add Dword to
188 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
189 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
191 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
192 Xmmword, Unspecified and Anysize.
193 (set_bitfield): Make Mmword an alias of Qword. Make Oword
196 * i386-opc.h (CheckSize): Removed.
204 (i386_opcode_modifier): Remove checksize, byte, word, dword,
208 (Unspecified): Likewise.
210 (i386_operand_type): Add byte, word, dword, fword, qword,
211 tbyte xmmword, unspecified and anysize.
213 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
214 Tbyte, Xmmword, Unspecified and Anysize.
216 * i386-reg.tbl: Add size for accumulator.
218 * i386-init.h: Regenerated.
219 * i386-tbl.h: Likewise.
221 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
223 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
225 (reg_table): Updated.
226 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
227 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
229 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
231 * i386-gen.c (set_bitfield): Use fail () on error.
233 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
235 * i386-gen.c (lineno): New.
236 (filename): Likewise.
237 (set_bitfield): Report filename and line numer on error.
238 (process_i386_opcodes): Set filename and update lineno.
239 (process_i386_registers): Likewise.
241 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
243 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
246 * i386-opc.h (IntelMnemonic): Renamed to ..
248 (Opcode_Modifier_Max): Updated.
249 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
252 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
253 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
254 * i386-tbl.h: Regenerated.
256 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
258 * i386-gen.c: Update copyright to 2008.
259 * i386-opc.h: Likewise.
260 * i386-opc.tbl: Likewise.
262 * i386-init.h: Regenerated.
263 * i386-tbl.h: Likewise.
265 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
267 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
268 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
269 * i386-tbl.h: Regenerated.
271 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
273 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
275 (cpu_flags): Likewise.
277 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
278 (CpuSSE4_2_Or_ABM): Likewise.
280 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
282 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
283 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
284 and CpuPadLock, respectively.
285 * i386-init.h: Regenerated.
286 * i386-tbl.h: Likewise.
288 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
290 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
292 * i386-opc.h (No_xSuf): Removed.
293 (CheckSize): Updated.
295 * i386-tbl.h: Regenerated.
297 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
299 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
300 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
302 (cpu_flags): Add CpuSSE4_2_Or_ABM.
304 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
306 (i386_cpu_flags): Add cpusse4_2_or_abm.
308 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
309 CpuABM|CpuSSE4_2 on popcnt.
310 * i386-init.h: Regenerated.
311 * i386-tbl.h: Likewise.
313 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
315 * i386-opc.h: Update comments.
317 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
319 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
320 * i386-opc.h: Likewise.
321 * i386-opc.tbl: Likewise.
323 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
326 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
327 Byte, Word, Dword, QWord and Xmmword.
329 * i386-opc.h (No_xSuf): New.
330 (CheckSize): Likewise.
337 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
338 Dword, QWord and Xmmword.
340 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
342 * i386-tbl.h: Regenerated.
344 2008-01-02 Mark Kettenis <kettenis@gnu.org>
346 * m88k-dis.c (instructions): Fix fcvt.* instructions.
349 For older changes see ChangeLog-2007
355 version-control: never