opcodes/ChangeLog

   1 2005-07-20  DJ Delorie  <dj@redhat.com>
   2
   3         * disassemble.c (disassemble_init_for_target): M32C ISAs are
   4         enums, so convert them to bit masks, which attributes are.
   5
   6 2005-07-18  Nick Clifton  <nickc@redhat.com>
   7
   8         * configure.in: Restore alpha ordering to list of arches.
   9         * configure: Regenerate.
  10         * disassemble.c: Restore alpha ordering to list of arches.
  11
  12 2005-07-18  Nick Clifton  <nickc@redhat.com>
  13
  14         * m32c-asm.c: Regenerate.
  15         * m32c-desc.c: Regenerate.
  16         * m32c-desc.h: Regenerate.
  17         * m32c-dis.c: Regenerate.
  18         * m32c-ibld.h: Regenerate.
  19         * m32c-opc.c: Regenerate.
  20         * m32c-opc.h: Regenerate.
  21
  22 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
  23
  24         * i386-dis.c (PNI_Fixup): Update comment.
  25         (VMX_Fixup): Properly handle the suffix check.
  26
  27 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  28
  29         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
  30         mfctl disassembly.
  31
  32 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
  33
  34         * Makefile.am: Run "make dep-am".
  35         (stamp-m32c): Fix cpu dependencies.
  36         * Makefile.in: Regenerate.
  37         * ip2k-dis.c: Regenerate.
  38
  39 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
  40
  41         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
  42         (VMX_Fixup): New. Fix up Intel VMX Instructions.
  43         (Em): New.
  44         (Gm): New.
  45         (VM): New.
  46         (dis386_twobyte): Updated entries 0x78 and 0x79.
  47         (twobyte_has_modrm): Likewise.
  48         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
  49         (OP_G): Handle m_mode.
  50
  51 2005-07-14  Jim Blandy  <jimb@redhat.com>
  52
  53         Add support for the Renesas M32C and M16C.
  54         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
  55         * m32c-desc.h, m32c-opc.h: New.
  56         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
  57         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
  58         m32c-opc.c.
  59         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
  60         m32c-ibld.lo, m32c-opc.lo.
  61         (CLEANFILES): List stamp-m32c.
  62         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
  63         (CGEN_CPUS): Add m32c.
  64         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
  65         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
  66         (m32c_opc_h): New variable.
  67         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
  68         (m32c-opc.lo): New rules.
  69         * Makefile.in: Regenerated.
  70         * configure.in: Add case for bfd_m32c_arch.
  71         * configure: Regenerated.
  72         * disassemble.c (ARCH_m32c): New.
  73         [ARCH_m32c]: #include "m32c-desc.h".
  74         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
  75         (disassemble_init_for_target) [ARCH_m32c]: Same.
  76
  77         * cgen-ops.h, cgen-types.h: New files.
  78         * Makefile.am (HFILES): List them.
  79         * Makefile.in: Regenerated.
  80
  81 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
  82
  83         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
  84         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
  85         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
  86         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
  87         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
  88         v850-dis.c: Fix format bugs.
  89         * ia64-gen.c (fail, warn): Add format attribute.
  90         * or32-opc.c (debug): Likewise.
  91
  92 2005-07-07  Khem Raj  <kraj@mvista.com>
  93
  94         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
  95         disassembly pattern.
  96
  97 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
  98
  99         * Makefile.am (stamp-m32r): Fix path to cpu files.
 100         (stamp-m32r, stamp-iq2000): Likewise.
 101         * Makefile.in: Regenerate.
 102         * m32r-asm.c: Regenerate.
 103         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 104         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 105
 106 2005-07-05  Nick Clifton  <nickc@redhat.com>
 107
 108         * iq2000-asm.c: Regenerate.
 109         * ms1-asm.c: Regenerate.
 110
 111 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 112
 113         * i386-dis.c (SVME_Fixup): New.
 114         (grps): Use it for the lidt entry.
 115         (PNI_Fixup): Call OP_M rather than OP_E.
 116         (INVLPG_Fixup): Likewise.
 117
 118 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 119
 120         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 121
 122 2005-07-01  Nick Clifton  <nickc@redhat.com>
 123
 124         * a29k-dis.c: Update to ISO C90 style function declarations and
 125         fix formatting.
 126         * alpha-opc.c: Likewise.
 127         * arc-dis.c: Likewise.
 128         * arc-opc.c: Likewise.
 129         * avr-dis.c: Likewise.
 130         * cgen-asm.in: Likewise.
 131         * cgen-dis.in: Likewise.
 132         * cgen-ibld.in: Likewise.
 133         * cgen-opc.c: Likewise.
 134         * cris-dis.c: Likewise.
 135         * d10v-dis.c: Likewise.
 136         * d30v-dis.c: Likewise.
 137         * d30v-opc.c: Likewise.
 138         * dis-buf.c: Likewise.
 139         * dlx-dis.c: Likewise.
 140         * h8300-dis.c: Likewise.
 141         * h8500-dis.c: Likewise.
 142         * hppa-dis.c: Likewise.
 143         * i370-dis.c: Likewise.
 144         * i370-opc.c: Likewise.
 145         * m10200-dis.c: Likewise.
 146         * m10300-dis.c: Likewise.
 147         * m68k-dis.c: Likewise.
 148         * m88k-dis.c: Likewise.
 149         * mips-dis.c: Likewise.
 150         * mmix-dis.c: Likewise.
 151         * msp430-dis.c: Likewise.
 152         * ns32k-dis.c: Likewise.
 153         * or32-dis.c: Likewise.
 154         * or32-opc.c: Likewise.
 155         * pdp11-dis.c: Likewise.
 156         * pj-dis.c: Likewise.
 157         * s390-dis.c: Likewise.
 158         * sh-dis.c: Likewise.
 159         * sh64-dis.c: Likewise.
 160         * sparc-dis.c: Likewise.
 161         * sparc-opc.c: Likewise.
 162         * sysdep.h: Likewise.
 163         * tic30-dis.c: Likewise.
 164         * tic4x-dis.c: Likewise.
 165         * tic80-dis.c: Likewise.
 166         * v850-dis.c: Likewise.
 167         * v850-opc.c: Likewise.
 168         * vax-dis.c: Likewise.
 169         * w65-dis.c: Likewise.
 170         * z8kgen.c: Likewise.
 171
 172         * fr30-*: Regenerate.
 173         * frv-*: Regenerate.
 174         * ip2k-*: Regenerate.
 175         * iq2000-*: Regenerate.
 176         * m32r-*: Regenerate.
 177         * ms1-*: Regenerate.
 178         * openrisc-*: Regenerate.
 179         * xstormy16-*: Regenerate.
 180
 181 2005-06-23  Ben Elliston  <bje@gnu.org>
 182
 183         * m68k-dis.c: Use ISC C90.
 184         * m68k-opc.c: Formatting fixes.
 185
 186 2005-06-16  David Ung  <davidu@mips.com>
 187
 188         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 189         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 190
 191 2005-06-15  Dave Brolley  <brolley@redhat.com>
 192
 193         Contribute Morpho ms1 on behalf of Red Hat
 194         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 195         ms1-opc.h: New files, Morpho ms1 target.
 196
 197         2004-05-14  Stan Cox  <scox@redhat.com>
 198
 199         * disassemble.c (ARCH_ms1): Define.
 200         (disassembler): Handle bfd_arch_ms1
 201
 202         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 203
 204         * Makefile.am, Makefile.in: Add ms1 target.
 205         * configure.in: Ditto.
 206
 207 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 208
 209         * arm-opc.h: Delete; fold contents into ...
 210         * arm-dis.c: ... here.  Move includes of internal COFF headers
 211         next to includes of internal ELF headers.
 212         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 213         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 214         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 215         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 216         (iwmmxt_wwnames, iwmmxt_wwssnames):
 217         Make const.
 218         (regnames): Remove iWMMXt coprocessor register sets.
 219         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 220         (get_arm_regnames): Adjust fourth argument to match above changes.
 221         (set_iwmmxt_regnames): Delete.
 222         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 223         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 224         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 225         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 226         ISO syntax for function pointer calls.
 227
 228 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 229
 230         * arm-dis.c: Split up the comments describing the format codes, so
 231         that the ARM and 16-bit Thumb opcode tables each have comments
 232         preceding them that describe all the codes, and only the codes,
 233         valid in those tables.  (32-bit Thumb table is already like this.)
 234         Reorder the lists in all three comments to match the order in
 235         which the codes are implemented.
 236         Remove all forward declarations of static functions.  Convert all
 237         function definitions to ISO C format.
 238         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 239         Return nothing.
 240         (print_insn_thumb16): Remove unused case 'I'.
 241         (print_insn): Update for changed calling convention of subroutines.
 242
 243 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 244
 245         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 246         hex (but retain it being displayed as signed). Remove redundant
 247         checks. Add handling of displacements for 16-bit addressing in Intel
 248         mode.
 249
 250 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 251
 252         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 253         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 254         masking of 'rm' in 16-bit memory address handling.
 255
 256 2005-05-19  Anton Blanchard  <anton@samba.org>
 257
 258         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 259         (print_ppc_disassembler_options): Document it.
 260         * ppc-opc.c (SVC_LEV): Define.
 261         (LEV): Allow optional operand.
 262         (POWER5): Define.
 263         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 264         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 265
 266 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 267
 268         * Makefile.in:  Regenerate.
 269
 270 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 271
 272         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 273         instructions.  Adjust disassembly of some opcodes to match
 274         unified syntax.
 275         (thumb32_opcodes): New table.
 276         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 277         two-halfword branches here.
 278         (print_insn_thumb32): New function.
 279         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 280         and print_insn_thumb32.  Be consistent about order of
 281         halfwords when printing 32-bit instructions.
 282
 283 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 284
 285         PR 843
 286         * i386-dis.c (branch_v_mode): New.
 287         (indirEv): Use branch_v_mode instead of v_mode.
 288         (OP_E): Handle branch_v_mode.
 289
 290 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 291
 292         * d10v-dis.c (dis_2_short): Support 64bit host.
 293
 294 2005-05-07  Nick Clifton  <nickc@redhat.com>
 295
 296         * po/nl.po: Updated translation.
 297
 298 2005-05-07  Nick Clifton  <nickc@redhat.com>
 299
 300         * Update the address and phone number of the FSF organization in
 301         the GPL notices in the following files:
 302         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 303         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 304         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 305         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 306         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 307         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 308         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 309         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 310         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 311         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 312         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 313         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 314         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 315         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 316         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 317         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 318         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 319         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 320         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 321         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 322         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 323         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 324         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 325         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 326         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 327         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 328         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 329         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 330         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 331         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 332         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 333         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 334         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 335
 336 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 337
 338         * ia64-opc.c: Include sysdep.h before libiberty.h.
 339
 340 2005-05-05  Nick Clifton  <nickc@redhat.com>
 341
 342         * configure.in (ALL_LINGUAS): Add vi.
 343         * configure: Regenerate.
 344         * po/vi.po: New.
 345
 346 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 347
 348         * configure.in: Fix the check for basename declaration.
 349         * configure: Regenerate.
 350
 351 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 352
 353         * ppc-opc.c (RTO): Define.
 354         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 355         entries to suit PPC440.
 356
 357 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 358
 359         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 360         Add xcrypt-ctr.
 361
 362 2005-04-14  Nick Clifton  <nickc@redhat.com>
 363
 364         * po/fi.po: New translation: Finnish.
 365         * configure.in (ALL_LINGUAS): Add fi.
 366         * configure: Regenerate.
 367
 368 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 369
 370         * Makefile.am (NO_WERROR): Define.
 371         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 372         * Makefile.in: Regenerate.
 373         * aclocal.m4: Regenerate.
 374         * configure: Regenerate.
 375
 376 2005-04-04  Nick Clifton  <nickc@redhat.com>
 377
 378         * fr30-asm.c: Regenerate.
 379         * frv-asm.c: Regenerate.
 380         * iq2000-asm.c: Regenerate.
 381         * m32r-asm.c: Regenerate.
 382         * openrisc-asm.c: Regenerate.
 383
 384 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 385
 386         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 387         visible operands in Intel mode. The first operand of monitor is
 388         %rax in 64-bit mode.
 389
 390 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 391
 392         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 393         easier future additions.
 394
 395 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 396
 397         * configure.in: Check for basename.
 398         * configure: Regenerate.
 399         * config.in: Ditto.
 400
 401 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 402
 403         * i386-dis.c (SEG_Fixup): New.
 404         (Sv): New.
 405         (dis386): Use "Sv" for 0x8c and 0x8e.
 406
 407 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 408             Nick Clifton  <nickc@redhat.com>
 409
 410         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 411         function entry mask addresses.
 412         (entry_addr_occupied_slots): New variable: The number of occupied
 413         elements in entry_addr.
 414         (entry_addr_total_slots): New variable: The total number of
 415         elements in entry_addr.
 416         (parse_disassembler_options): New function.  Fills in the entry_addr
 417         array.
 418         (free_entry_array): New function.  Release the memory used by the
 419         entry addr array.  Suppressed because there is no way to call it.
 420         (is_function_entry): Check if a given address is a function's
 421         start address by looking at supplied entry mask addresses and
 422         symbol information, if available.
 423         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 424
 425 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 426
 427         * cris-dis.c (print_with_operands): Use ~31L for long instead
 428         of ~31.
 429
 430 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 431
 432         * mmix-opc.c (O): Revert the last change.
 433         (Z): Likewise.
 434
 435 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 436
 437         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 438         (Z): Likewise.
 439
 440 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 441
 442         * mmix-opc.c (O, Z): Force expression as unsigned long.
 443
 444 2005-03-18  Nick Clifton  <nickc@redhat.com>
 445
 446         * ip2k-asm.c: Regenerate.
 447         * op/opcodes.pot: Regenerate.
 448
 449 2005-03-16  Nick Clifton  <nickc@redhat.com>
 450             Ben Elliston  <bje@au.ibm.com>
 451
 452         * configure.in (werror): New switch: Add -Werror to the
 453         compiler command line.  Enabled by default.  Disable via
 454         --disable-werror.
 455         * configure: Regenerate.
 456
 457 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 458
 459         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 460         BOOKE.
 461
 462 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 463
 464         * po/es.po: Commit new Spanish translation.
 465
 466         * po/fr.po: Commit new French translation.
 467
 468 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 469
 470         * vax-dis.c: Fix spelling error
 471         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 472         of just "Entry mask: < r1 ... >"
 473
 474 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 475
 476         * arm-dis.c (arm_opcodes): Document %E and %V.
 477         Add entries for v6T2 ARM instructions:
 478         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 479         (print_insn_arm): Add support for %E and %V.
 480         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 481
 482 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 483             Alan Modra  <amodra@bigpond.net.au>
 484
 485         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 486         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 487         (SPRG_MASK): Delete.
 488         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 489         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 490         mfsprg4..7 after msprg and consolidate.
 491
 492 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 493
 494         * vax-dis.c (entry_mask_bit): New array.
 495         (print_insn_vax): Decode function entry mask.
 496
 497 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 498
 499         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 500
 501 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 502
 503         * po/opcodes.pot: Regenerate.
 504
 505 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 506
 507         * arc-dis.c (a4_decoding_class): New enum.
 508         (dsmOneArcInst): Use the enum values for the decoding class.
 509         Remove redundant case in the switch for decodingClass value 11.
 510
 511 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 512
 513         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 514         accesses.
 515         (OP_C): Consider lock prefix in non-64-bit modes.
 516
 517 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 518
 519         * cris-dis.c (format_hex): Remove ineffective warning fix.
 520         * crx-dis.c (make_instruction): Warning fix.
 521         * frv-asm.c: Regenerate.
 522
 523 2005-02-23  Nick Clifton  <nickc@redhat.com>
 524
 525         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 526         read_memory.
 527
 528         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 529
 530         * crx-dis.c (make_instruction): Move argument structure into inner
 531         scope and ensure that all of its fields are initialised before
 532         they are used.
 533
 534         * fr30-asm.c: Regenerate.
 535         * fr30-dis.c: Regenerate.
 536         * frv-asm.c: Regenerate.
 537         * frv-dis.c: Regenerate.
 538         * ip2k-asm.c: Regenerate.
 539         * ip2k-dis.c: Regenerate.
 540         * iq2000-asm.c: Regenerate.
 541         * iq2000-dis.c: Regenerate.
 542         * m32r-asm.c: Regenerate.
 543         * m32r-dis.c: Regenerate.
 544         * openrisc-asm.c: Regenerate.
 545         * openrisc-dis.c: Regenerate.
 546         * xstormy16-asm.c: Regenerate.
 547         * xstormy16-dis.c: Regenerate.
 548
 549 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 550
 551         * arc-ext.c: Warning fixes.
 552         * arc-ext.h: Likewise.
 553         * cgen-opc.c: Likewise.
 554         * ia64-gen.c: Likewise.
 555         * maxq-dis.c: Likewise.
 556         * ns32k-dis.c: Likewise.
 557         * w65-dis.c: Likewise.
 558         * ia64-asmtab.c: Regenerate.
 559
 560 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 561
 562         * fr30-desc.c: Regenerate.
 563         * fr30-desc.h: Regenerate.
 564         * fr30-opc.c: Regenerate.
 565         * fr30-opc.h: Regenerate.
 566         * frv-desc.c: Regenerate.
 567         * frv-desc.h: Regenerate.
 568         * frv-opc.c: Regenerate.
 569         * frv-opc.h: Regenerate.
 570         * ip2k-desc.c: Regenerate.
 571         * ip2k-desc.h: Regenerate.
 572         * ip2k-opc.c: Regenerate.
 573         * ip2k-opc.h: Regenerate.
 574         * iq2000-desc.c: Regenerate.
 575         * iq2000-desc.h: Regenerate.
 576         * iq2000-opc.c: Regenerate.
 577         * iq2000-opc.h: Regenerate.
 578         * m32r-desc.c: Regenerate.
 579         * m32r-desc.h: Regenerate.
 580         * m32r-opc.c: Regenerate.
 581         * m32r-opc.h: Regenerate.
 582         * m32r-opinst.c: Regenerate.
 583         * openrisc-desc.c: Regenerate.
 584         * openrisc-desc.h: Regenerate.
 585         * openrisc-opc.c: Regenerate.
 586         * openrisc-opc.h: Regenerate.
 587         * xstormy16-desc.c: Regenerate.
 588         * xstormy16-desc.h: Regenerate.
 589         * xstormy16-opc.c: Regenerate.
 590         * xstormy16-opc.h: Regenerate.
 591
 592 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 593
 594         * Makefile.am: Run "make dep-am"
 595         * Makefile.in: Regenerate.
 596
 597 2005-02-15  Nick Clifton  <nickc@redhat.com>
 598
 599         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 600         compile time warnings.
 601         (print_keyword): Likewise.
 602         (default_print_insn): Likewise.
 603
 604         * fr30-desc.c: Regenerated.
 605         * fr30-desc.h: Regenerated.
 606         * fr30-dis.c: Regenerated.
 607         * fr30-opc.c: Regenerated.
 608         * fr30-opc.h: Regenerated.
 609         * frv-desc.c: Regenerated.
 610         * frv-dis.c: Regenerated.
 611         * frv-opc.c: Regenerated.
 612         * ip2k-asm.c: Regenerated.
 613         * ip2k-desc.c: Regenerated.
 614         * ip2k-desc.h: Regenerated.
 615         * ip2k-dis.c: Regenerated.
 616         * ip2k-opc.c: Regenerated.
 617         * ip2k-opc.h: Regenerated.
 618         * iq2000-desc.c: Regenerated.
 619         * iq2000-dis.c: Regenerated.
 620         * iq2000-opc.c: Regenerated.
 621         * m32r-asm.c: Regenerated.
 622         * m32r-desc.c: Regenerated.
 623         * m32r-desc.h: Regenerated.
 624         * m32r-dis.c: Regenerated.
 625         * m32r-opc.c: Regenerated.
 626         * m32r-opc.h: Regenerated.
 627         * m32r-opinst.c: Regenerated.
 628         * openrisc-desc.c: Regenerated.
 629         * openrisc-desc.h: Regenerated.
 630         * openrisc-dis.c: Regenerated.
 631         * openrisc-opc.c: Regenerated.
 632         * openrisc-opc.h: Regenerated.
 633         * xstormy16-desc.c: Regenerated.
 634         * xstormy16-desc.h: Regenerated.
 635         * xstormy16-dis.c: Regenerated.
 636         * xstormy16-opc.c: Regenerated.
 637         * xstormy16-opc.h: Regenerated.
 638
 639 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 640
 641         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 642         address.
 643
 644 2005-02-11  Nick Clifton  <nickc@redhat.com>
 645
 646         * iq2000-asm.c: Regenerate.
 647
 648         * frv-dis.c: Regenerate.
 649
 650 2005-02-07  Jim Blandy  <jimb@redhat.com>
 651
 652         * Makefile.am (CGEN): Load guile.scm before calling the main
 653         application script.
 654         * Makefile.in: Regenerated.
 655         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 656         Simply pass the cgen-opc.scm path to ${cgen} as its first
 657         argument; ${cgen} itself now contains the '-s', or whatever is
 658         appropriate for the Scheme being used.
 659
 660 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 661
 662         * configure: Regenerate to track ../gettext.m4.
 663
 664 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 665
 666         * ia64-gen.c (NELEMS): Define.
 667         (shrink): Generate alias with missing second predicate register when
 668         opcode has two outputs and these are both predicates.
 669         * ia64-opc-i.c (FULL17): Define.
 670         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 671         here to generate output template.
 672         (TBITCM, TNATCM): Undefine after use.
 673         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 674         first input. Add ld16 aliases without ar.csd as second output. Add
 675         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 676         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 677         ar.ccv as third/fourth inputs. Consolidate through...
 678         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 679         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 680         * ia64-asmtab.c: Regenerate.
 681
 682 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 683
 684         * configure: Regenerate to track ../gettext.m4 change.
 685
 686 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 687
 688         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 689         * frv-asm.c: Rebuilt.
 690         * frv-desc.c: Rebuilt.
 691         * frv-desc.h: Rebuilt.
 692         * frv-dis.c: Rebuilt.
 693         * frv-ibld.c: Rebuilt.
 694         * frv-opc.c: Rebuilt.
 695         * frv-opc.h: Rebuilt.
 696
 697 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 698
 699         * configure: Regenerate, ../gettext.m4 was updated.
 700
 701 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 702
 703         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 704         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 705         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 706         * mips-dis.c: Ditto.
 707
 708 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 709
 710         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 711
 712 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 713
 714         * mips-dis.c (no_aliases): New disassembly option flag.
 715         (set_default_mips_dis_options): Init no_aliases to zero.
 716         (parse_mips_dis_option): Handle no-aliases option.
 717         (print_insn_mips): Ignore table entries that are aliases
 718         if no_aliases is set.
 719         (print_insn_mips16): Ditto.
 720         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 721         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 722         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 723         * mips16-opc.c (mips16_opcodes): Ditto.
 724
 725 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 726
 727         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 728         (inheritance diagram): Add missing edge.
 729         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 730         easier for the testsuite.
 731         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 732         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 733         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 734         arch_sh2a_or_sh4_up child.
 735         (sh_table): Do renaming as above.
 736         Correct comment for ldc.l for gas testsuite to read.
 737         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 738         Correct comments for movy.w and movy.l for gas testsuite to read.
 739         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 740
 741 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 744
 745 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 746
 747         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 748
 749 2005-01-10  Andreas Schwab  <schwab@suse.de>
 750
 751         * disassemble.c (disassemble_init_for_target) <case
 752         bfd_arch_ia64>: Set skip_zeroes to 16.
 753         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 754
 755 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 756
 757         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 758
 759 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 760
 761         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 762         memory references. Convert avr_operand() to C90 formatting.
 763
 764 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 765
 766         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 767
 768 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 769
 770         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 771         (no_op_insn): Initialize array with instructions that have no
 772         operands.
 773         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 774
 775 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 776
 777         * arm-dis.c: Correct top-level comment.
 778
 779 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 780
 781         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 782         architecuture defining the insn.
 783         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 784         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 785         field.
 786         Also include opcode/arm.h.
 787         * Makefile.am (arm-dis.lo): Update dependency list.
 788         * Makefile.in: Regenerate.
 789
 790 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 791
 792         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 793         reflect the change to the short immediate syntax.
 794
 795 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 796
 797         * or32-opc.c (debug): Warning fix.
 798         * po/POTFILES.in: Regenerate.
 799
 800         * maxq-dis.c: Formatting.
 801         (print_insn): Warning fix.
 802
 803 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 804
 805         * arm-dis.c (WORD_ADDRESS): Define.
 806         (print_insn): Use it.  Correct big-endian end-of-section handling.
 807
 808 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 809             Vineet Sharma      <vineets@noida.hcltech.com>
 810
 811         * maxq-dis.c: New file.
 812         * disassemble.c (ARCH_maxq): Define.
 813         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 814         instructions..
 815         * configure.in: Add case for bfd_maxq_arch.
 816         * configure: Regenerate.
 817         * Makefile.am: Add support for maxq-dis.c
 818         * Makefile.in: Regenerate.
 819         * aclocal.m4: Regenerate.
 820
 821 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 822
 823         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 824         mode.
 825         * crx-dis.c: Likewise.
 826
 827 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 828
 829         Generally, handle CRISv32.
 830         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 831         (struct cris_disasm_data): New type.
 832         (format_reg, format_hex, cris_constraint, print_flags)
 833         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 834         callers changed.
 835         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 836         (print_insn_crisv32_without_register_prefix)
 837         (print_insn_crisv10_v32_with_register_prefix)
 838         (print_insn_crisv10_v32_without_register_prefix)
 839         (cris_parse_disassembler_options): New functions.
 840         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 841         parameter.  All callers changed.
 842         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 843         failure.
 844         (cris_constraint) <case 'Y', 'U'>: New cases.
 845         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 846         for constraint 'n'.
 847         (print_with_operands) <case 'Y'>: New case.
 848         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 849         <case 'N', 'Y', 'Q'>: New cases.
 850         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 851         (print_insn_cris_with_register_prefix)
 852         (print_insn_cris_without_register_prefix): Call
 853         cris_parse_disassembler_options.
 854         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 855         for CRISv32 and the size of immediate operands.  New v32-only
 856         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 857         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 858         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 859         Change brp to be v3..v10.
 860         (cris_support_regs): New vector.
 861         (cris_opcodes): Update head comment.  New format characters '[',
 862         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 863         Add new opcodes for v32 and adjust existing opcodes to accommodate
 864         differences to earlier variants.
 865         (cris_cond15s): New vector.
 866
 867 2004-11-04 Jan Beulich <jbeulich@novell.com>
 868
 869         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 870         (indirEb): Remove.
 871         (Mp): Use f_mode rather than none at all.
 872         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 873         replaces what previously was x_mode; x_mode now means 128-bit SSE
 874         operands.
 875         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 876         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 877         pinsrw's second operand is Edqw.
 878         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 879         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 880         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 881         mode when an operand size override is present or always suffixing.
 882         More instructions will need to be added to this group.
 883         (putop): Handle new macro chars 'C' (short/long suffix selector),
 884         'I' (Intel mode override for following macro char), and 'J' (for
 885         adding the 'l' prefix to far branches in AT&T mode). When an
 886         alternative was specified in the template, honor macro character when
 887         specified for Intel mode.
 888         (OP_E): Handle new *_mode values. Correct pointer specifications for
 889         memory operands. Consolidate output of index register.
 890         (OP_G): Handle new *_mode values.
 891         (OP_I): Handle const_1_mode.
 892         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 893         respective opcode prefix bits have been consumed.
 894         (OP_EM, OP_EX): Provide some default handling for generating pointer
 895         specifications.
 896
 897 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 898
 899         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 900         COP_INST macro.
 901
 902 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 903
 904         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 905         (getregliststring): Support HI/LO and user registers.
 906         * crx-opc.c (crx_instruction): Update data structure according to the
 907         rearrangement done in CRX opcode header file.
 908         (crx_regtab):  Likewise.
 909         (crx_optab):  Likewise.
 910         (crx_instruction): Reorder load/stor instructions, remove unsupported
 911         formats.
 912         support new Co-Processor instruction 'cpi'.
 913
 914 2004-10-27  Nick Clifton  <nickc@redhat.com>
 915
 916         * opcodes/iq2000-asm.c: Regenerate.
 917         * opcodes/iq2000-desc.c: Regenerate.
 918         * opcodes/iq2000-desc.h: Regenerate.
 919         * opcodes/iq2000-dis.c: Regenerate.
 920         * opcodes/iq2000-ibld.c: Regenerate.
 921         * opcodes/iq2000-opc.c: Regenerate.
 922         * opcodes/iq2000-opc.h: Regenerate.
 923
 924 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 925
 926         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 927         us4, us5 (respectively).
 928         Remove unsupported 'popa' instruction.
 929         Reverse operands order in store co-processor instructions.
 930
 931 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 932
 933         * Makefile.am: Run "make dep-am"
 934         * Makefile.in: Regenerate.
 935
 936 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 937
 938         * xtensa-dis.c: Use ISO C90 formatting.
 939
 940 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 941
 942         * ppc-opc.c: Revert 2004-09-09 change.
 943
 944 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 945
 946         * xtensa-dis.c (state_names): Delete.
 947         (fetch_data): Use xtensa_isa_maxlength.
 948         (print_xtensa_operand): Replace operand parameter with opcode/operand
 949         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 950         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 951         instruction bundles.  Use xmalloc instead of malloc.
 952
 953 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 954
 955         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 956         initializers.
 957
 958 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 959
 960         * crx-opc.c (crx_instruction): Support Co-processor insns.
 961         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 962         (getregliststring): Change function to use the above enum.
 963         (print_arg): Handle CO-Processor insns.
 964         (crx_cinvs): Add 'b' option to invalidate the branch-target
 965         cache.
 966
 967 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 968
 969         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 970         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 971         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 972         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 973         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 974
 975 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 976
 977         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 978         rather than add it.
 979
 980 2004-09-30  Paul Brook  <paul@codesourcery.com>
 981
 982         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 983         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 984
 985 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 986
 987         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 988         (CONFIG_STATUS_DEPENDENCIES): New.
 989         (Makefile): Removed.
 990         (config.status): Likewise.
 991         * Makefile.in: Regenerated.
 992
 993 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 994
 995         * Makefile.am: Run "make dep-am".
 996         * Makefile.in: Regenerate.
 997         * aclocal.m4: Regenerate.
 998         * configure: Regenerate.
 999         * po/POTFILES.in: Regenerate.
1000         * po/opcodes.pot: Regenerate.
1001
1002 2004-09-11  Andreas Schwab  <schwab@suse.de>
1003
1004         * configure: Rebuild.
1005
1006 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1007
1008         * ppc-opc.c (L): Make this field not optional.
1009
1010 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1011
1012         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1013         Fix parameter to 'm[t|f]csr' insns.
1014
1015 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1016
1017         * configure.in: Autoupdate to autoconf 2.59.
1018         * aclocal.m4: Rebuild with aclocal 1.4p6.
1019         * configure: Rebuild with autoconf 2.59.
1020         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1021         bfd changes for autoconf 2.59 on the way).
1022         * config.in: Rebuild with autoheader 2.59.
1023
1024 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1025
1026         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1027
1028 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1029
1030         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1031         (GRPPADLCK2): New define.
1032         (twobyte_has_modrm): True for 0xA6.
1033         (grps): GRPPADLCK2 for opcode 0xA6.
1034
1035 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1036
1037         Introduce SH2a support.
1038         * sh-opc.h (arch_sh2a_base): Renumber.
1039         (arch_sh2a_nofpu_base): Remove.
1040         (arch_sh_base_mask): Adjust.
1041         (arch_opann_mask): New.
1042         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1043         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1044         (sh_table): Adjust whitespace.
1045         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1046         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1047         instruction list throughout.
1048         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1049         of arch_sh2a in instruction list throughout.
1050         (arch_sh2e_up): Accomodate above changes.
1051         (arch_sh2_up): Ditto.
1052         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1053         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1054         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1055         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1056         * sh-opc.h (arch_sh2a_nofpu): New.
1057         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1058         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1059         instruction.
1060         2004-01-20  DJ Delorie  <dj@redhat.com>
1061         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1062         2003-12-29  DJ Delorie  <dj@redhat.com>
1063         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1064         sh_opcode_info, sh_table): Add sh2a support.
1065         (arch_op32): New, to tag 32-bit opcodes.
1066         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1067         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1068         * sh-opc.h (arch_sh2a): Add.
1069         * sh-dis.c (arch_sh2a): Handle.
1070         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1071
1072 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1073
1074         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1075
1076 2004-07-22  Nick Clifton  <nickc@redhat.com>
1077
1078         PR/280
1079         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1080         insns - this is done by objdump itself.
1081         * h8500-dis.c (print_insn_h8500): Likewise.
1082
1083 2004-07-21  Jan Beulich <jbeulich@novell.com>
1084
1085         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1086         regardless of address size prefix in effect.
1087         (ptr_reg): Size or address registers does not depend on rex64, but
1088         on the presence of an address size override.
1089         (OP_MMX): Use rex.x only for xmm registers.
1090         (OP_EM): Use rex.z only for xmm registers.
1091
1092 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1093
1094         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1095         move/branch operations to the bottom so that VR5400 multimedia
1096         instructions take precedence in disassembly.
1097
1098 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1099
1100         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1101         ISA-specific "break" encoding.
1102
1103 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1104
1105         * arm-opc.h: Fix typo in comment.
1106
1107 2004-07-11  Andreas Schwab  <schwab@suse.de>
1108
1109         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1110
1111 2004-07-09  Andreas Schwab  <schwab@suse.de>
1112
1113         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1114
1115 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1116
1117         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1118         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1119         (crx-dis.lo): New target.
1120         (crx-opc.lo): Likewise.
1121         * Makefile.in: Regenerate.
1122         * configure.in: Handle bfd_crx_arch.
1123         * configure: Regenerate.
1124         * crx-dis.c: New file.
1125         * crx-opc.c: New file.
1126         * disassemble.c (ARCH_crx): Define.
1127         (disassembler): Handle ARCH_crx.
1128
1129 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1130
1131         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1132         * ia64-asmtab.c: Regnerate.
1133
1134 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1135
1136         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1137         (extract_fxm): Don't test dialect.
1138         (XFXFXM_MASK): Include the power4 bit.
1139         (XFXM): Add p4 param.
1140         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1141
1142 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1143
1144         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1145         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1146
1147 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1148
1149         * ppc-opc.c (BH, XLBH_MASK): Define.
1150         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1151
1152 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1153
1154         * i386-dis.c (x_mode): Comment.
1155         (two_source_ops): File scope.
1156         (float_mem): Correct fisttpll and fistpll.
1157         (float_mem_mode): New table.
1158         (dofloat): Use it.
1159         (OP_E): Correct intel mode PTR output.
1160         (ptr_reg): Use open_char and close_char.
1161         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1162         operands.  Set two_source_ops.
1163
1164 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1165
1166         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1167         instead of _raw_size.
1168
1169 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1170
1171         * ia64-gen.c (in_iclass): Handle more postinc st
1172         and ld variants.
1173         * ia64-asmtab.c: Rebuilt.
1174
1175 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1176
1177         * s390-opc.txt: Correct architecture mask for some opcodes.
1178         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1179         in the esa mode as well.
1180
1181 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1182
1183         * sh-dis.c (target_arch): Make unsigned.
1184         (print_insn_sh): Replace (most of) switch with a call to
1185         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1186         * sh-opc.h: Redefine architecture flags values.
1187         Add sh3-nommu architecture.
1188         Reorganise <arch>_up macros so they make more visual sense.
1189         (SH_MERGE_ARCH_SET): Define new macro.
1190         (SH_VALID_BASE_ARCH_SET): Likewise.
1191         (SH_VALID_MMU_ARCH_SET): Likewise.
1192         (SH_VALID_CO_ARCH_SET): Likewise.
1193         (SH_VALID_ARCH_SET): Likewise.
1194         (SH_MERGE_ARCH_SET_VALID): Likewise.
1195         (SH_ARCH_SET_HAS_FPU): Likewise.
1196         (SH_ARCH_SET_HAS_DSP): Likewise.
1197         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1198         (sh_get_arch_from_bfd_mach): Add prototype.
1199         (sh_get_arch_up_from_bfd_mach): Likewise.
1200         (sh_get_bfd_mach_from_arch_set): Likewise.
1201         (sh_merge_bfd_arc): Likewise.
1202
1203 2004-05-24  Peter Barada  <peter@the-baradas.com>
1204
1205         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1206         into new match_insn_m68k function.  Loop over canidate
1207         matches and select first that completely matches.
1208         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1209         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1210         to verify addressing for MAC/EMAC.
1211         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1212         reigster halves since 'fpu' and 'spl' look misleading.
1213         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1214         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1215         first, tighten up match masks.
1216         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1217         'size' from special case code in print_insn_m68k to
1218         determine decode size of insns.
1219
1220 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1221
1222         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1223         well as when -mpower4.
1224
1225 2004-05-13  Nick Clifton  <nickc@redhat.com>
1226
1227         * po/fr.po: Updated French translation.
1228
1229 2004-05-05  Peter Barada  <peter@the-baradas.com>
1230
1231         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1232         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1233         * m68k-op.c: Switch from ColdFire chips to core variants.
1234
1235 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1236
1237         PR 147.
1238         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1239
1240 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1241
1242         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1243         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1244
1245 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1246
1247         * sh-dis.c (print_insn_sh): Print the value in constant pool
1248         as a symbol if it looks like a symbol.
1249
1250 2004-04-22  Peter Barada <peter@the-baradas.com>
1251
1252         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1253         appropriate ColdFire architectures.
1254         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1255         mask addressing.
1256         Add EMAC instructions, fix MAC instructions. Remove
1257         macmw/macml/msacmw/msacml instructions since mask addressing now
1258         supported.
1259
1260 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1261
1262         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1263         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1264         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1265         macro.  Adjust all users.
1266
1267 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1268
1269         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1270         separately.
1271
1272 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1273
1274         * m32r-asm.c: Regenerate.
1275
1276 2004-03-29  Stan Shebs  <shebs@apple.com>
1277
1278         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1279         used.
1280
1281 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1282
1283         * aclocal.m4: Regenerate.
1284         * config.in: Regenerate.
1285         * configure: Regenerate.
1286         * po/POTFILES.in: Regenerate.
1287         * po/opcodes.pot: Regenerate.
1288
1289 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1290
1291         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1292         PPC_OPERANDS_GPR_0.
1293         * ppc-opc.c (RA0): Define.
1294         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1295         (RAOPT): Rename from RAO.  Update all uses.
1296         (powerpc_opcodes): Use RA0 as appropriate.
1297
1298 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1299
1300         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1301
1302 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1303
1304         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1305
1306 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1307
1308         * i386-dis.c (GRPPLOCK): Delete.
1309         (grps): Delete GRPPLOCK entry.
1310
1311 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1312
1313         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1314         (M, Mp): Use OP_M.
1315         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1316         (GRPPADLCK): Define.
1317         (dis386): Use NOP_Fixup on "nop".
1318         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1319         (twobyte_has_modrm): Set for 0xa7.
1320         (padlock_table): Delete.  Move to..
1321         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1322         and clflush.
1323         (print_insn): Revert PADLOCK_SPECIAL code.
1324         (OP_E): Delete sfence, lfence, mfence checks.
1325
1326 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1327
1328         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1329         (INVLPG_Fixup): New function.
1330         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1331
1332 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1333
1334         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1335         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1336         (padlock_table): New struct with PadLock instructions.
1337         (print_insn): Handle PADLOCK_SPECIAL.
1338
1339 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1340
1341         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1342         (OP_E): Twiddle clflush to sfence here.
1343
1344 2004-03-08  Nick Clifton  <nickc@redhat.com>
1345
1346         * po/de.po: Updated German translation.
1347
1348 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1349
1350         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1351         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1352         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1353         accordingly.
1354
1355 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1356
1357         * frv-asm.c: Regenerate.
1358         * frv-desc.c: Regenerate.
1359         * frv-desc.h: Regenerate.
1360         * frv-dis.c: Regenerate.
1361         * frv-ibld.c: Regenerate.
1362         * frv-opc.c: Regenerate.
1363         * frv-opc.h: Regenerate.
1364
1365 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1366
1367         * frv-desc.c, frv-opc.c: Regenerate.
1368
1369 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1370
1371         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1372
1373 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1374
1375         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1376         Also correct mistake in the comment.
1377
1378 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1379
1380         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1381         ensure that double registers have even numbers.
1382         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1383         that reserved instruction 0xfffd does not decode the same
1384         as 0xfdfd (ftrv).
1385         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1386         REG_N refers to a double register.
1387         Add REG_N_B01 nibble type and use it instead of REG_NM
1388         in ftrv.
1389         Adjust the bit patterns in a few comments.
1390
1391 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1392
1393         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1394
1395 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1396
1397         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1398
1399 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1400
1401         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1402
1403 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1404
1405         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1406         mtivor32, mtivor33, mtivor34.
1407
1408 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1409
1410         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1411
1412 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1413
1414         * arm-opc.h Maverick accumulator register opcode fixes.
1415
1416 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1417
1418         * m32r-dis.c: Regenerate.
1419
1420 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1421
1422         * sh-opc.h (sh_table): "fsrra", not "fssra".
1423
1424 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1425
1426         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1427         contraints.
1428
1429 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1430
1431         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1432
1433 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1434
1435         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1436         1.  Don't print scale factor on AT&T mode when index missing.
1437
1438 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1439
1440         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1441         when loaded into XR registers.
1442
1443 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1444
1445         * frv-desc.h: Regenerate.
1446         * frv-desc.c: Regenerate.
1447         * frv-opc.c: Regenerate.
1448
1449 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1450
1451         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1452
1453 2004-01-09  Paul Brook  <paul@codesourcery.com>
1454
1455         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1456         specific opcodes.
1457
1458 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1459
1460         * Makefile.am (libopcodes_la_DEPENDENCIES)
1461         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1462         comment about the problem.
1463         * Makefile.in: Regenerate.
1464
1465 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1466
1467         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1468         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1469         cut&paste errors in shifting/truncating numerical operands.
1470         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1471         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1472         (parse_uslo16): Likewise.
1473         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1474         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1475         (parse_s12): Likewise.
1476         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1477         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1478         (parse_uslo16): Likewise.
1479         (parse_uhi16): Parse gothi and gotfuncdeschi.
1480         (parse_d12): Parse got12 and gotfuncdesc12.
1481         (parse_s12): Likewise.
1482
1483 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1484
1485         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1486         instruction which looks similar to an 'rla' instruction.
1487
1488 For older changes see ChangeLog-0203
1489 \f
1490 Local Variables:
1491 mode: change-log
1492 left-margin: 8
1493 fill-column: 74
1494 version-control: never
1495 End: