opcodes/ChangeLog

   1 2005-03-16  Nick Clifton  <nickc@redhat.com>
   2             Ben Elliston  <bje@au.ibm.com>
   3
   4         * configure.in (werror): New switch: Add -Werror to the
   5         compiler command line.  Enabled by default.  Disable via
   6         --disable-werror.
   7         * configure: Regenerate.
   8
   9 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  10
  11         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  12         BOOKE.
  13
  14 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  15
  16         * po/es.po: Commit new Spanish translation.
  17
  18         * po/fr.po: Commit new French translation.
  19
  20 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  21
  22         * vax-dis.c: Fix spelling error
  23         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  24         of just "Entry mask: < r1 ... >"
  25
  26 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  27
  28         * arm-dis.c (arm_opcodes): Document %E and %V.
  29         Add entries for v6T2 ARM instructions:
  30         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  31         (print_insn_arm): Add support for %E and %V.
  32         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  33
  34 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  35             Alan Modra  <amodra@bigpond.net.au>
  36
  37         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  38         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  39         (SPRG_MASK): Delete.
  40         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  41         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  42         mfsprg4..7 after msprg and consolidate.
  43
  44 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  45
  46         * vax-dis.c (entry_mask_bit): New array.
  47         (print_insn_vax): Decode function entry mask.
  48
  49 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  50
  51         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  52
  53 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  54
  55         * po/opcodes.pot: Regenerate.
  56
  57 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  58
  59         * arc-dis.c (a4_decoding_class): New enum.
  60         (dsmOneArcInst): Use the enum values for the decoding class.
  61         Remove redundant case in the switch for decodingClass value 11.
  62
  63 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  64
  65         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  66         accesses.
  67         (OP_C): Consider lock prefix in non-64-bit modes.
  68
  69 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  70
  71         * cris-dis.c (format_hex): Remove ineffective warning fix.
  72         * crx-dis.c (make_instruction): Warning fix.
  73         * frv-asm.c: Regenerate.
  74
  75 2005-02-23  Nick Clifton  <nickc@redhat.com>
  76
  77         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  78         read_memory.
  79
  80         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  81
  82         * crx-dis.c (make_instruction): Move argument structure into inner
  83         scope and ensure that all of its fields are initialised before
  84         they are used.
  85
  86         * fr30-asm.c: Regenerate.
  87         * fr30-dis.c: Regenerate.
  88         * frv-asm.c: Regenerate.
  89         * frv-dis.c: Regenerate.
  90         * ip2k-asm.c: Regenerate.
  91         * ip2k-dis.c: Regenerate.
  92         * iq2000-asm.c: Regenerate.
  93         * iq2000-dis.c: Regenerate.
  94         * m32r-asm.c: Regenerate.
  95         * m32r-dis.c: Regenerate.
  96         * openrisc-asm.c: Regenerate.
  97         * openrisc-dis.c: Regenerate.
  98         * xstormy16-asm.c: Regenerate.
  99         * xstormy16-dis.c: Regenerate.
 100
 101 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 102
 103         * arc-ext.c: Warning fixes.
 104         * arc-ext.h: Likewise.
 105         * cgen-opc.c: Likewise.
 106         * ia64-gen.c: Likewise.
 107         * maxq-dis.c: Likewise.
 108         * ns32k-dis.c: Likewise.
 109         * w65-dis.c: Likewise.
 110         * ia64-asmtab.c: Regenerate.
 111
 112 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 113
 114         * fr30-desc.c: Regenerate.
 115         * fr30-desc.h: Regenerate.
 116         * fr30-opc.c: Regenerate.
 117         * fr30-opc.h: Regenerate.
 118         * frv-desc.c: Regenerate.
 119         * frv-desc.h: Regenerate.
 120         * frv-opc.c: Regenerate.
 121         * frv-opc.h: Regenerate.
 122         * ip2k-desc.c: Regenerate.
 123         * ip2k-desc.h: Regenerate.
 124         * ip2k-opc.c: Regenerate.
 125         * ip2k-opc.h: Regenerate.
 126         * iq2000-desc.c: Regenerate.
 127         * iq2000-desc.h: Regenerate.
 128         * iq2000-opc.c: Regenerate.
 129         * iq2000-opc.h: Regenerate.
 130         * m32r-desc.c: Regenerate.
 131         * m32r-desc.h: Regenerate.
 132         * m32r-opc.c: Regenerate.
 133         * m32r-opc.h: Regenerate.
 134         * m32r-opinst.c: Regenerate.
 135         * openrisc-desc.c: Regenerate.
 136         * openrisc-desc.h: Regenerate.
 137         * openrisc-opc.c: Regenerate.
 138         * openrisc-opc.h: Regenerate.
 139         * xstormy16-desc.c: Regenerate.
 140         * xstormy16-desc.h: Regenerate.
 141         * xstormy16-opc.c: Regenerate.
 142         * xstormy16-opc.h: Regenerate.
 143
 144 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 145
 146         * Makefile.am: Run "make dep-am"
 147         * Makefile.in: Regenerate.
 148
 149 2005-02-15  Nick Clifton  <nickc@redhat.com>
 150
 151         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 152         compile time warnings.
 153         (print_keyword): Likewise.
 154         (default_print_insn): Likewise.
 155
 156         * fr30-desc.c: Regenerated.
 157         * fr30-desc.h: Regenerated.
 158         * fr30-dis.c: Regenerated.
 159         * fr30-opc.c: Regenerated.
 160         * fr30-opc.h: Regenerated.
 161         * frv-desc.c: Regenerated.
 162         * frv-dis.c: Regenerated.
 163         * frv-opc.c: Regenerated.
 164         * ip2k-asm.c: Regenerated.
 165         * ip2k-desc.c: Regenerated.
 166         * ip2k-desc.h: Regenerated.
 167         * ip2k-dis.c: Regenerated.
 168         * ip2k-opc.c: Regenerated.
 169         * ip2k-opc.h: Regenerated.
 170         * iq2000-desc.c: Regenerated.
 171         * iq2000-dis.c: Regenerated.
 172         * iq2000-opc.c: Regenerated.
 173         * m32r-asm.c: Regenerated.
 174         * m32r-desc.c: Regenerated.
 175         * m32r-desc.h: Regenerated.
 176         * m32r-dis.c: Regenerated.
 177         * m32r-opc.c: Regenerated.
 178         * m32r-opc.h: Regenerated.
 179         * m32r-opinst.c: Regenerated.
 180         * openrisc-desc.c: Regenerated.
 181         * openrisc-desc.h: Regenerated.
 182         * openrisc-dis.c: Regenerated.
 183         * openrisc-opc.c: Regenerated.
 184         * openrisc-opc.h: Regenerated.
 185         * xstormy16-desc.c: Regenerated.
 186         * xstormy16-desc.h: Regenerated.
 187         * xstormy16-dis.c: Regenerated.
 188         * xstormy16-opc.c: Regenerated.
 189         * xstormy16-opc.h: Regenerated.
 190
 191 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 192
 193         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 194         address.
 195
 196 2005-02-11  Nick Clifton  <nickc@redhat.com>
 197
 198         * iq2000-asm.c: Regenerate.
 199
 200         * frv-dis.c: Regenerate.
 201
 202 2005-02-07  Jim Blandy  <jimb@redhat.com>
 203
 204         * Makefile.am (CGEN): Load guile.scm before calling the main
 205         application script.
 206         * Makefile.in: Regenerated.
 207         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 208         Simply pass the cgen-opc.scm path to ${cgen} as its first
 209         argument; ${cgen} itself now contains the '-s', or whatever is
 210         appropriate for the Scheme being used.
 211
 212 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 213
 214         * configure: Regenerate to track ../gettext.m4.
 215
 216 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 217
 218         * ia64-gen.c (NELEMS): Define.
 219         (shrink): Generate alias with missing second predicate register when
 220         opcode has two outputs and these are both predicates.
 221         * ia64-opc-i.c (FULL17): Define.
 222         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 223         here to generate output template.
 224         (TBITCM, TNATCM): Undefine after use.
 225         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 226         first input. Add ld16 aliases without ar.csd as second output. Add
 227         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 228         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 229         ar.ccv as third/fourth inputs. Consolidate through...
 230         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 231         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 232         * ia64-asmtab.c: Regenerate.
 233
 234 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 235
 236         * configure: Regenerate to track ../gettext.m4 change.
 237
 238 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 239
 240         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 241         * frv-asm.c: Rebuilt.
 242         * frv-desc.c: Rebuilt.
 243         * frv-desc.h: Rebuilt.
 244         * frv-dis.c: Rebuilt.
 245         * frv-ibld.c: Rebuilt.
 246         * frv-opc.c: Rebuilt.
 247         * frv-opc.h: Rebuilt.
 248
 249 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 250
 251         * configure: Regenerate, ../gettext.m4 was updated.
 252
 253 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 254
 255         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 256         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 257         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 258         * mips-dis.c: Ditto.
 259
 260 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 261
 262         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 263
 264 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 265
 266         * mips-dis.c (no_aliases): New disassembly option flag.
 267         (set_default_mips_dis_options): Init no_aliases to zero.
 268         (parse_mips_dis_option): Handle no-aliases option.
 269         (print_insn_mips): Ignore table entries that are aliases
 270         if no_aliases is set.
 271         (print_insn_mips16): Ditto.
 272         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 273         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 274         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 275         * mips16-opc.c (mips16_opcodes): Ditto.
 276
 277 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 278
 279         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 280         (inheritance diagram): Add missing edge.
 281         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 282         easier for the testsuite.
 283         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 284         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 285         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 286         arch_sh2a_or_sh4_up child.
 287         (sh_table): Do renaming as above.
 288         Correct comment for ldc.l for gas testsuite to read.
 289         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 290         Correct comments for movy.w and movy.l for gas testsuite to read.
 291         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 292
 293 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 294
 295         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 296
 297 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 298
 299         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 300
 301 2005-01-10  Andreas Schwab  <schwab@suse.de>
 302
 303         * disassemble.c (disassemble_init_for_target) <case
 304         bfd_arch_ia64>: Set skip_zeroes to 16.
 305         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 306
 307 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 308
 309         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 310
 311 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 312
 313         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 314         memory references. Convert avr_operand() to C90 formatting.
 315
 316 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 317
 318         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 319
 320 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 321
 322         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 323         (no_op_insn): Initialize array with instructions that have no
 324         operands.
 325         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 326
 327 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 328
 329         * arm-dis.c: Correct top-level comment.
 330
 331 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 332
 333         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 334         architecuture defining the insn.
 335         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 336         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 337         field.
 338         Also include opcode/arm.h.
 339         * Makefile.am (arm-dis.lo): Update dependency list.
 340         * Makefile.in: Regenerate.
 341
 342 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 343
 344         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 345         reflect the change to the short immediate syntax.
 346
 347 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 348
 349         * or32-opc.c (debug): Warning fix.
 350         * po/POTFILES.in: Regenerate.
 351
 352         * maxq-dis.c: Formatting.
 353         (print_insn): Warning fix.
 354
 355 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 356
 357         * arm-dis.c (WORD_ADDRESS): Define.
 358         (print_insn): Use it.  Correct big-endian end-of-section handling.
 359
 360 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 361             Vineet Sharma      <vineets@noida.hcltech.com>
 362
 363         * maxq-dis.c: New file.
 364         * disassemble.c (ARCH_maxq): Define.
 365         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 366         instructions..
 367         * configure.in: Add case for bfd_maxq_arch.
 368         * configure: Regenerate.
 369         * Makefile.am: Add support for maxq-dis.c
 370         * Makefile.in: Regenerate.
 371         * aclocal.m4: Regenerate.
 372
 373 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 374
 375         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 376         mode.
 377         * crx-dis.c: Likewise.
 378
 379 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 380
 381         Generally, handle CRISv32.
 382         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 383         (struct cris_disasm_data): New type.
 384         (format_reg, format_hex, cris_constraint, print_flags)
 385         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 386         callers changed.
 387         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 388         (print_insn_crisv32_without_register_prefix)
 389         (print_insn_crisv10_v32_with_register_prefix)
 390         (print_insn_crisv10_v32_without_register_prefix)
 391         (cris_parse_disassembler_options): New functions.
 392         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 393         parameter.  All callers changed.
 394         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 395         failure.
 396         (cris_constraint) <case 'Y', 'U'>: New cases.
 397         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 398         for constraint 'n'.
 399         (print_with_operands) <case 'Y'>: New case.
 400         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 401         <case 'N', 'Y', 'Q'>: New cases.
 402         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 403         (print_insn_cris_with_register_prefix)
 404         (print_insn_cris_without_register_prefix): Call
 405         cris_parse_disassembler_options.
 406         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 407         for CRISv32 and the size of immediate operands.  New v32-only
 408         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 409         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 410         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 411         Change brp to be v3..v10.
 412         (cris_support_regs): New vector.
 413         (cris_opcodes): Update head comment.  New format characters '[',
 414         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 415         Add new opcodes for v32 and adjust existing opcodes to accommodate
 416         differences to earlier variants.
 417         (cris_cond15s): New vector.
 418
 419 2004-11-04 Jan Beulich <jbeulich@novell.com>
 420
 421         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 422         (indirEb): Remove.
 423         (Mp): Use f_mode rather than none at all.
 424         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 425         replaces what previously was x_mode; x_mode now means 128-bit SSE
 426         operands.
 427         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 428         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 429         pinsrw's second operand is Edqw.
 430         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 431         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 432         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 433         mode when an operand size override is present or always suffixing.
 434         More instructions will need to be added to this group.
 435         (putop): Handle new macro chars 'C' (short/long suffix selector),
 436         'I' (Intel mode override for following macro char), and 'J' (for
 437         adding the 'l' prefix to far branches in AT&T mode). When an
 438         alternative was specified in the template, honor macro character when
 439         specified for Intel mode.
 440         (OP_E): Handle new *_mode values. Correct pointer specifications for
 441         memory operands. Consolidate output of index register.
 442         (OP_G): Handle new *_mode values.
 443         (OP_I): Handle const_1_mode.
 444         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 445         respective opcode prefix bits have been consumed.
 446         (OP_EM, OP_EX): Provide some default handling for generating pointer
 447         specifications.
 448
 449 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 450
 451         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 452         COP_INST macro.
 453
 454 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 455
 456         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 457         (getregliststring): Support HI/LO and user registers.
 458         * crx-opc.c (crx_instruction): Update data structure according to the
 459         rearrangement done in CRX opcode header file.
 460         (crx_regtab):  Likewise.
 461         (crx_optab):  Likewise.
 462         (crx_instruction): Reorder load/stor instructions, remove unsupported
 463         formats.
 464         support new Co-Processor instruction 'cpi'.
 465
 466 2004-10-27  Nick Clifton  <nickc@redhat.com>
 467
 468         * opcodes/iq2000-asm.c: Regenerate.
 469         * opcodes/iq2000-desc.c: Regenerate.
 470         * opcodes/iq2000-desc.h: Regenerate.
 471         * opcodes/iq2000-dis.c: Regenerate.
 472         * opcodes/iq2000-ibld.c: Regenerate.
 473         * opcodes/iq2000-opc.c: Regenerate.
 474         * opcodes/iq2000-opc.h: Regenerate.
 475
 476 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 477
 478         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 479         us4, us5 (respectively).
 480         Remove unsupported 'popa' instruction.
 481         Reverse operands order in store co-processor instructions.
 482
 483 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 484
 485         * Makefile.am: Run "make dep-am"
 486         * Makefile.in: Regenerate.
 487
 488 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 489
 490         * xtensa-dis.c: Use ISO C90 formatting.
 491
 492 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 493
 494         * ppc-opc.c: Revert 2004-09-09 change.
 495
 496 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 497
 498         * xtensa-dis.c (state_names): Delete.
 499         (fetch_data): Use xtensa_isa_maxlength.
 500         (print_xtensa_operand): Replace operand parameter with opcode/operand
 501         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 502         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 503         instruction bundles.  Use xmalloc instead of malloc.
 504
 505 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 506
 507         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 508         initializers.
 509
 510 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 511
 512         * crx-opc.c (crx_instruction): Support Co-processor insns.
 513         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 514         (getregliststring): Change function to use the above enum.
 515         (print_arg): Handle CO-Processor insns.
 516         (crx_cinvs): Add 'b' option to invalidate the branch-target
 517         cache.
 518
 519 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 520
 521         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 522         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 523         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 524         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 525         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 526
 527 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 528
 529         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 530         rather than add it.
 531
 532 2004-09-30  Paul Brook  <paul@codesourcery.com>
 533
 534         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 535         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 536
 537 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 538
 539         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 540         (CONFIG_STATUS_DEPENDENCIES): New.
 541         (Makefile): Removed.
 542         (config.status): Likewise.
 543         * Makefile.in: Regenerated.
 544
 545 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 546
 547         * Makefile.am: Run "make dep-am".
 548         * Makefile.in: Regenerate.
 549         * aclocal.m4: Regenerate.
 550         * configure: Regenerate.
 551         * po/POTFILES.in: Regenerate.
 552         * po/opcodes.pot: Regenerate.
 553
 554 2004-09-11  Andreas Schwab  <schwab@suse.de>
 555
 556         * configure: Rebuild.
 557
 558 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 559
 560         * ppc-opc.c (L): Make this field not optional.
 561
 562 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 563
 564         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 565         Fix parameter to 'm[t|f]csr' insns.
 566
 567 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 568
 569         * configure.in: Autoupdate to autoconf 2.59.
 570         * aclocal.m4: Rebuild with aclocal 1.4p6.
 571         * configure: Rebuild with autoconf 2.59.
 572         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 573         bfd changes for autoconf 2.59 on the way).
 574         * config.in: Rebuild with autoheader 2.59.
 575
 576 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 577
 578         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 579
 580 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 581
 582         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 583         (GRPPADLCK2): New define.
 584         (twobyte_has_modrm): True for 0xA6.
 585         (grps): GRPPADLCK2 for opcode 0xA6.
 586
 587 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 588
 589         Introduce SH2a support.
 590         * sh-opc.h (arch_sh2a_base): Renumber.
 591         (arch_sh2a_nofpu_base): Remove.
 592         (arch_sh_base_mask): Adjust.
 593         (arch_opann_mask): New.
 594         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 595         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 596         (sh_table): Adjust whitespace.
 597         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 598         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 599         instruction list throughout.
 600         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 601         of arch_sh2a in instruction list throughout.
 602         (arch_sh2e_up): Accomodate above changes.
 603         (arch_sh2_up): Ditto.
 604         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 605         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 606         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 607         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 608         * sh-opc.h (arch_sh2a_nofpu): New.
 609         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 610         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 611         instruction.
 612         2004-01-20  DJ Delorie  <dj@redhat.com>
 613         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 614         2003-12-29  DJ Delorie  <dj@redhat.com>
 615         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 616         sh_opcode_info, sh_table): Add sh2a support.
 617         (arch_op32): New, to tag 32-bit opcodes.
 618         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 619         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 620         * sh-opc.h (arch_sh2a): Add.
 621         * sh-dis.c (arch_sh2a): Handle.
 622         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 623
 624 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 625
 626         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 627
 628 2004-07-22  Nick Clifton  <nickc@redhat.com>
 629
 630         PR/280
 631         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 632         insns - this is done by objdump itself.
 633         * h8500-dis.c (print_insn_h8500): Likewise.
 634
 635 2004-07-21  Jan Beulich <jbeulich@novell.com>
 636
 637         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 638         regardless of address size prefix in effect.
 639         (ptr_reg): Size or address registers does not depend on rex64, but
 640         on the presence of an address size override.
 641         (OP_MMX): Use rex.x only for xmm registers.
 642         (OP_EM): Use rex.z only for xmm registers.
 643
 644 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 645
 646         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 647         move/branch operations to the bottom so that VR5400 multimedia
 648         instructions take precedence in disassembly.
 649
 650 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 651
 652         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 653         ISA-specific "break" encoding.
 654
 655 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 656
 657         * arm-opc.h: Fix typo in comment.
 658
 659 2004-07-11  Andreas Schwab  <schwab@suse.de>
 660
 661         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 662
 663 2004-07-09  Andreas Schwab  <schwab@suse.de>
 664
 665         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 666
 667 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 668
 669         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 670         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 671         (crx-dis.lo): New target.
 672         (crx-opc.lo): Likewise.
 673         * Makefile.in: Regenerate.
 674         * configure.in: Handle bfd_crx_arch.
 675         * configure: Regenerate.
 676         * crx-dis.c: New file.
 677         * crx-opc.c: New file.
 678         * disassemble.c (ARCH_crx): Define.
 679         (disassembler): Handle ARCH_crx.
 680
 681 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 682
 683         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 684         * ia64-asmtab.c: Regnerate.
 685
 686 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 687
 688         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 689         (extract_fxm): Don't test dialect.
 690         (XFXFXM_MASK): Include the power4 bit.
 691         (XFXM): Add p4 param.
 692         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 693
 694 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 695
 696         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 697         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 698
 699 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 700
 701         * ppc-opc.c (BH, XLBH_MASK): Define.
 702         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 703
 704 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 705
 706         * i386-dis.c (x_mode): Comment.
 707         (two_source_ops): File scope.
 708         (float_mem): Correct fisttpll and fistpll.
 709         (float_mem_mode): New table.
 710         (dofloat): Use it.
 711         (OP_E): Correct intel mode PTR output.
 712         (ptr_reg): Use open_char and close_char.
 713         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 714         operands.  Set two_source_ops.
 715
 716 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 717
 718         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 719         instead of _raw_size.
 720
 721 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 722
 723         * ia64-gen.c (in_iclass): Handle more postinc st
 724         and ld variants.
 725         * ia64-asmtab.c: Rebuilt.
 726
 727 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 728
 729         * s390-opc.txt: Correct architecture mask for some opcodes.
 730         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 731         in the esa mode as well.
 732
 733 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 734
 735         * sh-dis.c (target_arch): Make unsigned.
 736         (print_insn_sh): Replace (most of) switch with a call to
 737         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 738         * sh-opc.h: Redefine architecture flags values.
 739         Add sh3-nommu architecture.
 740         Reorganise <arch>_up macros so they make more visual sense.
 741         (SH_MERGE_ARCH_SET): Define new macro.
 742         (SH_VALID_BASE_ARCH_SET): Likewise.
 743         (SH_VALID_MMU_ARCH_SET): Likewise.
 744         (SH_VALID_CO_ARCH_SET): Likewise.
 745         (SH_VALID_ARCH_SET): Likewise.
 746         (SH_MERGE_ARCH_SET_VALID): Likewise.
 747         (SH_ARCH_SET_HAS_FPU): Likewise.
 748         (SH_ARCH_SET_HAS_DSP): Likewise.
 749         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 750         (sh_get_arch_from_bfd_mach): Add prototype.
 751         (sh_get_arch_up_from_bfd_mach): Likewise.
 752         (sh_get_bfd_mach_from_arch_set): Likewise.
 753         (sh_merge_bfd_arc): Likewise.
 754
 755 2004-05-24  Peter Barada  <peter@the-baradas.com>
 756
 757         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 758         into new match_insn_m68k function.  Loop over canidate
 759         matches and select first that completely matches.
 760         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 761         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 762         to verify addressing for MAC/EMAC.
 763         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 764         reigster halves since 'fpu' and 'spl' look misleading.
 765         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 766         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 767         first, tighten up match masks.
 768         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 769         'size' from special case code in print_insn_m68k to
 770         determine decode size of insns.
 771
 772 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 773
 774         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 775         well as when -mpower4.
 776
 777 2004-05-13  Nick Clifton  <nickc@redhat.com>
 778
 779         * po/fr.po: Updated French translation.
 780
 781 2004-05-05  Peter Barada  <peter@the-baradas.com>
 782
 783         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 784         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 785         * m68k-op.c: Switch from ColdFire chips to core variants.
 786
 787 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 788
 789         PR 147.
 790         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 791
 792 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 793
 794         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 795         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 796
 797 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 798
 799         * sh-dis.c (print_insn_sh): Print the value in constant pool
 800         as a symbol if it looks like a symbol.
 801
 802 2004-04-22  Peter Barada <peter@the-baradas.com>
 803
 804         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 805         appropriate ColdFire architectures.
 806         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 807         mask addressing.
 808         Add EMAC instructions, fix MAC instructions. Remove
 809         macmw/macml/msacmw/msacml instructions since mask addressing now
 810         supported.
 811
 812 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 813
 814         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 815         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 816         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 817         macro.  Adjust all users.
 818
 819 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 820
 821         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 822         separately.
 823
 824 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 825
 826         * m32r-asm.c: Regenerate.
 827
 828 2004-03-29  Stan Shebs  <shebs@apple.com>
 829
 830         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 831         used.
 832
 833 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 834
 835         * aclocal.m4: Regenerate.
 836         * config.in: Regenerate.
 837         * configure: Regenerate.
 838         * po/POTFILES.in: Regenerate.
 839         * po/opcodes.pot: Regenerate.
 840
 841 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 842
 843         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 844         PPC_OPERANDS_GPR_0.
 845         * ppc-opc.c (RA0): Define.
 846         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 847         (RAOPT): Rename from RAO.  Update all uses.
 848         (powerpc_opcodes): Use RA0 as appropriate.
 849
 850 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 851
 852         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 853
 854 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 855
 856         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 857
 858 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 859
 860         * i386-dis.c (GRPPLOCK): Delete.
 861         (grps): Delete GRPPLOCK entry.
 862
 863 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 864
 865         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 866         (M, Mp): Use OP_M.
 867         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 868         (GRPPADLCK): Define.
 869         (dis386): Use NOP_Fixup on "nop".
 870         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 871         (twobyte_has_modrm): Set for 0xa7.
 872         (padlock_table): Delete.  Move to..
 873         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 874         and clflush.
 875         (print_insn): Revert PADLOCK_SPECIAL code.
 876         (OP_E): Delete sfence, lfence, mfence checks.
 877
 878 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 879
 880         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 881         (INVLPG_Fixup): New function.
 882         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 883
 884 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 885
 886         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 887         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 888         (padlock_table): New struct with PadLock instructions.
 889         (print_insn): Handle PADLOCK_SPECIAL.
 890
 891 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 892
 893         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 894         (OP_E): Twiddle clflush to sfence here.
 895
 896 2004-03-08  Nick Clifton  <nickc@redhat.com>
 897
 898         * po/de.po: Updated German translation.
 899
 900 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 901
 902         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 903         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 904         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 905         accordingly.
 906
 907 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 908
 909         * frv-asm.c: Regenerate.
 910         * frv-desc.c: Regenerate.
 911         * frv-desc.h: Regenerate.
 912         * frv-dis.c: Regenerate.
 913         * frv-ibld.c: Regenerate.
 914         * frv-opc.c: Regenerate.
 915         * frv-opc.h: Regenerate.
 916
 917 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 918
 919         * frv-desc.c, frv-opc.c: Regenerate.
 920
 921 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 922
 923         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 924
 925 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 926
 927         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 928         Also correct mistake in the comment.
 929
 930 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 931
 932         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 933         ensure that double registers have even numbers.
 934         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 935         that reserved instruction 0xfffd does not decode the same
 936         as 0xfdfd (ftrv).
 937         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 938         REG_N refers to a double register.
 939         Add REG_N_B01 nibble type and use it instead of REG_NM
 940         in ftrv.
 941         Adjust the bit patterns in a few comments.
 942
 943 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 944
 945         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 946
 947 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 948
 949         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 950
 951 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 952
 953         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 954
 955 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 956
 957         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 958         mtivor32, mtivor33, mtivor34.
 959
 960 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 961
 962         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 963
 964 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 965
 966         * arm-opc.h Maverick accumulator register opcode fixes.
 967
 968 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 969
 970         * m32r-dis.c: Regenerate.
 971
 972 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 973
 974         * sh-opc.h (sh_table): "fsrra", not "fssra".
 975
 976 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 977
 978         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 979         contraints.
 980
 981 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 982
 983         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 984
 985 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 986
 987         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 988         1.  Don't print scale factor on AT&T mode when index missing.
 989
 990 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 991
 992         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 993         when loaded into XR registers.
 994
 995 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 996
 997         * frv-desc.h: Regenerate.
 998         * frv-desc.c: Regenerate.
 999         * frv-opc.c: Regenerate.
1000
1001 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1002
1003         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1004
1005 2004-01-09  Paul Brook  <paul@codesourcery.com>
1006
1007         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1008         specific opcodes.
1009
1010 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1011
1012         * Makefile.am (libopcodes_la_DEPENDENCIES)
1013         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1014         comment about the problem.
1015         * Makefile.in: Regenerate.
1016
1017 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1018
1019         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1020         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1021         cut&paste errors in shifting/truncating numerical operands.
1022         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1023         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1024         (parse_uslo16): Likewise.
1025         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1026         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1027         (parse_s12): Likewise.
1028         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1029         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1030         (parse_uslo16): Likewise.
1031         (parse_uhi16): Parse gothi and gotfuncdeschi.
1032         (parse_d12): Parse got12 and gotfuncdesc12.
1033         (parse_s12): Likewise.
1034
1035 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1036
1037         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1038         instruction which looks similar to an 'rla' instruction.
1039
1040 For older changes see ChangeLog-0203
1041 \f
1042 Local Variables:
1043 mode: change-log
1044 left-margin: 8
1045 fill-column: 74
1046 version-control: never
1047 End: