opcodes/ChangeLog

   1 2005-04-01  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
   4         easier future additions.
   5
   6 2005-03-31  Jerome Guitton  <guitton@gnat.com>
   7
   8         * configure.in: Check for basename.
   9         * configure: Regenerate.
  10         * config.in: Ditto.
  11
  12 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
  13
  14         * i386-dis.c (SEG_Fixup): New.
  15         (Sv): New.
  16         (dis386): Use "Sv" for 0x8c and 0x8e.
  17
  18 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  19             Nick Clifton  <nickc@redhat.com>
  20
  21         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
  22         function entry mask addresses.
  23         (entry_addr_occupied_slots): New variable: The number of occupied
  24         elements in entry_addr.
  25         (entry_addr_total_slots): New variable: The total number of
  26         elements in entry_addr.
  27         (parse_disassembler_options): New function.  Fills in the entry_addr
  28         array.
  29         (free_entry_array): New function.  Release the memory used by the
  30         entry addr array.  Suppressed because there is no way to call it.
  31         (is_function_entry): Check if a given address is a function's
  32         start address by looking at supplied entry mask addresses and
  33         symbol information, if available.
  34         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
  35
  36 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
  37
  38         * cris-dis.c (print_with_operands): Use ~31L for long instead
  39         of ~31.
  40
  41 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
  42
  43         * mmix-opc.c (O): Revert the last change.
  44         (Z): Likewise.
  45
  46 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
  47
  48         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
  49         (Z): Likewise.
  50
  51 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
  52
  53         * mmix-opc.c (O, Z): Force expression as unsigned long.
  54
  55 2005-03-18  Nick Clifton  <nickc@redhat.com>
  56
  57         * ip2k-asm.c: Regenerate.
  58         * op/opcodes.pot: Regenerate.
  59
  60 2005-03-16  Nick Clifton  <nickc@redhat.com>
  61             Ben Elliston  <bje@au.ibm.com>
  62
  63         * configure.in (werror): New switch: Add -Werror to the
  64         compiler command line.  Enabled by default.  Disable via
  65         --disable-werror.
  66         * configure: Regenerate.
  67
  68 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  69
  70         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  71         BOOKE.
  72
  73 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  74
  75         * po/es.po: Commit new Spanish translation.
  76
  77         * po/fr.po: Commit new French translation.
  78
  79 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  80
  81         * vax-dis.c: Fix spelling error
  82         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  83         of just "Entry mask: < r1 ... >"
  84
  85 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  86
  87         * arm-dis.c (arm_opcodes): Document %E and %V.
  88         Add entries for v6T2 ARM instructions:
  89         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  90         (print_insn_arm): Add support for %E and %V.
  91         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  92
  93 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  94             Alan Modra  <amodra@bigpond.net.au>
  95
  96         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  97         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  98         (SPRG_MASK): Delete.
  99         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 100         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 101         mfsprg4..7 after msprg and consolidate.
 102
 103 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 104
 105         * vax-dis.c (entry_mask_bit): New array.
 106         (print_insn_vax): Decode function entry mask.
 107
 108 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 109
 110         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 111
 112 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 113
 114         * po/opcodes.pot: Regenerate.
 115
 116 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 117
 118         * arc-dis.c (a4_decoding_class): New enum.
 119         (dsmOneArcInst): Use the enum values for the decoding class.
 120         Remove redundant case in the switch for decodingClass value 11.
 121
 122 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 123
 124         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 125         accesses.
 126         (OP_C): Consider lock prefix in non-64-bit modes.
 127
 128 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 129
 130         * cris-dis.c (format_hex): Remove ineffective warning fix.
 131         * crx-dis.c (make_instruction): Warning fix.
 132         * frv-asm.c: Regenerate.
 133
 134 2005-02-23  Nick Clifton  <nickc@redhat.com>
 135
 136         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 137         read_memory.
 138
 139         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 140
 141         * crx-dis.c (make_instruction): Move argument structure into inner
 142         scope and ensure that all of its fields are initialised before
 143         they are used.
 144
 145         * fr30-asm.c: Regenerate.
 146         * fr30-dis.c: Regenerate.
 147         * frv-asm.c: Regenerate.
 148         * frv-dis.c: Regenerate.
 149         * ip2k-asm.c: Regenerate.
 150         * ip2k-dis.c: Regenerate.
 151         * iq2000-asm.c: Regenerate.
 152         * iq2000-dis.c: Regenerate.
 153         * m32r-asm.c: Regenerate.
 154         * m32r-dis.c: Regenerate.
 155         * openrisc-asm.c: Regenerate.
 156         * openrisc-dis.c: Regenerate.
 157         * xstormy16-asm.c: Regenerate.
 158         * xstormy16-dis.c: Regenerate.
 159
 160 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * arc-ext.c: Warning fixes.
 163         * arc-ext.h: Likewise.
 164         * cgen-opc.c: Likewise.
 165         * ia64-gen.c: Likewise.
 166         * maxq-dis.c: Likewise.
 167         * ns32k-dis.c: Likewise.
 168         * w65-dis.c: Likewise.
 169         * ia64-asmtab.c: Regenerate.
 170
 171 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 172
 173         * fr30-desc.c: Regenerate.
 174         * fr30-desc.h: Regenerate.
 175         * fr30-opc.c: Regenerate.
 176         * fr30-opc.h: Regenerate.
 177         * frv-desc.c: Regenerate.
 178         * frv-desc.h: Regenerate.
 179         * frv-opc.c: Regenerate.
 180         * frv-opc.h: Regenerate.
 181         * ip2k-desc.c: Regenerate.
 182         * ip2k-desc.h: Regenerate.
 183         * ip2k-opc.c: Regenerate.
 184         * ip2k-opc.h: Regenerate.
 185         * iq2000-desc.c: Regenerate.
 186         * iq2000-desc.h: Regenerate.
 187         * iq2000-opc.c: Regenerate.
 188         * iq2000-opc.h: Regenerate.
 189         * m32r-desc.c: Regenerate.
 190         * m32r-desc.h: Regenerate.
 191         * m32r-opc.c: Regenerate.
 192         * m32r-opc.h: Regenerate.
 193         * m32r-opinst.c: Regenerate.
 194         * openrisc-desc.c: Regenerate.
 195         * openrisc-desc.h: Regenerate.
 196         * openrisc-opc.c: Regenerate.
 197         * openrisc-opc.h: Regenerate.
 198         * xstormy16-desc.c: Regenerate.
 199         * xstormy16-desc.h: Regenerate.
 200         * xstormy16-opc.c: Regenerate.
 201         * xstormy16-opc.h: Regenerate.
 202
 203 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 204
 205         * Makefile.am: Run "make dep-am"
 206         * Makefile.in: Regenerate.
 207
 208 2005-02-15  Nick Clifton  <nickc@redhat.com>
 209
 210         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 211         compile time warnings.
 212         (print_keyword): Likewise.
 213         (default_print_insn): Likewise.
 214
 215         * fr30-desc.c: Regenerated.
 216         * fr30-desc.h: Regenerated.
 217         * fr30-dis.c: Regenerated.
 218         * fr30-opc.c: Regenerated.
 219         * fr30-opc.h: Regenerated.
 220         * frv-desc.c: Regenerated.
 221         * frv-dis.c: Regenerated.
 222         * frv-opc.c: Regenerated.
 223         * ip2k-asm.c: Regenerated.
 224         * ip2k-desc.c: Regenerated.
 225         * ip2k-desc.h: Regenerated.
 226         * ip2k-dis.c: Regenerated.
 227         * ip2k-opc.c: Regenerated.
 228         * ip2k-opc.h: Regenerated.
 229         * iq2000-desc.c: Regenerated.
 230         * iq2000-dis.c: Regenerated.
 231         * iq2000-opc.c: Regenerated.
 232         * m32r-asm.c: Regenerated.
 233         * m32r-desc.c: Regenerated.
 234         * m32r-desc.h: Regenerated.
 235         * m32r-dis.c: Regenerated.
 236         * m32r-opc.c: Regenerated.
 237         * m32r-opc.h: Regenerated.
 238         * m32r-opinst.c: Regenerated.
 239         * openrisc-desc.c: Regenerated.
 240         * openrisc-desc.h: Regenerated.
 241         * openrisc-dis.c: Regenerated.
 242         * openrisc-opc.c: Regenerated.
 243         * openrisc-opc.h: Regenerated.
 244         * xstormy16-desc.c: Regenerated.
 245         * xstormy16-desc.h: Regenerated.
 246         * xstormy16-dis.c: Regenerated.
 247         * xstormy16-opc.c: Regenerated.
 248         * xstormy16-opc.h: Regenerated.
 249
 250 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 251
 252         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 253         address.
 254
 255 2005-02-11  Nick Clifton  <nickc@redhat.com>
 256
 257         * iq2000-asm.c: Regenerate.
 258
 259         * frv-dis.c: Regenerate.
 260
 261 2005-02-07  Jim Blandy  <jimb@redhat.com>
 262
 263         * Makefile.am (CGEN): Load guile.scm before calling the main
 264         application script.
 265         * Makefile.in: Regenerated.
 266         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 267         Simply pass the cgen-opc.scm path to ${cgen} as its first
 268         argument; ${cgen} itself now contains the '-s', or whatever is
 269         appropriate for the Scheme being used.
 270
 271 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 272
 273         * configure: Regenerate to track ../gettext.m4.
 274
 275 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 276
 277         * ia64-gen.c (NELEMS): Define.
 278         (shrink): Generate alias with missing second predicate register when
 279         opcode has two outputs and these are both predicates.
 280         * ia64-opc-i.c (FULL17): Define.
 281         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 282         here to generate output template.
 283         (TBITCM, TNATCM): Undefine after use.
 284         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 285         first input. Add ld16 aliases without ar.csd as second output. Add
 286         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 287         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 288         ar.ccv as third/fourth inputs. Consolidate through...
 289         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 290         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 291         * ia64-asmtab.c: Regenerate.
 292
 293 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 294
 295         * configure: Regenerate to track ../gettext.m4 change.
 296
 297 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 298
 299         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 300         * frv-asm.c: Rebuilt.
 301         * frv-desc.c: Rebuilt.
 302         * frv-desc.h: Rebuilt.
 303         * frv-dis.c: Rebuilt.
 304         * frv-ibld.c: Rebuilt.
 305         * frv-opc.c: Rebuilt.
 306         * frv-opc.h: Rebuilt.
 307
 308 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 309
 310         * configure: Regenerate, ../gettext.m4 was updated.
 311
 312 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 313
 314         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 315         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 316         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 317         * mips-dis.c: Ditto.
 318
 319 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 320
 321         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 322
 323 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 324
 325         * mips-dis.c (no_aliases): New disassembly option flag.
 326         (set_default_mips_dis_options): Init no_aliases to zero.
 327         (parse_mips_dis_option): Handle no-aliases option.
 328         (print_insn_mips): Ignore table entries that are aliases
 329         if no_aliases is set.
 330         (print_insn_mips16): Ditto.
 331         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 332         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 333         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 334         * mips16-opc.c (mips16_opcodes): Ditto.
 335
 336 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 337
 338         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 339         (inheritance diagram): Add missing edge.
 340         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 341         easier for the testsuite.
 342         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 343         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 344         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 345         arch_sh2a_or_sh4_up child.
 346         (sh_table): Do renaming as above.
 347         Correct comment for ldc.l for gas testsuite to read.
 348         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 349         Correct comments for movy.w and movy.l for gas testsuite to read.
 350         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 351
 352 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 353
 354         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 355
 356 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 357
 358         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 359
 360 2005-01-10  Andreas Schwab  <schwab@suse.de>
 361
 362         * disassemble.c (disassemble_init_for_target) <case
 363         bfd_arch_ia64>: Set skip_zeroes to 16.
 364         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 365
 366 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 367
 368         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 369
 370 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 371
 372         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 373         memory references. Convert avr_operand() to C90 formatting.
 374
 375 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 376
 377         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 378
 379 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 380
 381         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 382         (no_op_insn): Initialize array with instructions that have no
 383         operands.
 384         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 385
 386 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 387
 388         * arm-dis.c: Correct top-level comment.
 389
 390 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 391
 392         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 393         architecuture defining the insn.
 394         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 395         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 396         field.
 397         Also include opcode/arm.h.
 398         * Makefile.am (arm-dis.lo): Update dependency list.
 399         * Makefile.in: Regenerate.
 400
 401 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 402
 403         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 404         reflect the change to the short immediate syntax.
 405
 406 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 407
 408         * or32-opc.c (debug): Warning fix.
 409         * po/POTFILES.in: Regenerate.
 410
 411         * maxq-dis.c: Formatting.
 412         (print_insn): Warning fix.
 413
 414 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 415
 416         * arm-dis.c (WORD_ADDRESS): Define.
 417         (print_insn): Use it.  Correct big-endian end-of-section handling.
 418
 419 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 420             Vineet Sharma      <vineets@noida.hcltech.com>
 421
 422         * maxq-dis.c: New file.
 423         * disassemble.c (ARCH_maxq): Define.
 424         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 425         instructions..
 426         * configure.in: Add case for bfd_maxq_arch.
 427         * configure: Regenerate.
 428         * Makefile.am: Add support for maxq-dis.c
 429         * Makefile.in: Regenerate.
 430         * aclocal.m4: Regenerate.
 431
 432 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 433
 434         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 435         mode.
 436         * crx-dis.c: Likewise.
 437
 438 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 439
 440         Generally, handle CRISv32.
 441         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 442         (struct cris_disasm_data): New type.
 443         (format_reg, format_hex, cris_constraint, print_flags)
 444         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 445         callers changed.
 446         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 447         (print_insn_crisv32_without_register_prefix)
 448         (print_insn_crisv10_v32_with_register_prefix)
 449         (print_insn_crisv10_v32_without_register_prefix)
 450         (cris_parse_disassembler_options): New functions.
 451         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 452         parameter.  All callers changed.
 453         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 454         failure.
 455         (cris_constraint) <case 'Y', 'U'>: New cases.
 456         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 457         for constraint 'n'.
 458         (print_with_operands) <case 'Y'>: New case.
 459         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 460         <case 'N', 'Y', 'Q'>: New cases.
 461         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 462         (print_insn_cris_with_register_prefix)
 463         (print_insn_cris_without_register_prefix): Call
 464         cris_parse_disassembler_options.
 465         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 466         for CRISv32 and the size of immediate operands.  New v32-only
 467         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 468         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 469         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 470         Change brp to be v3..v10.
 471         (cris_support_regs): New vector.
 472         (cris_opcodes): Update head comment.  New format characters '[',
 473         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 474         Add new opcodes for v32 and adjust existing opcodes to accommodate
 475         differences to earlier variants.
 476         (cris_cond15s): New vector.
 477
 478 2004-11-04 Jan Beulich <jbeulich@novell.com>
 479
 480         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 481         (indirEb): Remove.
 482         (Mp): Use f_mode rather than none at all.
 483         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 484         replaces what previously was x_mode; x_mode now means 128-bit SSE
 485         operands.
 486         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 487         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 488         pinsrw's second operand is Edqw.
 489         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 490         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 491         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 492         mode when an operand size override is present or always suffixing.
 493         More instructions will need to be added to this group.
 494         (putop): Handle new macro chars 'C' (short/long suffix selector),
 495         'I' (Intel mode override for following macro char), and 'J' (for
 496         adding the 'l' prefix to far branches in AT&T mode). When an
 497         alternative was specified in the template, honor macro character when
 498         specified for Intel mode.
 499         (OP_E): Handle new *_mode values. Correct pointer specifications for
 500         memory operands. Consolidate output of index register.
 501         (OP_G): Handle new *_mode values.
 502         (OP_I): Handle const_1_mode.
 503         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 504         respective opcode prefix bits have been consumed.
 505         (OP_EM, OP_EX): Provide some default handling for generating pointer
 506         specifications.
 507
 508 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 509
 510         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 511         COP_INST macro.
 512
 513 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 514
 515         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 516         (getregliststring): Support HI/LO and user registers.
 517         * crx-opc.c (crx_instruction): Update data structure according to the
 518         rearrangement done in CRX opcode header file.
 519         (crx_regtab):  Likewise.
 520         (crx_optab):  Likewise.
 521         (crx_instruction): Reorder load/stor instructions, remove unsupported
 522         formats.
 523         support new Co-Processor instruction 'cpi'.
 524
 525 2004-10-27  Nick Clifton  <nickc@redhat.com>
 526
 527         * opcodes/iq2000-asm.c: Regenerate.
 528         * opcodes/iq2000-desc.c: Regenerate.
 529         * opcodes/iq2000-desc.h: Regenerate.
 530         * opcodes/iq2000-dis.c: Regenerate.
 531         * opcodes/iq2000-ibld.c: Regenerate.
 532         * opcodes/iq2000-opc.c: Regenerate.
 533         * opcodes/iq2000-opc.h: Regenerate.
 534
 535 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 536
 537         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 538         us4, us5 (respectively).
 539         Remove unsupported 'popa' instruction.
 540         Reverse operands order in store co-processor instructions.
 541
 542 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 543
 544         * Makefile.am: Run "make dep-am"
 545         * Makefile.in: Regenerate.
 546
 547 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 548
 549         * xtensa-dis.c: Use ISO C90 formatting.
 550
 551 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 552
 553         * ppc-opc.c: Revert 2004-09-09 change.
 554
 555 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 556
 557         * xtensa-dis.c (state_names): Delete.
 558         (fetch_data): Use xtensa_isa_maxlength.
 559         (print_xtensa_operand): Replace operand parameter with opcode/operand
 560         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 561         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 562         instruction bundles.  Use xmalloc instead of malloc.
 563
 564 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 565
 566         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 567         initializers.
 568
 569 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 570
 571         * crx-opc.c (crx_instruction): Support Co-processor insns.
 572         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 573         (getregliststring): Change function to use the above enum.
 574         (print_arg): Handle CO-Processor insns.
 575         (crx_cinvs): Add 'b' option to invalidate the branch-target
 576         cache.
 577
 578 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 579
 580         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 581         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 582         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 583         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 584         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 585
 586 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 587
 588         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 589         rather than add it.
 590
 591 2004-09-30  Paul Brook  <paul@codesourcery.com>
 592
 593         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 594         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 595
 596 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 597
 598         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 599         (CONFIG_STATUS_DEPENDENCIES): New.
 600         (Makefile): Removed.
 601         (config.status): Likewise.
 602         * Makefile.in: Regenerated.
 603
 604 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 605
 606         * Makefile.am: Run "make dep-am".
 607         * Makefile.in: Regenerate.
 608         * aclocal.m4: Regenerate.
 609         * configure: Regenerate.
 610         * po/POTFILES.in: Regenerate.
 611         * po/opcodes.pot: Regenerate.
 612
 613 2004-09-11  Andreas Schwab  <schwab@suse.de>
 614
 615         * configure: Rebuild.
 616
 617 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 618
 619         * ppc-opc.c (L): Make this field not optional.
 620
 621 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 622
 623         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 624         Fix parameter to 'm[t|f]csr' insns.
 625
 626 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 627
 628         * configure.in: Autoupdate to autoconf 2.59.
 629         * aclocal.m4: Rebuild with aclocal 1.4p6.
 630         * configure: Rebuild with autoconf 2.59.
 631         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 632         bfd changes for autoconf 2.59 on the way).
 633         * config.in: Rebuild with autoheader 2.59.
 634
 635 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 636
 637         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 638
 639 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 640
 641         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 642         (GRPPADLCK2): New define.
 643         (twobyte_has_modrm): True for 0xA6.
 644         (grps): GRPPADLCK2 for opcode 0xA6.
 645
 646 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 647
 648         Introduce SH2a support.
 649         * sh-opc.h (arch_sh2a_base): Renumber.
 650         (arch_sh2a_nofpu_base): Remove.
 651         (arch_sh_base_mask): Adjust.
 652         (arch_opann_mask): New.
 653         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 654         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 655         (sh_table): Adjust whitespace.
 656         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 657         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 658         instruction list throughout.
 659         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 660         of arch_sh2a in instruction list throughout.
 661         (arch_sh2e_up): Accomodate above changes.
 662         (arch_sh2_up): Ditto.
 663         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 664         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 665         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 666         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 667         * sh-opc.h (arch_sh2a_nofpu): New.
 668         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 669         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 670         instruction.
 671         2004-01-20  DJ Delorie  <dj@redhat.com>
 672         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 673         2003-12-29  DJ Delorie  <dj@redhat.com>
 674         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 675         sh_opcode_info, sh_table): Add sh2a support.
 676         (arch_op32): New, to tag 32-bit opcodes.
 677         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 678         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 679         * sh-opc.h (arch_sh2a): Add.
 680         * sh-dis.c (arch_sh2a): Handle.
 681         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 682
 683 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 684
 685         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 686
 687 2004-07-22  Nick Clifton  <nickc@redhat.com>
 688
 689         PR/280
 690         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 691         insns - this is done by objdump itself.
 692         * h8500-dis.c (print_insn_h8500): Likewise.
 693
 694 2004-07-21  Jan Beulich <jbeulich@novell.com>
 695
 696         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 697         regardless of address size prefix in effect.
 698         (ptr_reg): Size or address registers does not depend on rex64, but
 699         on the presence of an address size override.
 700         (OP_MMX): Use rex.x only for xmm registers.
 701         (OP_EM): Use rex.z only for xmm registers.
 702
 703 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 704
 705         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 706         move/branch operations to the bottom so that VR5400 multimedia
 707         instructions take precedence in disassembly.
 708
 709 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 710
 711         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 712         ISA-specific "break" encoding.
 713
 714 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 715
 716         * arm-opc.h: Fix typo in comment.
 717
 718 2004-07-11  Andreas Schwab  <schwab@suse.de>
 719
 720         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 721
 722 2004-07-09  Andreas Schwab  <schwab@suse.de>
 723
 724         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 725
 726 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 727
 728         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 729         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 730         (crx-dis.lo): New target.
 731         (crx-opc.lo): Likewise.
 732         * Makefile.in: Regenerate.
 733         * configure.in: Handle bfd_crx_arch.
 734         * configure: Regenerate.
 735         * crx-dis.c: New file.
 736         * crx-opc.c: New file.
 737         * disassemble.c (ARCH_crx): Define.
 738         (disassembler): Handle ARCH_crx.
 739
 740 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 741
 742         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 743         * ia64-asmtab.c: Regnerate.
 744
 745 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 746
 747         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 748         (extract_fxm): Don't test dialect.
 749         (XFXFXM_MASK): Include the power4 bit.
 750         (XFXM): Add p4 param.
 751         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 752
 753 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 754
 755         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 756         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 757
 758 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 759
 760         * ppc-opc.c (BH, XLBH_MASK): Define.
 761         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 762
 763 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 764
 765         * i386-dis.c (x_mode): Comment.
 766         (two_source_ops): File scope.
 767         (float_mem): Correct fisttpll and fistpll.
 768         (float_mem_mode): New table.
 769         (dofloat): Use it.
 770         (OP_E): Correct intel mode PTR output.
 771         (ptr_reg): Use open_char and close_char.
 772         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 773         operands.  Set two_source_ops.
 774
 775 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 776
 777         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 778         instead of _raw_size.
 779
 780 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 781
 782         * ia64-gen.c (in_iclass): Handle more postinc st
 783         and ld variants.
 784         * ia64-asmtab.c: Rebuilt.
 785
 786 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 787
 788         * s390-opc.txt: Correct architecture mask for some opcodes.
 789         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 790         in the esa mode as well.
 791
 792 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 793
 794         * sh-dis.c (target_arch): Make unsigned.
 795         (print_insn_sh): Replace (most of) switch with a call to
 796         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 797         * sh-opc.h: Redefine architecture flags values.
 798         Add sh3-nommu architecture.
 799         Reorganise <arch>_up macros so they make more visual sense.
 800         (SH_MERGE_ARCH_SET): Define new macro.
 801         (SH_VALID_BASE_ARCH_SET): Likewise.
 802         (SH_VALID_MMU_ARCH_SET): Likewise.
 803         (SH_VALID_CO_ARCH_SET): Likewise.
 804         (SH_VALID_ARCH_SET): Likewise.
 805         (SH_MERGE_ARCH_SET_VALID): Likewise.
 806         (SH_ARCH_SET_HAS_FPU): Likewise.
 807         (SH_ARCH_SET_HAS_DSP): Likewise.
 808         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 809         (sh_get_arch_from_bfd_mach): Add prototype.
 810         (sh_get_arch_up_from_bfd_mach): Likewise.
 811         (sh_get_bfd_mach_from_arch_set): Likewise.
 812         (sh_merge_bfd_arc): Likewise.
 813
 814 2004-05-24  Peter Barada  <peter@the-baradas.com>
 815
 816         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 817         into new match_insn_m68k function.  Loop over canidate
 818         matches and select first that completely matches.
 819         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 820         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 821         to verify addressing for MAC/EMAC.
 822         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 823         reigster halves since 'fpu' and 'spl' look misleading.
 824         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 825         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 826         first, tighten up match masks.
 827         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 828         'size' from special case code in print_insn_m68k to
 829         determine decode size of insns.
 830
 831 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 832
 833         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 834         well as when -mpower4.
 835
 836 2004-05-13  Nick Clifton  <nickc@redhat.com>
 837
 838         * po/fr.po: Updated French translation.
 839
 840 2004-05-05  Peter Barada  <peter@the-baradas.com>
 841
 842         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 843         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 844         * m68k-op.c: Switch from ColdFire chips to core variants.
 845
 846 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 847
 848         PR 147.
 849         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 850
 851 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 852
 853         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 854         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 855
 856 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 857
 858         * sh-dis.c (print_insn_sh): Print the value in constant pool
 859         as a symbol if it looks like a symbol.
 860
 861 2004-04-22  Peter Barada <peter@the-baradas.com>
 862
 863         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 864         appropriate ColdFire architectures.
 865         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 866         mask addressing.
 867         Add EMAC instructions, fix MAC instructions. Remove
 868         macmw/macml/msacmw/msacml instructions since mask addressing now
 869         supported.
 870
 871 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 872
 873         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 874         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 875         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 876         macro.  Adjust all users.
 877
 878 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 879
 880         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 881         separately.
 882
 883 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 884
 885         * m32r-asm.c: Regenerate.
 886
 887 2004-03-29  Stan Shebs  <shebs@apple.com>
 888
 889         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 890         used.
 891
 892 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 893
 894         * aclocal.m4: Regenerate.
 895         * config.in: Regenerate.
 896         * configure: Regenerate.
 897         * po/POTFILES.in: Regenerate.
 898         * po/opcodes.pot: Regenerate.
 899
 900 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 901
 902         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 903         PPC_OPERANDS_GPR_0.
 904         * ppc-opc.c (RA0): Define.
 905         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 906         (RAOPT): Rename from RAO.  Update all uses.
 907         (powerpc_opcodes): Use RA0 as appropriate.
 908
 909 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 910
 911         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 912
 913 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 914
 915         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 916
 917 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 918
 919         * i386-dis.c (GRPPLOCK): Delete.
 920         (grps): Delete GRPPLOCK entry.
 921
 922 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 923
 924         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 925         (M, Mp): Use OP_M.
 926         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 927         (GRPPADLCK): Define.
 928         (dis386): Use NOP_Fixup on "nop".
 929         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 930         (twobyte_has_modrm): Set for 0xa7.
 931         (padlock_table): Delete.  Move to..
 932         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 933         and clflush.
 934         (print_insn): Revert PADLOCK_SPECIAL code.
 935         (OP_E): Delete sfence, lfence, mfence checks.
 936
 937 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 938
 939         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 940         (INVLPG_Fixup): New function.
 941         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 942
 943 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 944
 945         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 946         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 947         (padlock_table): New struct with PadLock instructions.
 948         (print_insn): Handle PADLOCK_SPECIAL.
 949
 950 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 951
 952         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 953         (OP_E): Twiddle clflush to sfence here.
 954
 955 2004-03-08  Nick Clifton  <nickc@redhat.com>
 956
 957         * po/de.po: Updated German translation.
 958
 959 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 960
 961         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 962         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 963         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 964         accordingly.
 965
 966 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 967
 968         * frv-asm.c: Regenerate.
 969         * frv-desc.c: Regenerate.
 970         * frv-desc.h: Regenerate.
 971         * frv-dis.c: Regenerate.
 972         * frv-ibld.c: Regenerate.
 973         * frv-opc.c: Regenerate.
 974         * frv-opc.h: Regenerate.
 975
 976 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 977
 978         * frv-desc.c, frv-opc.c: Regenerate.
 979
 980 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 981
 982         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 983
 984 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 985
 986         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 987         Also correct mistake in the comment.
 988
 989 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 990
 991         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 992         ensure that double registers have even numbers.
 993         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 994         that reserved instruction 0xfffd does not decode the same
 995         as 0xfdfd (ftrv).
 996         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 997         REG_N refers to a double register.
 998         Add REG_N_B01 nibble type and use it instead of REG_NM
 999         in ftrv.
1000         Adjust the bit patterns in a few comments.
1001
1002 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1003
1004         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1005
1006 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1007
1008         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1009
1010 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1011
1012         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1013
1014 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1015
1016         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1017         mtivor32, mtivor33, mtivor34.
1018
1019 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1020
1021         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1022
1023 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1024
1025         * arm-opc.h Maverick accumulator register opcode fixes.
1026
1027 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1028
1029         * m32r-dis.c: Regenerate.
1030
1031 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1032
1033         * sh-opc.h (sh_table): "fsrra", not "fssra".
1034
1035 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1036
1037         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1038         contraints.
1039
1040 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1041
1042         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1043
1044 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1045
1046         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1047         1.  Don't print scale factor on AT&T mode when index missing.
1048
1049 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1050
1051         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1052         when loaded into XR registers.
1053
1054 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1055
1056         * frv-desc.h: Regenerate.
1057         * frv-desc.c: Regenerate.
1058         * frv-opc.c: Regenerate.
1059
1060 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1061
1062         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1063
1064 2004-01-09  Paul Brook  <paul@codesourcery.com>
1065
1066         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1067         specific opcodes.
1068
1069 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1070
1071         * Makefile.am (libopcodes_la_DEPENDENCIES)
1072         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1073         comment about the problem.
1074         * Makefile.in: Regenerate.
1075
1076 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1077
1078         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1079         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1080         cut&paste errors in shifting/truncating numerical operands.
1081         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1082         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1083         (parse_uslo16): Likewise.
1084         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1085         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1086         (parse_s12): Likewise.
1087         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1088         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1089         (parse_uslo16): Likewise.
1090         (parse_uhi16): Parse gothi and gotfuncdeschi.
1091         (parse_d12): Parse got12 and gotfuncdesc12.
1092         (parse_s12): Likewise.
1093
1094 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1095
1096         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1097         instruction which looks similar to an 'rla' instruction.
1098
1099 For older changes see ChangeLog-0203
1100 \f
1101 Local Variables:
1102 mode: change-log
1103 left-margin: 8
1104 fill-column: 74
1105 version-control: never
1106 End: