1 2020-08-30 Alan Modra <amodra@gmail.com>
3 * cr16-dis.c: Formatting.
4 (parameter): Delete struct typedef. Use dwordU instead
6 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
8 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
10 2020-08-29 Alan Modra <amodra@gmail.com>
13 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
14 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
16 2020-08-28 Alan Modra <amodra@gmail.com>
20 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
21 (extract_normal): Likewise.
22 (insert_normal): Likewise, and move past zero length test.
23 (put_insn_int_value): Handle mask for zero length, use 1UL.
24 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
25 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
26 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
27 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
29 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
31 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
32 (csky_dis_info): Add member isa.
33 (csky_find_inst_info): Skip instructions that do not belong to
35 (csky_get_disassembler): Get infomation from attribute section.
36 (print_insn_csky): Set defualt ISA flag.
37 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
38 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
39 isa_flag32'type to unsigned 64 bits.
41 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
43 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
45 2020-08-26 David Faust <david.faust@oracle.com>
47 * bpf-desc.c: Regenerate.
48 * bpf-desc.h: Likewise.
49 * bpf-opc.c: Likewise.
50 * bpf-opc.h: Likewise.
51 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
54 2020-08-25 Alan Modra <amodra@gmail.com>
57 * vax-dis.c (parse_disassembler_options): Always add at least one
58 to entry_addr_total_slots.
60 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
62 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
63 in other CPUs to speed up disassembling.
64 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
65 Change plsli.u16 to plsli.16, change sync's operand format.
67 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
69 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
71 2020-08-21 Nick Clifton <nickc@redhat.com>
73 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
76 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
78 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
80 2020-08-19 Alan Modra <amodra@gmail.com>
82 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
85 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
87 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
88 <xvcvbf16spn>: ...to this.
90 2020-08-12 Alex Coplan <alex.coplan@arm.com>
92 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
94 2020-08-12 Nick Clifton <nickc@redhat.com>
96 * po/sr.po: Updated Serbian translation.
98 2020-08-11 Alan Modra <amodra@gmail.com>
100 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
102 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
104 * aarch64-opc.c (aarch64_print_operand):
105 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
106 (aarch64_sys_reg_supported_p): Function removed.
107 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
108 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
111 2020-08-10 Alan Modra <amodra@gmail.com>
113 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
116 2020-08-10 Alan Modra <amodra@gmail.com>
118 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
119 Enable icbt for power5, miso for power8.
121 2020-08-10 Alan Modra <amodra@gmail.com>
123 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
124 mtvsrd, and similarly for mfvsrd.
126 2020-08-04 Christian Groessler <chris@groessler.org>
127 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
129 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
130 opcodes (special "out" to absolute address).
131 * z8k-opc.h: Regenerate.
133 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
136 * i386-opc.h (Prefix_Disp8): New.
137 (Prefix_Disp16): Likewise.
138 (Prefix_Disp32): Likewise.
139 (Prefix_Load): Likewise.
140 (Prefix_Store): Likewise.
141 (Prefix_VEX): Likewise.
142 (Prefix_VEX3): Likewise.
143 (Prefix_EVEX): Likewise.
144 (Prefix_REX): Likewise.
145 (Prefix_NoOptimize): Likewise.
146 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
147 * i386-tbl.h: Regenerated.
149 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
151 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
152 default case with abort() instead of printing an error message and
153 continuing, to avoid a maybe-uninitialized warning.
155 2020-07-24 Nick Clifton <nickc@redhat.com>
157 * po/de.po: Updated German translation.
159 2020-07-21 Jan Beulich <jbeulich@suse.com>
161 * i386-dis.c (OP_E_memory): Revert previous change.
163 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
166 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
167 without base nor index registers.
169 2020-07-15 Jan Beulich <jbeulich@suse.com>
171 * i386-dis.c (putop): Move 'V' and 'W' handling.
173 2020-07-15 Jan Beulich <jbeulich@suse.com>
175 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
176 construct for push/pop of register.
177 (putop): Honor cond when handling 'P'. Drop handling of plain
180 2020-07-15 Jan Beulich <jbeulich@suse.com>
182 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
183 description. Drop '&' description. Use P for push of immediate,
184 pushf/popf, enter, and leave. Use %LP for lret/retf.
185 (dis386_twobyte): Use P for push/pop of fs/gs.
186 (reg_table): Use P for push/pop. Use @ for near call/jmp.
187 (x86_64_table): Use P for far call/jmp.
188 (putop): Drop handling of 'U' and '&'. Move and adjust handling
189 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
191 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
192 and dqw_mode (unconditional).
194 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
197 * i386-dis.c (OP_E_memory): Without base nor index registers,
198 32-bit displacement to 64 bits.
200 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
202 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
203 faulty double register pair is detected.
205 2020-07-14 Jan Beulich <jbeulich@suse.com>
207 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
209 2020-07-14 Jan Beulich <jbeulich@suse.com>
211 * i386-dis.c (OP_R, Rm): Delete.
212 (MOD_0F24, MOD_0F26): Rename to ...
213 (X86_64_0F24, X86_64_0F26): ... respectively.
214 (dis386): Update 'L' and 'Z' comments.
215 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
217 (mod_table): Move opcode 0F24 and 0F26 entries ...
218 (x86_64_table): ... here.
219 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
222 2020-07-14 Jan Beulich <jbeulich@suse.com>
224 * i386-dis.c (Rd, Rdq, MaskR): Delete.
225 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
226 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
227 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
228 MOD_EVEX_0F387C): New enumerators.
229 (reg_table): Use Edq for rdssp.
230 (prefix_table): Use Edq for incssp.
231 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
232 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
233 ktest*, and kshift*. Use Edq / MaskE for kmov*.
234 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
235 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
236 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
237 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
238 0F3828_P_1 and 0F3838_P_1.
239 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
240 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
242 2020-07-14 Jan Beulich <jbeulich@suse.com>
244 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
245 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
246 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
247 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
248 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
249 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
250 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
251 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
252 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
253 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
254 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
255 (reg_table, prefix_table, three_byte_table, vex_table,
256 vex_len_table, mod_table, rm_table): Replace / remove respective
258 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
259 of PREFIX_DATA in used_prefixes.
261 2020-07-14 Jan Beulich <jbeulich@suse.com>
263 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
264 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
265 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
266 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
267 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
268 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
269 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
270 VEX_W_0F3A33_L_0): Delete.
271 (dis386): Adjust "BW" description.
272 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
273 0F3A31, 0F3A32, and 0F3A33.
274 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
276 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
279 2020-07-14 Jan Beulich <jbeulich@suse.com>
281 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
282 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
283 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
284 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
285 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
286 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
287 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
288 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
289 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
290 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
291 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
292 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
293 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
294 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
295 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
296 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
297 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
298 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
299 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
300 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
301 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
302 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
303 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
304 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
305 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
306 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
307 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
308 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
309 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
310 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
311 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
312 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
313 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
314 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
315 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
316 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
317 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
318 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
319 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
320 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
321 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
322 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
323 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
324 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
325 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
326 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
327 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
328 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
329 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
330 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
331 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
332 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
333 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
334 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
335 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
336 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
337 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
338 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
339 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
340 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
341 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
342 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
343 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
344 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
345 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
346 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
347 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
348 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
349 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
350 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
351 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
352 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
353 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
354 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
355 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
356 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
357 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
358 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
359 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
360 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
361 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
362 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
363 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
364 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
365 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
366 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
367 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
368 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
369 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
370 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
371 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
372 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
373 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
374 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
375 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
376 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
377 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
378 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
379 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
380 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
381 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
382 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
383 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
384 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
385 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
386 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
387 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
388 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
389 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
390 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
391 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
392 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
393 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
394 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
395 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
396 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
397 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
398 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
399 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
400 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
401 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
402 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
403 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
404 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
405 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
406 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
407 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
408 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
409 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
410 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
411 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
412 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
413 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
414 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
415 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
416 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
417 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
418 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
419 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
420 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
421 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
422 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
423 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
424 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
425 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
426 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
427 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
428 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
429 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
430 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
431 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
432 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
433 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
434 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
435 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
436 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
437 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
438 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
439 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
440 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
441 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
442 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
443 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
444 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
445 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
446 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
447 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
448 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
449 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
450 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
451 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
452 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
453 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
454 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
455 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
456 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
457 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
458 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
459 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
460 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
461 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
462 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
463 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
464 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
465 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
466 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
467 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
468 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
469 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
470 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
471 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
472 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
473 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
474 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
475 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
476 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
477 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
478 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
479 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
480 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
481 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
482 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
483 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
484 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
485 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
486 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
487 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
488 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
489 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
490 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
491 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
492 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
493 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
494 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
495 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
496 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
497 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
498 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
499 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
500 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
501 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
502 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
503 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
504 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
505 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
506 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
507 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
508 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
509 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
510 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
511 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
512 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
513 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
514 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
515 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
516 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
517 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
518 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
519 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
520 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
521 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
522 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
523 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
524 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
525 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
526 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
527 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
528 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
529 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
530 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
531 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
532 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
533 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
534 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
535 EVEX_W_0F3A72_P_2): Rename to ...
536 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
537 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
538 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
539 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
540 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
541 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
542 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
543 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
544 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
545 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
546 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
547 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
548 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
549 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
550 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
551 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
552 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
553 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
554 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
555 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
556 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
557 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
558 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
559 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
560 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
561 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
562 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
563 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
564 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
565 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
566 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
567 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
568 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
569 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
570 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
571 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
572 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
573 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
574 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
575 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
576 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
577 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
578 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
579 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
580 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
581 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
582 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
583 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
584 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
585 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
586 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
587 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
588 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
589 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
590 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
591 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
592 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
593 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
594 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
595 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
596 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
597 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
598 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
599 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
600 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
601 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
602 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
603 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
604 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
605 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
606 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
607 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
609 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
610 vex_w_table, mod_table): Replace / remove respective entries.
611 (print_insn): Move up dp->prefix_requirement handling. Handle
613 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
614 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
615 Replace / remove respective entries.
617 2020-07-14 Jan Beulich <jbeulich@suse.com>
619 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
620 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
621 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
622 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
623 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
625 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
626 0F2C, 0F2D, 0F2E, and 0F2F.
627 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
630 2020-07-14 Jan Beulich <jbeulich@suse.com>
632 * i386-dis.c (OP_VexR, VexScalarR): New.
633 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
634 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
635 need_vex_reg): Delete.
636 (prefix_table): Replace VexScalar by VexScalarR and
637 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
638 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
639 (vex_len_table): Replace EXqVexScalarS by EXqS.
640 (get_valid_dis386): Don't set need_vex_reg.
641 (print_insn): Don't initialize need_vex_reg.
642 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
643 q_scalar_swap_mode cases.
644 (OP_EX): Don't check for d_scalar_swap_mode and
646 (OP_VEX): Done check need_vex_reg.
647 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
648 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
649 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
651 2020-07-14 Jan Beulich <jbeulich@suse.com>
653 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
654 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
655 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
656 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
657 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
658 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
659 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
660 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
661 (vex_table): Replace Vex128 by Vex.
662 (vex_len_table): Likewise. Adjust referenced enum names.
663 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
664 referenced enum names.
665 (OP_VEX): Drop vex128_mode and vex256_mode cases.
666 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
668 2020-07-14 Jan Beulich <jbeulich@suse.com>
670 * i386-dis.c (dis386): "LW" description now applies to "DQ".
671 (putop): Handle "DQ". Don't handle "LW" anymore.
672 (prefix_table, mod_table): Replace %LW by %DQ.
673 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
675 2020-07-14 Jan Beulich <jbeulich@suse.com>
677 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
678 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
679 d_scalar_swap_mode case handling. Move shift adjsutment into
680 the case its applicable to.
682 2020-07-14 Jan Beulich <jbeulich@suse.com>
684 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
685 (EXbScalar, EXwScalar): Fold to ...
686 (EXbwUnit): ... this.
687 (b_scalar_mode, w_scalar_mode): Fold to ...
688 (bw_unit_mode): ... this.
689 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
690 w_scalar_mode handling by bw_unit_mode one.
691 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
693 * i386-dis-evex-prefix.h: ... here.
695 2020-07-14 Jan Beulich <jbeulich@suse.com>
697 * i386-dis.c (PCMPESTR_Fixup): Delete.
698 (dis386): Adjust "LQ" description.
699 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
700 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
701 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
702 vpcmpestrm, and vpcmpestri.
703 (putop): Honor "cond" when handling LQ.
704 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
705 vcvtsi2ss and vcvtusi2ss.
706 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
707 vcvtsi2sd and vcvtusi2sd.
709 2020-07-14 Jan Beulich <jbeulich@suse.com>
711 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
712 (simd_cmp_op): Add const.
713 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
714 (CMP_Fixup): Handle VEX case.
715 (prefix_table): Replace VCMP by CMP.
716 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
718 2020-07-14 Jan Beulich <jbeulich@suse.com>
720 * i386-dis.c (MOVBE_Fixup): Delete.
722 (prefix_table): Use Mv for movbe entries.
724 2020-07-14 Jan Beulich <jbeulich@suse.com>
726 * i386-dis.c (CRC32_Fixup): Delete.
727 (prefix_table): Use Eb/Ev for crc32 entries.
729 2020-07-14 Jan Beulich <jbeulich@suse.com>
731 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
732 Conditionalize invocations of "USED_REX (0)".
734 2020-07-14 Jan Beulich <jbeulich@suse.com>
736 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
737 CH, DH, BH, AX, DX): Delete.
738 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
739 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
740 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
742 2020-07-10 Lili Cui <lili.cui@intel.com>
744 * i386-dis.c (TMM): New.
747 (MVexSIBMEM): Likewise.
748 (tmm_mode): Likewise.
749 (vex_sibmem_mode): Likewise.
750 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
751 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
752 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
753 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
754 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
755 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
756 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
757 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
758 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
759 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
760 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
761 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
762 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
763 (PREFIX_VEX_0F3849_X86_64): Likewise.
764 (PREFIX_VEX_0F384B_X86_64): Likewise.
765 (PREFIX_VEX_0F385C_X86_64): Likewise.
766 (PREFIX_VEX_0F385E_X86_64): Likewise.
767 (X86_64_VEX_0F3849): Likewise.
768 (X86_64_VEX_0F384B): Likewise.
769 (X86_64_VEX_0F385C): Likewise.
770 (X86_64_VEX_0F385E): Likewise.
771 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
772 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
773 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
774 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
775 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
776 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
777 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
778 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
779 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
780 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
781 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
782 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
783 (VEX_W_0F3849_X86_64_P_0): Likewise.
784 (VEX_W_0F3849_X86_64_P_2): Likewise.
785 (VEX_W_0F3849_X86_64_P_3): Likewise.
786 (VEX_W_0F384B_X86_64_P_1): Likewise.
787 (VEX_W_0F384B_X86_64_P_2): Likewise.
788 (VEX_W_0F384B_X86_64_P_3): Likewise.
789 (VEX_W_0F385C_X86_64_P_1): Likewise.
790 (VEX_W_0F385E_X86_64_P_0): Likewise.
791 (VEX_W_0F385E_X86_64_P_1): Likewise.
792 (VEX_W_0F385E_X86_64_P_2): Likewise.
793 (VEX_W_0F385E_X86_64_P_3): Likewise.
794 (names_tmm): Likewise.
795 (att_names_tmm): Likewise.
796 (intel_operand_size): Handle void_mode.
797 (OP_XMM): Handle tmm_mode.
800 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
801 CpuAMX_BF16 and CpuAMX_TILE.
802 (operand_type_shorthands): Add RegTMM.
803 (operand_type_init): Likewise.
804 (operand_types): Add Tmmword.
805 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
806 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
807 * i386-opc.h (CpuAMX_INT8): New.
808 (CpuAMX_BF16): Likewise.
809 (CpuAMX_TILE): Likewise.
812 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
813 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
814 (i386_operand_type): Add tmmword.
815 * i386-opc.tbl: Add AMX instructions.
816 * i386-reg.tbl: Add AMX registers.
817 * i386-init.h: Regenerated.
818 * i386-tbl.h: Likewise.
820 2020-07-08 Jan Beulich <jbeulich@suse.com>
822 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
823 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
825 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
826 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
828 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
829 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
830 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
831 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
832 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
833 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
834 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
835 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
836 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
837 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
838 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
839 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
840 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
841 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
842 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
843 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
844 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
845 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
846 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
847 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
848 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
849 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
850 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
851 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
852 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
853 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
854 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
855 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
856 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
857 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
858 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
859 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
860 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
861 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
862 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
863 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
864 (reg_table): Re-order XOP entries. Adjust their operands.
865 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
866 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
867 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
868 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
869 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
870 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
871 entries by references ...
872 (vex_len_table): ... to resepctive new entries here. For several
873 new and existing entries reference ...
874 (vex_w_table): ... new entries here.
875 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
877 2020-07-08 Jan Beulich <jbeulich@suse.com>
879 * i386-dis.c (XMVexScalarI4): Define.
880 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
881 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
882 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
883 (vex_len_table): Move scalar FMA4 entries ...
884 (prefix_table): ... here.
885 (OP_REG_VexI4): Handle scalar_mode.
886 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
887 * i386-tbl.h: Re-generate.
889 2020-07-08 Jan Beulich <jbeulich@suse.com>
891 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
893 (OP_VexW, VexW): New.
894 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
895 for shifts and rotates by register.
897 2020-07-08 Jan Beulich <jbeulich@suse.com>
899 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
900 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
901 OP_EX_VexReg): Delete.
902 (OP_VexI4, VexI4): New.
903 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
904 (prefix_table): ... here.
905 (print_insn): Drop setting of vex_w_done.
907 2020-07-08 Jan Beulich <jbeulich@suse.com>
909 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
910 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
911 (xop_table): Replace operands of 4-operand insns.
912 (OP_REG_VexI4): Move VEX.W based operand swaping here.
914 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
916 * arc-opc.c (insert_rbd): New function.
919 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
922 2020-07-07 Jan Beulich <jbeulich@suse.com>
924 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
925 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
926 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
927 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
929 (putop): Handle "BW".
930 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
931 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
933 * i386-dis-evex-prefix.h: ... here.
935 2020-07-06 Jan Beulich <jbeulich@suse.com>
937 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
938 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
939 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
940 VEX_W_0FXOP_09_83): New enumerators.
941 (xop_table): Reference the above.
942 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
943 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
944 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
945 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
947 2020-07-06 Jan Beulich <jbeulich@suse.com>
949 * i386-dis.c (EVEX_W_0F3838_P_1,
950 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
951 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
952 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
953 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
954 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
955 (putop): Centralize management of last[]. Delete SAVE_LAST.
956 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
957 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
958 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
959 * i386-dis-evex-prefix.h: here.
961 2020-07-06 Jan Beulich <jbeulich@suse.com>
963 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
964 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
965 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
966 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
968 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
969 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
970 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
971 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
972 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
973 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
974 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
975 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
977 * i386-dis-evex-len.h: Adjust comments.
978 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
979 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
980 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
981 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
982 MOD_EVEX_0F385B_P_2_W_1 table entries.
983 * i386-dis-evex-w.h: Reference mod_table[] for
984 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
987 2020-07-06 Jan Beulich <jbeulich@suse.com>
989 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
990 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
992 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
993 Likewise. Mark 256-bit entries invalid.
995 2020-07-06 Jan Beulich <jbeulich@suse.com>
997 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
998 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
999 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1000 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1001 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1002 PREFIX_EVEX_0F382B): Delete.
1003 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1004 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1005 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1006 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1007 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1009 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1010 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1011 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1012 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1014 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1015 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1016 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1017 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1018 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1019 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1020 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1021 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1022 PREFIX_EVEX_0F382B): Remove table entries.
1023 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1024 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1025 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1027 2020-07-06 Jan Beulich <jbeulich@suse.com>
1029 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1030 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1032 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1033 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1034 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1035 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1038 2020-07-06 Jan Beulich <jbeulich@suse.com>
1040 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1041 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1042 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1043 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1044 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1045 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1046 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1047 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1048 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1051 2020-07-06 Jan Beulich <jbeulich@suse.com>
1053 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1054 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1055 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1057 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1059 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1061 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1063 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1065 2020-07-06 Jan Beulich <jbeulich@suse.com>
1067 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1068 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1069 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1070 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1071 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1072 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1073 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1074 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1075 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1076 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1077 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1078 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1079 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1080 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1081 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1082 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1083 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1084 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1085 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1086 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1087 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1088 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1089 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1090 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1091 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1092 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1093 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1094 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1095 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1096 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1097 (prefix_table): Add EXxEVexR to FMA table entries.
1098 (OP_Rounding): Move abort() invocation.
1099 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1100 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1101 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1102 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1103 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1104 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1105 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1106 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1107 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1108 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1110 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1111 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1112 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1113 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1114 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1115 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1116 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1117 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1118 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1119 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1120 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1121 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1122 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1123 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1124 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1125 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1126 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1127 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1128 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1129 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1130 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1131 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1132 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1133 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1134 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1135 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1136 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1137 Delete table entries.
1138 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1139 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1140 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1143 2020-07-06 Jan Beulich <jbeulich@suse.com>
1145 * i386-dis.c (EXqScalarS): Delete.
1146 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1147 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1149 2020-07-06 Jan Beulich <jbeulich@suse.com>
1151 * i386-dis.c (safe-ctype.h): Include.
1152 (EXdScalar, EXqScalar): Delete.
1153 (d_scalar_mode, q_scalar_mode): Delete.
1154 (prefix_table, vex_len_table): Use EXxmm_md in place of
1155 EXdScalar and EXxmm_mq in place of EXqScalar.
1156 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1157 d_scalar_mode and q_scalar_mode.
1158 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1159 (vmovsd): Use EXxmm_mq.
1161 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1164 * arc-dis.c: Fix spelling mistake.
1165 * po/opcodes.pot: Regenerate.
1167 2020-07-06 Nick Clifton <nickc@redhat.com>
1169 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1170 * po/uk.po: Updated Ukranian translation.
1172 2020-07-04 Nick Clifton <nickc@redhat.com>
1174 * configure: Regenerate.
1175 * po/opcodes.pot: Regenerate.
1177 2020-07-04 Nick Clifton <nickc@redhat.com>
1179 Binutils 2.35 branch created.
1181 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1183 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1184 * i386-opc.h (VexSwapSources): New.
1185 (i386_opcode_modifier): Add vexswapsources.
1186 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1187 with two source operands swapped.
1188 * i386-tbl.h: Regenerated.
1190 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1192 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1193 unprivileged CSR can also be initialized.
1195 2020-06-29 Alan Modra <amodra@gmail.com>
1197 * arm-dis.c: Use C style comments.
1198 * cr16-opc.c: Likewise.
1199 * ft32-dis.c: Likewise.
1200 * moxie-opc.c: Likewise.
1201 * tic54x-dis.c: Likewise.
1202 * s12z-opc.c: Remove useless comment.
1203 * xgate-dis.c: Likewise.
1205 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1207 * i386-opc.tbl: Add a blank line.
1209 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1211 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1212 (VecSIB128): Renamed to ...
1214 (VecSIB256): Renamed to ...
1216 (VecSIB512): Renamed to ...
1218 (VecSIB): Renamed to ...
1220 (i386_opcode_modifier): Replace vecsib with sib.
1221 * i386-opc.tbl (VecSIB128): New.
1222 (VecSIB256): Likewise.
1223 (VecSIB512): Likewise.
1224 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1225 and VecSIB512, respectively.
1227 2020-06-26 Jan Beulich <jbeulich@suse.com>
1229 * i386-dis.c: Adjust description of I macro.
1230 (x86_64_table): Drop use of I.
1231 (float_mem): Replace use of I.
1232 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1234 2020-06-26 Jan Beulich <jbeulich@suse.com>
1236 * i386-dis.c: (print_insn): Avoid straight assignment to
1237 priv.orig_sizeflag when processing -M sub-options.
1239 2020-06-25 Jan Beulich <jbeulich@suse.com>
1241 * i386-dis.c: Adjust description of J macro.
1242 (dis386, x86_64_table, mod_table): Replace J.
1243 (putop): Remove handling of J.
1245 2020-06-25 Jan Beulich <jbeulich@suse.com>
1247 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1249 2020-06-25 Jan Beulich <jbeulich@suse.com>
1251 * i386-dis.c: Adjust description of "LQ" macro.
1252 (dis386_twobyte): Use LQ for sysret.
1253 (putop): Adjust handling of LQ.
1255 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1257 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1258 * riscv-dis.c: Include elfxx-riscv.h.
1260 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1262 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1264 2020-06-17 Lili Cui <lili.cui@intel.com>
1266 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1268 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1271 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1272 * i386-opc.tbl: Likewise.
1273 * i386-tbl.h: Regenerated.
1275 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1277 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1279 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1281 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1282 (SR_CORE): Likewise.
1283 (SR_FEAT): Likewise.
1285 (SR_V8_1): Likewise.
1286 (SR_V8_2): Likewise.
1287 (SR_V8_3): Likewise.
1288 (SR_V8_4): Likewise.
1291 (SR_SSBS): Likewise.
1293 (SR_ID_PFR2): Likewise.
1294 (SR_PROFILE): Likewise.
1295 (SR_MEMTAG): Likewise.
1296 (SR_SCXTNUM): Likewise.
1297 (aarch64_sys_regs): Refactor to store feature information in the table.
1298 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1299 that now describe their own features.
1300 (aarch64_pstatefield_supported_p): Likewise.
1302 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1304 * i386-dis.c (prefix_table): Fix a typo in comments.
1306 2020-06-09 Jan Beulich <jbeulich@suse.com>
1308 * i386-dis.c (rex_ignored): Delete.
1309 (ckprefix): Drop rex_ignored initialization.
1310 (get_valid_dis386): Drop setting of rex_ignored.
1311 (print_insn): Drop checking of rex_ignored. Don't record data
1312 size prefix as used with VEX-and-alike encodings.
1314 2020-06-09 Jan Beulich <jbeulich@suse.com>
1316 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1317 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1318 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1319 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1320 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1321 VEX_0F12, and VEX_0F16.
1322 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1323 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1324 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1325 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1326 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1327 MOD_VEX_0F16_PREFIX_2 entries.
1329 2020-06-09 Jan Beulich <jbeulich@suse.com>
1331 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1332 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1333 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1334 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1335 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1336 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1337 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1338 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1339 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1340 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1341 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1342 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1343 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1344 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1345 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1346 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1347 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1348 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1349 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1350 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1351 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1352 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1353 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1354 EVEX_W_0FC6_P_2): Delete.
1355 (print_insn): Add EVEX.W vs embedded prefix consistency check
1356 to prefix validation.
1357 * i386-dis-evex.h (evex_table): Don't further descend for
1358 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1359 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1361 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1362 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1363 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1364 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1365 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1366 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1367 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1368 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1369 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1370 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1371 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1372 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1373 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1374 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1375 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1376 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1377 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1378 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1379 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1380 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1381 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1382 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1383 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1384 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1385 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1386 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1387 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1389 2020-06-09 Jan Beulich <jbeulich@suse.com>
1391 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1392 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1393 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1395 (print_insn): Drop pointless check against bad_opcode. Split
1396 prefix validation into legacy and VEX-and-alike parts.
1397 (putop): Re-work 'X' macro handling.
1399 2020-06-09 Jan Beulich <jbeulich@suse.com>
1401 * i386-dis.c (MOD_0F51): Rename to ...
1402 (MOD_0F50): ... this.
1404 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1406 * arm-dis.c (arm_opcodes): Add dfb.
1407 (thumb32_opcodes): Add dfb.
1409 2020-06-08 Jan Beulich <jbeulich@suse.com>
1411 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1413 2020-06-06 Alan Modra <amodra@gmail.com>
1415 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1417 2020-06-05 Alan Modra <amodra@gmail.com>
1419 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1420 size is large enough.
1422 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1424 * disassemble.c (disassemble_init_for_target): Set endian_code for
1426 * bpf-desc.c: Regenerate.
1427 * bpf-opc.c: Likewise.
1428 * bpf-dis.c: Likewise.
1430 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1432 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1433 (cgen_put_insn_value): Likewise.
1434 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1435 * cgen-dis.in (print_insn): Likewise.
1436 * cgen-ibld.in (insert_1): Likewise.
1437 (insert_1): Likewise.
1438 (insert_insn_normal): Likewise.
1439 (extract_1): Likewise.
1440 * bpf-dis.c: Regenerate.
1441 * bpf-ibld.c: Likewise.
1442 * bpf-ibld.c: Likewise.
1443 * cgen-dis.in: Likewise.
1444 * cgen-ibld.in: Likewise.
1445 * cgen-opc.c: Likewise.
1446 * epiphany-dis.c: Likewise.
1447 * epiphany-ibld.c: Likewise.
1448 * fr30-dis.c: Likewise.
1449 * fr30-ibld.c: Likewise.
1450 * frv-dis.c: Likewise.
1451 * frv-ibld.c: Likewise.
1452 * ip2k-dis.c: Likewise.
1453 * ip2k-ibld.c: Likewise.
1454 * iq2000-dis.c: Likewise.
1455 * iq2000-ibld.c: Likewise.
1456 * lm32-dis.c: Likewise.
1457 * lm32-ibld.c: Likewise.
1458 * m32c-dis.c: Likewise.
1459 * m32c-ibld.c: Likewise.
1460 * m32r-dis.c: Likewise.
1461 * m32r-ibld.c: Likewise.
1462 * mep-dis.c: Likewise.
1463 * mep-ibld.c: Likewise.
1464 * mt-dis.c: Likewise.
1465 * mt-ibld.c: Likewise.
1466 * or1k-dis.c: Likewise.
1467 * or1k-ibld.c: Likewise.
1468 * xc16x-dis.c: Likewise.
1469 * xc16x-ibld.c: Likewise.
1470 * xstormy16-dis.c: Likewise.
1471 * xstormy16-ibld.c: Likewise.
1473 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1475 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1476 (print_insn_): Handle instruction endian.
1477 * bpf-dis.c: Regenerate.
1478 * bpf-desc.c: Regenerate.
1479 * epiphany-dis.c: Likewise.
1480 * epiphany-desc.c: Likewise.
1481 * fr30-dis.c: Likewise.
1482 * fr30-desc.c: Likewise.
1483 * frv-dis.c: Likewise.
1484 * frv-desc.c: Likewise.
1485 * ip2k-dis.c: Likewise.
1486 * ip2k-desc.c: Likewise.
1487 * iq2000-dis.c: Likewise.
1488 * iq2000-desc.c: Likewise.
1489 * lm32-dis.c: Likewise.
1490 * lm32-desc.c: Likewise.
1491 * m32c-dis.c: Likewise.
1492 * m32c-desc.c: Likewise.
1493 * m32r-dis.c: Likewise.
1494 * m32r-desc.c: Likewise.
1495 * mep-dis.c: Likewise.
1496 * mep-desc.c: Likewise.
1497 * mt-dis.c: Likewise.
1498 * mt-desc.c: Likewise.
1499 * or1k-dis.c: Likewise.
1500 * or1k-desc.c: Likewise.
1501 * xc16x-dis.c: Likewise.
1502 * xc16x-desc.c: Likewise.
1503 * xstormy16-dis.c: Likewise.
1504 * xstormy16-desc.c: Likewise.
1506 2020-06-03 Nick Clifton <nickc@redhat.com>
1508 * po/sr.po: Updated Serbian translation.
1510 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1512 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1513 (riscv_get_priv_spec_class): Likewise.
1515 2020-06-01 Alan Modra <amodra@gmail.com>
1517 * bpf-desc.c: Regenerate.
1519 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1520 David Faust <david.faust@oracle.com>
1522 * bpf-desc.c: Regenerate.
1523 * bpf-opc.h: Likewise.
1524 * bpf-opc.c: Likewise.
1525 * bpf-dis.c: Likewise.
1527 2020-05-28 Alan Modra <amodra@gmail.com>
1529 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1532 2020-05-28 Alan Modra <amodra@gmail.com>
1534 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1536 (print_insn_ns32k): Revert last change.
1538 2020-05-28 Nick Clifton <nickc@redhat.com>
1540 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1543 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1545 Fix extraction of signed constants in nios2 disassembler (again).
1547 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1548 extractions of signed fields.
1550 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1552 * s390-opc.txt: Relocate vector load/store instructions with
1553 additional alignment parameter and change architecture level
1554 constraint from z14 to z13.
1556 2020-05-21 Alan Modra <amodra@gmail.com>
1558 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1559 * sparc-dis.c: Likewise.
1560 * tic4x-dis.c: Likewise.
1561 * xtensa-dis.c: Likewise.
1562 * bpf-desc.c: Regenerate.
1563 * epiphany-desc.c: Regenerate.
1564 * fr30-desc.c: Regenerate.
1565 * frv-desc.c: Regenerate.
1566 * ip2k-desc.c: Regenerate.
1567 * iq2000-desc.c: Regenerate.
1568 * lm32-desc.c: Regenerate.
1569 * m32c-desc.c: Regenerate.
1570 * m32r-desc.c: Regenerate.
1571 * mep-asm.c: Regenerate.
1572 * mep-desc.c: Regenerate.
1573 * mt-desc.c: Regenerate.
1574 * or1k-desc.c: Regenerate.
1575 * xc16x-desc.c: Regenerate.
1576 * xstormy16-desc.c: Regenerate.
1578 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1580 * riscv-opc.c (riscv_ext_version_table): The table used to store
1581 all information about the supported spec and the corresponding ISA
1582 versions. Currently, only Zicsr is supported to verify the
1583 correctness of Z sub extension settings. Others will be supported
1584 in the future patches.
1585 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1586 classes and the corresponding strings.
1587 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1588 spec class by giving a ISA spec string.
1589 * riscv-opc.c (struct priv_spec_t): New structure.
1590 (struct priv_spec_t priv_specs): List for all supported privilege spec
1591 classes and the corresponding strings.
1592 (riscv_get_priv_spec_class): New function. Get the corresponding
1593 privilege spec class by giving a spec string.
1594 (riscv_get_priv_spec_name): New function. Get the corresponding
1595 privilege spec string by giving a CSR version class.
1596 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1597 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1598 according to the chosen version. Build a hash table riscv_csr_hash to
1599 store the valid CSR for the chosen pirv verison. Dump the direct
1600 CSR address rather than it's name if it is invalid.
1601 (parse_riscv_dis_option_without_args): New function. Parse the options
1603 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1604 parse the options without arguments first, and then handle the options
1605 with arguments. Add the new option -Mpriv-spec, which has argument.
1606 * riscv-dis.c (print_riscv_disassembler_options): Add description
1607 about the new OBJDUMP option.
1609 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1611 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1612 WC values on POWER10 sync, dcbf and wait instructions.
1613 (insert_pl, extract_pl): New functions.
1614 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1615 (LS3): New , 3-bit L for sync.
1616 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1617 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1618 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1619 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1620 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1621 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1622 <wait>: Enable PL operand on POWER10.
1623 <dcbf>: Enable L3OPT operand on POWER10.
1624 <sync>: Enable SC2 operand on POWER10.
1626 2020-05-19 Stafford Horne <shorne@gmail.com>
1629 * or1k-asm.c: Regenerate.
1630 * or1k-desc.c: Regenerate.
1631 * or1k-desc.h: Regenerate.
1632 * or1k-dis.c: Regenerate.
1633 * or1k-ibld.c: Regenerate.
1634 * or1k-opc.c: Regenerate.
1635 * or1k-opc.h: Regenerate.
1636 * or1k-opinst.c: Regenerate.
1638 2020-05-11 Alan Modra <amodra@gmail.com>
1640 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1643 2020-05-11 Alan Modra <amodra@gmail.com>
1645 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1646 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1648 2020-05-11 Alan Modra <amodra@gmail.com>
1650 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1652 2020-05-11 Alan Modra <amodra@gmail.com>
1654 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1655 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1657 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1659 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1662 2020-05-11 Alan Modra <amodra@gmail.com>
1664 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1665 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1666 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1667 (prefix_opcodes): Add xxeval.
1669 2020-05-11 Alan Modra <amodra@gmail.com>
1671 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1672 xxgenpcvwm, xxgenpcvdm.
1674 2020-05-11 Alan Modra <amodra@gmail.com>
1676 * ppc-opc.c (MP, VXVAM_MASK): Define.
1677 (VXVAPS_MASK): Use VXVA_MASK.
1678 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1679 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1680 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1681 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1683 2020-05-11 Alan Modra <amodra@gmail.com>
1684 Peter Bergner <bergner@linux.ibm.com>
1686 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1688 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1689 YMSK2, XA6a, XA6ap, XB6a entries.
1690 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1691 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1693 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1694 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1695 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1696 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1697 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1698 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1699 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1700 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1701 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1702 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1703 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1704 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1705 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1706 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1708 2020-05-11 Alan Modra <amodra@gmail.com>
1710 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1711 (insert_xts, extract_xts): New functions.
1712 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1713 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1714 (VXRC_MASK, VXSH_MASK): Define.
1715 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1716 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1717 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1718 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1719 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1720 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1721 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1723 2020-05-11 Alan Modra <amodra@gmail.com>
1725 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1726 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1727 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1728 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1729 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1731 2020-05-11 Alan Modra <amodra@gmail.com>
1733 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1734 (XTP, DQXP, DQXP_MASK): Define.
1735 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1736 (prefix_opcodes): Add plxvp and pstxvp.
1738 2020-05-11 Alan Modra <amodra@gmail.com>
1740 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1741 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1742 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1744 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1746 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1748 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1750 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1752 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1754 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1756 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1758 2020-05-11 Alan Modra <amodra@gmail.com>
1760 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1762 2020-05-11 Alan Modra <amodra@gmail.com>
1764 * ppc-dis.c (ppc_opts): Add "power10" entry.
1765 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1766 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1768 2020-05-11 Nick Clifton <nickc@redhat.com>
1770 * po/fr.po: Updated French translation.
1772 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1774 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1775 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1776 (operand_general_constraint_met_p): validate
1777 AARCH64_OPND_UNDEFINED.
1778 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1780 * aarch64-asm-2.c: Regenerated.
1781 * aarch64-dis-2.c: Regenerated.
1782 * aarch64-opc-2.c: Regenerated.
1784 2020-04-29 Nick Clifton <nickc@redhat.com>
1787 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1790 2020-04-29 Nick Clifton <nickc@redhat.com>
1792 * po/sv.po: Updated Swedish translation.
1794 2020-04-29 Nick Clifton <nickc@redhat.com>
1797 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1798 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1799 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1802 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1805 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1806 cmpi only on m68020up and cpu32.
1808 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1810 * aarch64-asm.c (aarch64_ins_none): New.
1811 * aarch64-asm.h (ins_none): New declaration.
1812 * aarch64-dis.c (aarch64_ext_none): New.
1813 * aarch64-dis.h (ext_none): New declaration.
1814 * aarch64-opc.c (aarch64_print_operand): Update case for
1815 AARCH64_OPND_BARRIER_PSB.
1816 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1817 (AARCH64_OPERANDS): Update inserter/extracter for
1818 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1819 * aarch64-asm-2.c: Regenerated.
1820 * aarch64-dis-2.c: Regenerated.
1821 * aarch64-opc-2.c: Regenerated.
1823 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1825 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1826 (aarch64_feature_ras, RAS): Likewise.
1827 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1828 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1829 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1830 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1831 * aarch64-asm-2.c: Regenerated.
1832 * aarch64-dis-2.c: Regenerated.
1833 * aarch64-opc-2.c: Regenerated.
1835 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1837 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1838 (print_insn_neon): Support disassembly of conditional
1841 2020-02-16 David Faust <david.faust@oracle.com>
1843 * bpf-desc.c: Regenerate.
1844 * bpf-desc.h: Likewise.
1845 * bpf-opc.c: Regenerate.
1846 * bpf-opc.h: Likewise.
1848 2020-04-07 Lili Cui <lili.cui@intel.com>
1850 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1851 (prefix_table): New instructions (see prefixes above).
1852 (rm_table): Likewise
1853 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1854 CPU_ANY_TSXLDTRK_FLAGS.
1855 (cpu_flags): Add CpuTSXLDTRK.
1856 * i386-opc.h (enum): Add CpuTSXLDTRK.
1857 (i386_cpu_flags): Add cputsxldtrk.
1858 * i386-opc.tbl: Add XSUSPLDTRK insns.
1859 * i386-init.h: Regenerate.
1860 * i386-tbl.h: Likewise.
1862 2020-04-02 Lili Cui <lili.cui@intel.com>
1864 * i386-dis.c (prefix_table): New instructions serialize.
1865 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1866 CPU_ANY_SERIALIZE_FLAGS.
1867 (cpu_flags): Add CpuSERIALIZE.
1868 * i386-opc.h (enum): Add CpuSERIALIZE.
1869 (i386_cpu_flags): Add cpuserialize.
1870 * i386-opc.tbl: Add SERIALIZE insns.
1871 * i386-init.h: Regenerate.
1872 * i386-tbl.h: Likewise.
1874 2020-03-26 Alan Modra <amodra@gmail.com>
1876 * disassemble.h (opcodes_assert): Declare.
1877 (OPCODES_ASSERT): Define.
1878 * disassemble.c: Don't include assert.h. Include opintl.h.
1879 (opcodes_assert): New function.
1880 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1881 (bfd_h8_disassemble): Reduce size of data array. Correctly
1882 calculate maxlen. Omit insn decoding when insn length exceeds
1883 maxlen. Exit from nibble loop when looking for E, before
1884 accessing next data byte. Move processing of E outside loop.
1885 Replace tests of maxlen in loop with assertions.
1887 2020-03-26 Alan Modra <amodra@gmail.com>
1889 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1891 2020-03-25 Alan Modra <amodra@gmail.com>
1893 * z80-dis.c (suffix): Init mybuf.
1895 2020-03-22 Alan Modra <amodra@gmail.com>
1897 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1898 successflly read from section.
1900 2020-03-22 Alan Modra <amodra@gmail.com>
1902 * arc-dis.c (find_format): Use ISO C string concatenation rather
1903 than line continuation within a string. Don't access needs_limm
1904 before testing opcode != NULL.
1906 2020-03-22 Alan Modra <amodra@gmail.com>
1908 * ns32k-dis.c (print_insn_arg): Update comment.
1909 (print_insn_ns32k): Reduce size of index_offset array, and
1910 initialize, passing -1 to print_insn_arg for args that are not
1911 an index. Don't exit arg loop early. Abort on bad arg number.
1913 2020-03-22 Alan Modra <amodra@gmail.com>
1915 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1916 * s12z-opc.c: Formatting.
1917 (operands_f): Return an int.
1918 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1919 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1920 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1921 (exg_sex_discrim): Likewise.
1922 (create_immediate_operand, create_bitfield_operand),
1923 (create_register_operand_with_size, create_register_all_operand),
1924 (create_register_all16_operand, create_simple_memory_operand),
1925 (create_memory_operand, create_memory_auto_operand): Don't
1926 segfault on malloc failure.
1927 (z_ext24_decode): Return an int status, negative on fail, zero
1929 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1930 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1931 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1932 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1933 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1934 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1935 (loop_primitive_decode, shift_decode, psh_pul_decode),
1936 (bit_field_decode): Similarly.
1937 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1938 to return value, update callers.
1939 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1940 Don't segfault on NULL operand.
1941 (decode_operation): Return OP_INVALID on first fail.
1942 (decode_s12z): Check all reads, returning -1 on fail.
1944 2020-03-20 Alan Modra <amodra@gmail.com>
1946 * metag-dis.c (print_insn_metag): Don't ignore status from
1949 2020-03-20 Alan Modra <amodra@gmail.com>
1951 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1952 Initialize parts of buffer not written when handling a possible
1953 2-byte insn at end of section. Don't attempt decoding of such
1954 an insn by the 4-byte machinery.
1956 2020-03-20 Alan Modra <amodra@gmail.com>
1958 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1959 partially filled buffer. Prevent lookup of 4-byte insns when
1960 only VLE 2-byte insns are possible due to section size. Print
1961 ".word" rather than ".long" for 2-byte leftovers.
1963 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1966 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1968 2020-03-13 Jan Beulich <jbeulich@suse.com>
1970 * i386-dis.c (X86_64_0D): Rename to ...
1971 (X86_64_0E): ... this.
1973 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1975 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1976 * Makefile.in: Regenerated.
1978 2020-03-09 Jan Beulich <jbeulich@suse.com>
1980 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1982 * i386-tbl.h: Re-generate.
1984 2020-03-09 Jan Beulich <jbeulich@suse.com>
1986 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1987 vprot*, vpsha*, and vpshl*.
1988 * i386-tbl.h: Re-generate.
1990 2020-03-09 Jan Beulich <jbeulich@suse.com>
1992 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1993 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1994 * i386-tbl.h: Re-generate.
1996 2020-03-09 Jan Beulich <jbeulich@suse.com>
1998 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1999 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2000 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2001 * i386-tbl.h: Re-generate.
2003 2020-03-09 Jan Beulich <jbeulich@suse.com>
2005 * i386-gen.c (struct template_arg, struct template_instance,
2006 struct template_param, struct template, templates,
2007 parse_template, expand_templates): New.
2008 (process_i386_opcodes): Various local variables moved to
2009 expand_templates. Call parse_template and expand_templates.
2010 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2011 * i386-tbl.h: Re-generate.
2013 2020-03-06 Jan Beulich <jbeulich@suse.com>
2015 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2016 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2017 register and memory source templates. Replace VexW= by VexW*
2019 * i386-tbl.h: Re-generate.
2021 2020-03-06 Jan Beulich <jbeulich@suse.com>
2023 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2024 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2025 * i386-tbl.h: Re-generate.
2027 2020-03-06 Jan Beulich <jbeulich@suse.com>
2029 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2030 * i386-tbl.h: Re-generate.
2032 2020-03-06 Jan Beulich <jbeulich@suse.com>
2034 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2035 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2036 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2037 VexW0 on SSE2AVX variants.
2038 (vmovq): Drop NoRex64 from XMM/XMM variants.
2039 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2040 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2041 applicable use VexW0.
2042 * i386-tbl.h: Re-generate.
2044 2020-03-06 Jan Beulich <jbeulich@suse.com>
2046 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2047 * i386-opc.h (Rex64): Delete.
2048 (struct i386_opcode_modifier): Remove rex64 field.
2049 * i386-opc.tbl (crc32): Drop Rex64.
2050 Replace Rex64 with Size64 everywhere else.
2051 * i386-tbl.h: Re-generate.
2053 2020-03-06 Jan Beulich <jbeulich@suse.com>
2055 * i386-dis.c (OP_E_memory): Exclude recording of used address
2056 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2057 addressed memory operands for MPX insns.
2059 2020-03-06 Jan Beulich <jbeulich@suse.com>
2061 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2062 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2063 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2064 (ptwrite): Split into non-64-bit and 64-bit forms.
2065 * i386-tbl.h: Re-generate.
2067 2020-03-06 Jan Beulich <jbeulich@suse.com>
2069 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2071 * i386-tbl.h: Re-generate.
2073 2020-03-04 Jan Beulich <jbeulich@suse.com>
2075 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2076 (prefix_table): Move vmmcall here. Add vmgexit.
2077 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2078 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2079 (cpu_flags): Add CpuSEV_ES entry.
2080 * i386-opc.h (CpuSEV_ES): New.
2081 (union i386_cpu_flags): Add cpusev_es field.
2082 * i386-opc.tbl (vmgexit): New.
2083 * i386-init.h, i386-tbl.h: Re-generate.
2085 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2087 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2089 * i386-opc.h (IGNORESIZE): New.
2090 (DEFAULTSIZE): Likewise.
2091 (IgnoreSize): Removed.
2092 (DefaultSize): Likewise.
2093 (MnemonicSize): New.
2094 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2096 * i386-opc.tbl (IgnoreSize): New.
2097 (DefaultSize): Likewise.
2098 * i386-tbl.h: Regenerated.
2100 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2103 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2106 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2109 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2110 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2111 * i386-tbl.h: Regenerated.
2113 2020-02-26 Alan Modra <amodra@gmail.com>
2115 * aarch64-asm.c: Indent labels correctly.
2116 * aarch64-dis.c: Likewise.
2117 * aarch64-gen.c: Likewise.
2118 * aarch64-opc.c: Likewise.
2119 * alpha-dis.c: Likewise.
2120 * i386-dis.c: Likewise.
2121 * nds32-asm.c: Likewise.
2122 * nfp-dis.c: Likewise.
2123 * visium-dis.c: Likewise.
2125 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2127 * arc-regs.h (int_vector_base): Make it available for all ARC
2130 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2132 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2135 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2137 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2138 c.mv/c.li if rs1 is zero.
2140 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2142 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2143 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2145 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2146 * i386-opc.h (CpuABM): Removed.
2148 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2149 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2150 popcnt. Remove CpuABM from lzcnt.
2151 * i386-init.h: Regenerated.
2152 * i386-tbl.h: Likewise.
2154 2020-02-17 Jan Beulich <jbeulich@suse.com>
2156 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2157 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2158 VexW1 instead of open-coding them.
2159 * i386-tbl.h: Re-generate.
2161 2020-02-17 Jan Beulich <jbeulich@suse.com>
2163 * i386-opc.tbl (AddrPrefixOpReg): Define.
2164 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2165 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2166 templates. Drop NoRex64.
2167 * i386-tbl.h: Re-generate.
2169 2020-02-17 Jan Beulich <jbeulich@suse.com>
2172 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2173 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2174 into Intel syntax instance (with Unpsecified) and AT&T one
2176 (vcvtneps2bf16): Likewise, along with folding the two so far
2178 * i386-tbl.h: Re-generate.
2180 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2182 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2183 CPU_ANY_SSE4A_FLAGS.
2185 2020-02-17 Alan Modra <amodra@gmail.com>
2187 * i386-gen.c (cpu_flag_init): Correct last change.
2189 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2191 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2194 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2196 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2199 2020-02-14 Jan Beulich <jbeulich@suse.com>
2202 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2203 destination for Cpu64-only variant.
2204 (movzx): Fold patterns.
2205 * i386-tbl.h: Re-generate.
2207 2020-02-13 Jan Beulich <jbeulich@suse.com>
2209 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2210 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2211 CPU_ANY_SSE4_FLAGS entry.
2212 * i386-init.h: Re-generate.
2214 2020-02-12 Jan Beulich <jbeulich@suse.com>
2216 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2217 with Unspecified, making the present one AT&T syntax only.
2218 * i386-tbl.h: Re-generate.
2220 2020-02-12 Jan Beulich <jbeulich@suse.com>
2222 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2223 * i386-tbl.h: Re-generate.
2225 2020-02-12 Jan Beulich <jbeulich@suse.com>
2228 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2229 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2230 Amd64 and Intel64 templates.
2231 (call, jmp): Likewise for far indirect variants. Dro
2233 * i386-tbl.h: Re-generate.
2235 2020-02-11 Jan Beulich <jbeulich@suse.com>
2237 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2238 * i386-opc.h (ShortForm): Delete.
2239 (struct i386_opcode_modifier): Remove shortform field.
2240 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2241 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2242 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2243 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2245 * i386-tbl.h: Re-generate.
2247 2020-02-11 Jan Beulich <jbeulich@suse.com>
2249 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2250 fucompi): Drop ShortForm from operand-less templates.
2251 * i386-tbl.h: Re-generate.
2253 2020-02-11 Alan Modra <amodra@gmail.com>
2255 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2256 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2257 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2258 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2259 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2261 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2263 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2264 (cde_opcodes): Add VCX* instructions.
2266 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2267 Matthew Malcomson <matthew.malcomson@arm.com>
2269 * arm-dis.c (struct cdeopcode32): New.
2270 (CDE_OPCODE): New macro.
2271 (cde_opcodes): New disassembly table.
2272 (regnames): New option to table.
2273 (cde_coprocs): New global variable.
2274 (print_insn_cde): New
2275 (print_insn_thumb32): Use print_insn_cde.
2276 (parse_arm_disassembler_options): Parse coprocN args.
2278 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2281 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2283 * i386-opc.h (AMD64): Removed.
2284 (Intel64): Likewose.
2286 (INTEL64): Likewise.
2287 (INTEL64ONLY): Likewise.
2288 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2289 * i386-opc.tbl (Amd64): New.
2290 (Intel64): Likewise.
2291 (Intel64Only): Likewise.
2292 Replace AMD64 with Amd64. Update sysenter/sysenter with
2293 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2294 * i386-tbl.h: Regenerated.
2296 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2299 * z80-dis.c: Add support for GBZ80 opcodes.
2301 2020-02-04 Alan Modra <amodra@gmail.com>
2303 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2305 2020-02-03 Alan Modra <amodra@gmail.com>
2307 * m32c-ibld.c: Regenerate.
2309 2020-02-01 Alan Modra <amodra@gmail.com>
2311 * frv-ibld.c: Regenerate.
2313 2020-01-31 Jan Beulich <jbeulich@suse.com>
2315 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2316 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2317 (OP_E_memory): Replace xmm_mdq_mode case label by
2318 vex_scalar_w_dq_mode one.
2319 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2321 2020-01-31 Jan Beulich <jbeulich@suse.com>
2323 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2324 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2325 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2326 (intel_operand_size): Drop vex_w_dq_mode case label.
2328 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2330 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2331 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2333 2020-01-30 Alan Modra <amodra@gmail.com>
2335 * m32c-ibld.c: Regenerate.
2337 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2339 * bpf-opc.c: Regenerate.
2341 2020-01-30 Jan Beulich <jbeulich@suse.com>
2343 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2344 (dis386): Use them to replace C2/C3 table entries.
2345 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2346 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2347 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2348 * i386-tbl.h: Re-generate.
2350 2020-01-30 Jan Beulich <jbeulich@suse.com>
2352 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2354 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2356 * i386-tbl.h: Re-generate.
2358 2020-01-30 Alan Modra <amodra@gmail.com>
2360 * tic4x-dis.c (tic4x_dp): Make unsigned.
2362 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2363 Jan Beulich <jbeulich@suse.com>
2366 * i386-dis.c (MOVSXD_Fixup): New function.
2367 (movsxd_mode): New enum.
2368 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2369 (intel_operand_size): Handle movsxd_mode.
2370 (OP_E_register): Likewise.
2372 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2373 register on movsxd. Add movsxd with 16-bit destination register
2374 for AMD64 and Intel64 ISAs.
2375 * i386-tbl.h: Regenerated.
2377 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2380 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2381 * aarch64-asm-2.c: Regenerate
2382 * aarch64-dis-2.c: Likewise.
2383 * aarch64-opc-2.c: Likewise.
2385 2020-01-21 Jan Beulich <jbeulich@suse.com>
2387 * i386-opc.tbl (sysret): Drop DefaultSize.
2388 * i386-tbl.h: Re-generate.
2390 2020-01-21 Jan Beulich <jbeulich@suse.com>
2392 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2394 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2395 * i386-tbl.h: Re-generate.
2397 2020-01-20 Nick Clifton <nickc@redhat.com>
2399 * po/de.po: Updated German translation.
2400 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2401 * po/uk.po: Updated Ukranian translation.
2403 2020-01-20 Alan Modra <amodra@gmail.com>
2405 * hppa-dis.c (fput_const): Remove useless cast.
2407 2020-01-20 Alan Modra <amodra@gmail.com>
2409 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2411 2020-01-18 Nick Clifton <nickc@redhat.com>
2413 * configure: Regenerate.
2414 * po/opcodes.pot: Regenerate.
2416 2020-01-18 Nick Clifton <nickc@redhat.com>
2418 Binutils 2.34 branch created.
2420 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2422 * opintl.h: Fix spelling error (seperate).
2424 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2426 * i386-opc.tbl: Add {vex} pseudo prefix.
2427 * i386-tbl.h: Regenerated.
2429 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2432 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2433 (neon_opcodes): Likewise.
2434 (select_arm_features): Make sure we enable MVE bits when selecting
2435 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2438 2020-01-16 Jan Beulich <jbeulich@suse.com>
2440 * i386-opc.tbl: Drop stale comment from XOP section.
2442 2020-01-16 Jan Beulich <jbeulich@suse.com>
2444 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2445 (extractps): Add VexWIG to SSE2AVX forms.
2446 * i386-tbl.h: Re-generate.
2448 2020-01-16 Jan Beulich <jbeulich@suse.com>
2450 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2451 Size64 from and use VexW1 on SSE2AVX forms.
2452 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2453 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2454 * i386-tbl.h: Re-generate.
2456 2020-01-15 Alan Modra <amodra@gmail.com>
2458 * tic4x-dis.c (tic4x_version): Make unsigned long.
2459 (optab, optab_special, registernames): New file scope vars.
2460 (tic4x_print_register): Set up registernames rather than
2461 malloc'd registertable.
2462 (tic4x_disassemble): Delete optable and optable_special. Use
2463 optab and optab_special instead. Throw away old optab,
2464 optab_special and registernames when info->mach changes.
2466 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2469 * z80-dis.c (suffix): Use .db instruction to generate double
2472 2020-01-14 Alan Modra <amodra@gmail.com>
2474 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2475 values to unsigned before shifting.
2477 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2479 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2481 (print_insn_thumb16, print_insn_thumb32): Likewise.
2482 (print_insn): Initialize the insn info.
2483 * i386-dis.c (print_insn): Initialize the insn info fields, and
2486 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2488 * arc-opc.c (C_NE): Make it required.
2490 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2492 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2493 reserved register name.
2495 2020-01-13 Alan Modra <amodra@gmail.com>
2497 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2498 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2500 2020-01-13 Alan Modra <amodra@gmail.com>
2502 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2503 result of wasm_read_leb128 in a uint64_t and check that bits
2504 are not lost when copying to other locals. Use uint32_t for
2505 most locals. Use PRId64 when printing int64_t.
2507 2020-01-13 Alan Modra <amodra@gmail.com>
2509 * score-dis.c: Formatting.
2510 * score7-dis.c: Formatting.
2512 2020-01-13 Alan Modra <amodra@gmail.com>
2514 * score-dis.c (print_insn_score48): Use unsigned variables for
2515 unsigned values. Don't left shift negative values.
2516 (print_insn_score32): Likewise.
2517 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2519 2020-01-13 Alan Modra <amodra@gmail.com>
2521 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2523 2020-01-13 Alan Modra <amodra@gmail.com>
2525 * fr30-ibld.c: Regenerate.
2527 2020-01-13 Alan Modra <amodra@gmail.com>
2529 * xgate-dis.c (print_insn): Don't left shift signed value.
2530 (ripBits): Formatting, use 1u.
2532 2020-01-10 Alan Modra <amodra@gmail.com>
2534 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2535 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2537 2020-01-10 Alan Modra <amodra@gmail.com>
2539 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2540 and XRREG value earlier to avoid a shift with negative exponent.
2541 * m10200-dis.c (disassemble): Similarly.
2543 2020-01-09 Nick Clifton <nickc@redhat.com>
2546 * z80-dis.c (ld_ii_ii): Use correct cast.
2548 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2551 * z80-dis.c (ld_ii_ii): Use character constant when checking
2554 2020-01-09 Jan Beulich <jbeulich@suse.com>
2556 * i386-dis.c (SEP_Fixup): New.
2558 (dis386_twobyte): Use it for sysenter/sysexit.
2559 (enum x86_64_isa): Change amd64 enumerator to value 1.
2560 (OP_J): Compare isa64 against intel64 instead of amd64.
2561 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2563 * i386-tbl.h: Re-generate.
2565 2020-01-08 Alan Modra <amodra@gmail.com>
2567 * z8k-dis.c: Include libiberty.h
2568 (instr_data_s): Make max_fetched unsigned.
2569 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2570 Don't exceed byte_info bounds.
2571 (output_instr): Make num_bytes unsigned.
2572 (unpack_instr): Likewise for nibl_count and loop.
2573 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2575 * z8k-opc.h: Regenerate.
2577 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2579 * arc-tbl.h (llock): Use 'LLOCK' as class.
2581 (scond): Use 'SCOND' as class.
2583 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2586 2020-01-06 Alan Modra <amodra@gmail.com>
2588 * m32c-ibld.c: Regenerate.
2590 2020-01-06 Alan Modra <amodra@gmail.com>
2593 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2594 Peek at next byte to prevent recursion on repeated prefix bytes.
2595 Ensure uninitialised "mybuf" is not accessed.
2596 (print_insn_z80): Don't zero n_fetch and n_used here,..
2597 (print_insn_z80_buf): ..do it here instead.
2599 2020-01-04 Alan Modra <amodra@gmail.com>
2601 * m32r-ibld.c: Regenerate.
2603 2020-01-04 Alan Modra <amodra@gmail.com>
2605 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2607 2020-01-04 Alan Modra <amodra@gmail.com>
2609 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2611 2020-01-04 Alan Modra <amodra@gmail.com>
2613 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2615 2020-01-03 Jan Beulich <jbeulich@suse.com>
2617 * aarch64-tbl.h (aarch64_opcode_table): Use
2618 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2620 2020-01-03 Jan Beulich <jbeulich@suse.com>
2622 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2623 forms of SUDOT and USDOT.
2625 2020-01-03 Jan Beulich <jbeulich@suse.com>
2627 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2629 * opcodes/aarch64-dis-2.c: Re-generate.
2631 2020-01-03 Jan Beulich <jbeulich@suse.com>
2633 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2635 * opcodes/aarch64-dis-2.c: Re-generate.
2637 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2639 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2641 2020-01-01 Alan Modra <amodra@gmail.com>
2643 Update year range in copyright notice of all files.
2645 For older changes see ChangeLog-2019
2647 Copyright (C) 2020 Free Software Foundation, Inc.
2649 Copying and distribution of this file, with or without modification,
2650 are permitted in any medium without royalty provided the copyright
2651 notice and this notice are preserved.
2657 version-control: never
projects / binutils-gdb.git / blob