2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
2
3 * arm-dis.c (print_insn_arm): Add cases for printing more
4 symbolic operands.
5 (print_insn_thumb32): Likewise.
6
7 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
8
9 * mips-dis.c (print_insn_mips): Correct branch instruction type
10 determination.
11
12 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
13
14 * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
15 type and delay slot determination.
16 (print_insn_mips16): Extend branch instruction type and delay
17 slot determination to cover all instructions.
18 * mips16-opc.c (BR): Remove macro.
19 (UBR, CBR): New macros.
20 (mips16_opcodes): Update branch annotation for "b", "beqz",
21 "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
22 and "jrc".
23
24 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
25
26 AVX Programming Reference (June, 2010)
27 * i386-dis.c (mod_table): Replace rdrnd with rdrand.
28 * i386-opc.tbl: Likewise.
29 * i386-tbl.h: Regenerated.
30
31 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
32
33 * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
34
35 2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
36
37 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
38 ppc_cpu_t before inverting.
39 (ppc_parse_cpu): Likewise.
40 (print_insn_powerpc): Likewise.
41
42 2010-07-03 Alan Modra <amodra@gmail.com>
43
44 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
45 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
46 (PPC64, MFDEC2): Update.
47 (NON32, NO371): Define.
48 (powerpc_opcode): Update to not use old opcode flags, and avoid
49 -m601 duplicates.
50
51 2010-07-03 DJ Delorie <dj@delorie.com>
52
53 * m32c-ibld.c: Regenerate.
54
55 2010-07-03 Alan Modra <amodra@gmail.com>
56
57 * ppc-opc.c (PWR2COM): Define.
58 (PPCPWR2): Add PPC_OPCODE_COMMON.
59 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
60 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
61 "rac" from -mcom.
62
63 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
64
65 AVX Programming Reference (June, 2010)
66 * i386-dis.c (PREFIX_0FAE_REG_0): New.
67 (PREFIX_0FAE_REG_1): Likewise.
68 (PREFIX_0FAE_REG_2): Likewise.
69 (PREFIX_0FAE_REG_3): Likewise.
70 (PREFIX_VEX_3813): Likewise.
71 (PREFIX_VEX_3A1D): Likewise.
72 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
73 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
74 PREFIX_VEX_3A1D.
75 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
76 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
77 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
78
79 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
80 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
81 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
82
83 * i386-opc.h (CpuXsaveopt): New.
84 (CpuFSGSBase): Likewise.
85 (CpuRdRnd): Likewise.
86 (CpuF16C): Likewise.
87 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
88 cpuf16c.
89
90 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
91 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
92 * i386-init.h: Regenerated.
93 * i386-tbl.h: Likewise.
94
95 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
96
97 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
98 and mtocrf on EFS.
99
100 2010-06-29 Alan Modra <amodra@gmail.com>
101
102 * maxq-dis.c: Delete file.
103 * Makefile.am: Remove references to maxq.
104 * configure.in: Likewise.
105 * disassemble.c: Likewise.
106 * Makefile.in: Regenerate.
107 * configure: Regenerate.
108 * po/POTFILES.in: Regenerate.
109
110 2010-06-29 Alan Modra <amodra@gmail.com>
111
112 * mep-dis.c: Regenerate.
113
114 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
115
116 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
117
118 2010-06-27 Alan Modra <amodra@gmail.com>
119
120 * arc-dis.c (arc_sprintf): Delete set but unused variables.
121 (decodeInstr): Likewise.
122 * dlx-dis.c (print_insn_dlx): Likewise.
123 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
124 * maxq-dis.c (check_move, print_insn): Likewise.
125 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
126 * msp430-dis.c (msp430_branchinstr): Likewise.
127 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
128 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
129 * sparc-dis.c (print_insn_sparc): Likewise.
130 * fr30-asm.c: Regenerate.
131 * frv-asm.c: Regenerate.
132 * ip2k-asm.c: Regenerate.
133 * iq2000-asm.c: Regenerate.
134 * lm32-asm.c: Regenerate.
135 * m32c-asm.c: Regenerate.
136 * m32r-asm.c: Regenerate.
137 * mep-asm.c: Regenerate.
138 * mt-asm.c: Regenerate.
139 * openrisc-asm.c: Regenerate.
140 * xc16x-asm.c: Regenerate.
141 * xstormy16-asm.c: Regenerate.
142
143 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
144
145 PR gas/11673
146 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
147
148 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
149
150 PR binutils/11676
151 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
152
153 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
154
155 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
156 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
157 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
158 touch floating point regs and are enabled by COM, PPC or PPCCOM.
159 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
160 Treat lwsync as msync on e500.
161
162 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
163
164 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
165
166 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
167
168 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
169 constants is the same on 32-bit and 64-bit hosts.
170
171 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
172
173 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
174 .short directives so that they can be reassembled.
175
176 2010-05-26 Catherine Moore <clm@codesourcery.com>
177 David Ung <davidu@mips.com>
178
179 * mips-opc.c: Change membership to I1 for instructions ssnop and
180 ehb.
181
182 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
183
184 * i386-dis.c (sib): New.
185 (get_sib): Likewise.
186 (print_insn): Call get_sib.
187 OP_E_memory): Use sib.
188
189 2010-05-26 Catherine Moore <clm@codesoourcery.com>
190
191 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
192 * mips-opc.c (I16): Remove.
193 (mips_builtin_op): Reclassify jalx.
194
195 2010-05-19 Alan Modra <amodra@gmail.com>
196
197 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
198 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
199
200 2010-05-13 Alan Modra <amodra@gmail.com>
201
202 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
203
204 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
205
206 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
207 format.
208 (print_insn_thumb16): Add support for new %W format.
209
210 2010-05-07 Tristan Gingold <gingold@adacore.com>
211
212 * Makefile.in: Regenerate with automake 1.11.1.
213 * aclocal.m4: Ditto.
214
215 2010-05-05 Nick Clifton <nickc@redhat.com>
216
217 * po/es.po: Updated Spanish translation.
218
219 2010-04-22 Nick Clifton <nickc@redhat.com>
220
221 * po/opcodes.pot: Updated by the Translation project.
222 * po/vi.po: Updated Vietnamese translation.
223
224 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
225
226 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
227 bits in opcode.
228
229 2010-04-09 Nick Clifton <nickc@redhat.com>
230
231 * i386-dis.c (print_insn): Remove unused variable op.
232 (OP_sI): Remove unused variable mask.
233
234 2010-04-07 Alan Modra <amodra@gmail.com>
235
236 * configure: Regenerate.
237
238 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
239
240 * ppc-opc.c (RBOPT): New define.
241 ("dccci"): Enable for PPCA2. Make operands optional.
242 ("iccci"): Likewise. Do not deprecate for PPC476.
243
244 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
245
246 * cr16-opc.c (cr16_instruction): Fix typo in comment.
247
248 2010-03-25 Joseph Myers <joseph@codesourcery.com>
249
250 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
251 * Makefile.in: Regenerate.
252 * configure.in (bfd_tic6x_arch): New.
253 * configure: Regenerate.
254 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
255 (disassembler): Handle TI C6X.
256 * tic6x-dis.c: New.
257
258 2010-03-24 Mike Frysinger <vapier@gentoo.org>
259
260 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
261
262 2010-03-23 Joseph Myers <joseph@codesourcery.com>
263
264 * dis-buf.c (buffer_read_memory): Give error for reading just
265 before the start of memory.
266
267 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
268 Quentin Neill <quentin.neill@amd.com>
269
270 * i386-dis.c (OP_LWP_I): Removed.
271 (reg_table): Do not use OP_LWP_I, use Iq.
272 (OP_LWPCB_E): Remove use of names16.
273 (OP_LWP_E): Same.
274 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
275 should not set the Vex.length bit.
276 * i386-tbl.h: Regenerated.
277
278 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
279
280 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
281
282 2010-02-24 Nick Clifton <nickc@redhat.com>
283
284 PR binutils/6773
285 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
286 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
287 (thumb32_opcodes): Likewise.
288
289 2010-02-15 Nick Clifton <nickc@redhat.com>
290
291 * po/vi.po: Updated Vietnamese translation.
292
293 2010-02-12 Doug Evans <dje@sebabeach.org>
294
295 * lm32-opinst.c: Regenerate.
296
297 2010-02-11 Doug Evans <dje@sebabeach.org>
298
299 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
300 (print_address): Delete CGEN_PRINT_ADDRESS.
301 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
302 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
303 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
304 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
305
306 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
307 * frv-desc.c, * frv-desc.h, * frv-opc.c,
308 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
309 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
310 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
311 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
312 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
313 * mep-desc.c, * mep-desc.h, * mep-opc.c,
314 * mt-desc.c, * mt-desc.h, * mt-opc.c,
315 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
316 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
317 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
318
319 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
320
321 * i386-dis.c: Update copyright.
322 * i386-gen.c: Likewise.
323 * i386-opc.h: Likewise.
324 * i386-opc.tbl: Likewise.
325
326 2010-02-10 Quentin Neill <quentin.neill@amd.com>
327 Sebastian Pop <sebastian.pop@amd.com>
328
329 * i386-dis.c (OP_EX_VexImmW): Reintroduced
330 function to handle 5th imm8 operand.
331 (PREFIX_VEX_3A48): Added.
332 (PREFIX_VEX_3A49): Added.
333 (VEX_W_3A48_P_2): Added.
334 (VEX_W_3A49_P_2): Added.
335 (prefix table): Added entries for PREFIX_VEX_3A48
336 and PREFIX_VEX_3A49.
337 (vex table): Added entries for VEX_W_3A48_P_2 and
338 and VEX_W_3A49_P_2.
339 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
340 for Vec_Imm4 operands.
341 * i386-opc.h (enum): Added Vec_Imm4.
342 (i386_operand_type): Added vec_imm4.
343 * i386-opc.tbl: Add entries for vpermilp[ds].
344 * i386-init.h: Regenerated.
345 * i386-tbl.h: Regenerated.
346
347 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
348
349 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
350 and "pwr7". Move "a2" into alphabetical order.
351
352 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
353
354 * ppc-dis.c (ppc_opts): Add titan entry.
355 * ppc-opc.c (TITAN, MULHW): Define.
356 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
357
358 2010-02-03 Quentin Neill <quentin.neill@amd.com>
359
360 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
361 to CPU_BDVER1_FLAGS
362 * i386-init.h: Regenerated.
363
364 2010-02-03 Anthony Green <green@moxielogic.com>
365
366 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
367 0x0f, and make 0x00 an illegal instruction.
368
369 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
370
371 * opcodes/arm-dis.c (struct arm_private_data): New.
372 (print_insn_coprocessor, print_insn_arm): Update to use struct
373 arm_private_data.
374 (is_mapping_symbol, get_map_sym_type): New functions.
375 (get_sym_code_type): Check the symbol's section. Do not check
376 mapping symbols.
377 (print_insn): Default to disassembling ARM mode code. Check
378 for mapping symbols separately from other symbols. Use
379 struct arm_private_data.
380
381 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
382
383 * i386-dis.c (EXVexWdqScalar): New.
384 (vex_scalar_w_dq_mode): Likewise.
385 (prefix_table): Update entries for PREFIX_VEX_3899,
386 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
387 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
388 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
389 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
390 (intel_operand_size): Handle vex_scalar_w_dq_mode.
391 (OP_EX): Likewise.
392
393 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
394
395 * i386-dis.c (XMScalar): New.
396 (EXdScalar): Likewise.
397 (EXqScalar): Likewise.
398 (EXqScalarS): Likewise.
399 (VexScalar): Likewise.
400 (EXdVexScalarS): Likewise.
401 (EXqVexScalarS): Likewise.
402 (XMVexScalar): Likewise.
403 (scalar_mode): Likewise.
404 (d_scalar_mode): Likewise.
405 (d_scalar_swap_mode): Likewise.
406 (q_scalar_mode): Likewise.
407 (q_scalar_swap_mode): Likewise.
408 (vex_scalar_mode): Likewise.
409 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
410 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
411 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
412 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
413 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
414 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
415 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
416 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
417 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
418 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
419 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
420 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
421 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
422 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
423 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
424 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
425 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
426 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
427 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
428 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
429 q_scalar_mode, q_scalar_swap_mode.
430 (OP_XMM): Handle scalar_mode.
431 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
432 and q_scalar_swap_mode.
433 (OP_VEX): Handle vex_scalar_mode.
434
435 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
436
437 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
438
439 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
440
441 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
442
443 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
444
445 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
446
447 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
448
449 * i386-dis.c (Bad_Opcode): New.
450 (bad_opcode): Likewise.
451 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
452 (dis386_twobyte): Likewise.
453 (reg_table): Likewise.
454 (prefix_table): Likewise.
455 (x86_64_table): Likewise.
456 (vex_len_table): Likewise.
457 (vex_w_table): Likewise.
458 (mod_table): Likewise.
459 (rm_table): Likewise.
460 (float_reg): Likewise.
461 (reg_table): Remove trailing "(bad)" entries.
462 (prefix_table): Likewise.
463 (x86_64_table): Likewise.
464 (vex_len_table): Likewise.
465 (vex_w_table): Likewise.
466 (mod_table): Likewise.
467 (rm_table): Likewise.
468 (get_valid_dis386): Handle bytemode 0.
469
470 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
471
472 * i386-opc.h (VEXScalar): New.
473
474 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
475 instructions.
476 * i386-tbl.h: Regenerated.
477
478 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
479
480 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
481
482 * i386-opc.tbl: Add xsave64 and xrstor64.
483 * i386-tbl.h: Regenerated.
484
485 2010-01-20 Nick Clifton <nickc@redhat.com>
486
487 PR 11170
488 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
489 based post-indexed addressing.
490
491 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
492
493 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
494 * i386-tbl.h: Regenerated.
495
496 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
497
498 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
499 comments.
500
501 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
502
503 * i386-dis.c (names_mm): New.
504 (intel_names_mm): Likewise.
505 (att_names_mm): Likewise.
506 (names_xmm): Likewise.
507 (intel_names_xmm): Likewise.
508 (att_names_xmm): Likewise.
509 (names_ymm): Likewise.
510 (intel_names_ymm): Likewise.
511 (att_names_ymm): Likewise.
512 (print_insn): Set names_mm, names_xmm and names_ymm.
513 (OP_MMX): Use names_mm, names_xmm and names_ymm.
514 (OP_XMM): Likewise.
515 (OP_EM): Likewise.
516 (OP_EMC): Likewise.
517 (OP_MXC): Likewise.
518 (OP_EX): Likewise.
519 (XMM_Fixup): Likewise.
520 (OP_VEX): Likewise.
521 (OP_EX_VexReg): Likewise.
522 (OP_Vex_2src): Likewise.
523 (OP_Vex_2src_1): Likewise.
524 (OP_Vex_2src_2): Likewise.
525 (OP_REG_VexI4): Likewise.
526
527 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
528
529 * i386-dis.c (print_insn): Update comments.
530
531 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
532
533 * i386-dis.c (rex_original): Removed.
534 (ckprefix): Remove rex_original.
535 (print_insn): Update comments.
536
537 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
538
539 * Makefile.in: Regenerate.
540 * configure: Regenerate.
541
542 2010-01-07 Doug Evans <dje@sebabeach.org>
543
544 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
545 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
546 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
547 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
548 * xstormy16-ibld.c: Regenerate.
549
550 2010-01-06 Quentin Neill <quentin.neill@amd.com>
551
552 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
553 * i386-init.h: Regenerated.
554
555 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
556
557 * arm-dis.c (print_insn): Fixed search for next symbol and data
558 dumping condition, and the initial mapping symbol state.
559
560 2010-01-05 Doug Evans <dje@sebabeach.org>
561
562 * cgen-ibld.in: #include "cgen/basic-modes.h".
563 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
564 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
565 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
566 * xstormy16-ibld.c: Regenerate.
567
568 2010-01-04 Nick Clifton <nickc@redhat.com>
569
570 PR 11123
571 * arm-dis.c (print_insn_coprocessor): Initialise value.
572
573 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
574
575 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
576
577 2010-01-02 Doug Evans <dje@sebabeach.org>
578
579 * cgen-asm.in: Update copyright year.
580 * cgen-dis.in: Update copyright year.
581 * cgen-ibld.in: Update copyright year.
582 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
583 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
584 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
585 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
586 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
587 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
588 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
589 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
590 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
591 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
592 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
593 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
594 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
595 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
596 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
597 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
598 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
599 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
600 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
601 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
602 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
603
604 For older changes see ChangeLog-2009
605 \f
606 Local Variables:
607 mode: change-log
608 left-margin: 8
609 fill-column: 74
610 version-control: never
611 End: