opcodes/ChangeLog

   1 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c: Adjust white spaces.
   4
   5 2006-12-04  Jan Beulich  <jbeulich@novell.com>
   6
   7         * i386-dis.c (OP_J): Update used_prefixes in v_mode.
   8
   9 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  10
  11         * i386-dis.c (SEG_Fixup): Delete.
  12         (Sv): Use OP_SEG.
  13         (putop): New suffix character 'D'.
  14         (dis386): Use it.
  15         (grps): Likewise.
  16         (OP_SEG): Handle bytemode other than w_mode.
  17
  18 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  19
  20         * i386-dis.c (zAX): New.
  21         (Xz): New.
  22         (Yzr): New.
  23         (z_mode): New.
  24         (z_mode_ax_reg): New.
  25         (putop): New suffix character 'G'.
  26         (dis386): Use it for in, out, ins, and outs.
  27         (intel_operand_size): Handle z_mode.
  28         (OP_REG): Delete unreachable case indir_dx_reg.
  29         (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
  30         z_mode_ax_reg.
  31         (OP_ESreg): Fix Intel syntax operand size handling.
  32         (OP_DSreg): Likewise.
  33
  34 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  35
  36         * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
  37         (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
  38         used. For 'R' and 'W' suffix, simplify and fix Intel mode.
  39
  40 2006-11-29  Paul Brook  <paul@codesourcery.com>
  41
  42         * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
  43
  44 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
  45
  46         * arm-dis.c (last_is_thumb): Delete.
  47         (enum map_type, last_type): New.
  48         (print_insn_data): New.
  49         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
  50         the right symbol.  Handle $d.
  51         (print_insn): Check for mapping symbols even without a normal
  52         symbol.  Adjust searching.  If $d is found see how much data
  53         to print.  Handle data.
  54
  55 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
  56
  57         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
  58         conditionals.  Add tpf coldfire instruction as alias for trapf.
  59
  60 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  61
  62         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
  63         PREFIX_DATA when prefix user table is used.
  64
  65 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  66
  67         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
  68         (twobyte_uses_DATA_prefix): This.
  69         (twobyte_uses_REPNZ_prefix): New.
  70         (twobyte_uses_REPZ_prefix): Likewise.
  71         (threebyte_0x38_uses_DATA_prefix): Likewise.
  72         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
  73         (threebyte_0x38_uses_REPZ_prefix): Likewise.
  74         (threebyte_0x3a_uses_DATA_prefix): Likewise.
  75         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
  76         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
  77         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
  78         prefixes.
  79
  80 2006-11-06  Troy Rollo  <troy@corvu.com.au>
  81
  82         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
  83
  84 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
  85
  86         * score-opc.h (score_opcodes): Delete modifier '0x'.
  87
  88 2006-10-30  Paul Brook  <paul@codesourcery.com>
  89
  90         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
  91         (get_sym_code_type): New function.
  92         (print_insn): Search for mapping symbols.
  93
  94 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
  95
  96         * score-dis.c (print_insn): Correct the error code to print
  97         correct PCE instruction disassembly.
  98
  99 2006-10-26  Ben Elliston  <bje@au.ibm.com>
 100             Anton Blanchard  <anton@samba.org>
 101             Peter Bergner  <bergner@vnet.ibm.com>
 102
 103         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
 104         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
 105         (POWER6): Define.
 106         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
 107         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
 108         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
 109         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
 110         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
 111         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
 112         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
 113         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
 114         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
 115         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
 116         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
 117         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
 118         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
 119         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
 120         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
 121         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
 122         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
 123         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
 124         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
 125         "diexq" and "diexq." opcodes.
 126
 127 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
 128
 129         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
 130
 131 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
 132             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
 133             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
 134             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
 135             Alan Modra  <amodra@bigpond.net.au>
 136
 137         * spu-dis.c: New file.
 138         * spu-opc.c: New file.
 139         * configure.in: Add SPU support.
 140         * disassemble.c: Likewise.
 141         * Makefile.am: Likewise.  Run "make dep-am".
 142         * Makefile.in: Regenerate.
 143         * configure: Regenerate.
 144         * po/POTFILES.in: Regenerate.
 145
 146 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 147
 148         * ppc-opc.c (CELL): New define.
 149         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 150         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 151         VMX instructions.
 152         * ppc-dis.c (powerpc_dialect): Handle cell.
 153
 154 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 155
 156         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 157         amdfam10 architecture.
 158         (PREGRP37): NEW.
 159         (print_insn): Disallow REP prefix for POPCNT.
 160
 161 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 162
 163         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 164         duplicating it.
 165
 166 2006-10-18  Dave Brolley  <brolley@redhat.com>
 167
 168         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 169         * configure: Regenerated.
 170
 171 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 172
 173         * po/POTFILES.in: Regenerate.
 174
 175 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 176             Joseph Myers  <joseph@codesourcery.com>
 177             Ian Lance Taylor  <ian@wasabisystems.com>
 178             Ben Elliston  <bje@wasabisystems.com>
 179
 180         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 181         only be used with the default multiply-add operation, so if N is
 182         set, don't bother printing X.  Add new iwmmxt instructions.
 183         (IWMMXT_INSN_COUNT): Update.
 184         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 185         with a 'c' suffix.
 186         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 187         specifiers 'r', 'i'.
 188
 189 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 190
 191         PR binutils/3100
 192         * i386-dis.c (prefix_user_table): Fix the second operand of
 193         maskmovdqu instruction to allow only %xmm register instead of
 194         both %xmm register and memory.
 195
 196 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         PR binutils/3235
 199         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 200         address size prefix.
 201
 202 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 203
 204         * score-dis.c: New file.
 205         * score-opc.h: New file.
 206         * Makefile.am: Add Score files.
 207         * Makefile.in: Regenerate.
 208         * configure.in: Add support for Score target.
 209         * configure: Regenerate.
 210         * disassemble.c: Add support for Score target.
 211
 212 2006-09-16  Nick Clifton  <nickc@redhat.com>
 213             Pedro Alves  <pedro_alves@portugalmail.pt>
 214
 215         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 216         macros defined in bfd.h.
 217         * cris-dis.c: Likewise.
 218         * h8300-dis.c: Likewise.
 219         * i386-dis.c: Likewise.
 220         * ia64-gen.c: Likewise.
 221         * mips-dis: Likewise.
 222
 223 2006-09-04  Paul Brook  <paul@codesourcery.com>
 224
 225         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 226
 227 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 228
 229         * i386-dis.c (three_byte_table): Expand to 256 elements.
 230
 231 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 232
 233         PR binutils/3000
 234         * i386-dis.c (MXC,EMC): Define.
 235         (OP_MXC): New function to handle cvt* (convert instructions) between
 236         %xmm and %mm register correctly.
 237         (OP_EMC): ditto.
 238         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 239         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 240         with EMC/MXC.
 241
 242 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 243
 244         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 245         "fdaddl" entry.
 246
 247 2006-07-19  Paul Brook  <paul@codesourcery.com>
 248
 249         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 250
 251 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 252
 253         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 254         "sldt", "str" and "smsw".
 255
 256 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 257
 258         PR binutils/2829
 259         * i386-dis.c (GRP11_C6): NEW.
 260         (GRP11_C7): Likewise.
 261         (GRP12): Updated.
 262         (GRP13): Likewise.
 263         (GRP14): Likewise.
 264         (GRP15): Likewise.
 265         (GRP16): Likewise.
 266         (GRPAMD): Likewise.
 267         (GRPPADLCK1): Likewise.
 268         (GRPPADLCK2): Likewise.
 269         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 270         respectively.
 271         (grps): Add entries for GRP11_C6 and GRP11_C7.
 272
 273 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 274            Michael Meissner             <michael.meissner@amd.com>
 275
 276         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 277         support for amdfam10 SSE4a/ABM instructions. Modify all
 278         initializer macros to have additional arguments. Disallow REP
 279         prefix for non-string instructions.
 280         (print_insn): Ditto.
 281
 282 2006-07-05  Julian Brown  <julian@codesourcery.com>
 283
 284         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 285
 286 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 287
 288         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 289         (twobyte_has_modrm): Set 1 for 0x1f.
 290
 291 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 292
 293         * i386-dis.c (NOP_Fixup): Removed.
 294         (NOP_Fixup1): New.
 295         (NOP_Fixup2): Likewise.
 296         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 297
 298 2006-06-12  Julian Brown  <julian@codesourcery.com>
 299
 300         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 301         on 64-bit hosts.
 302
 303 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 304
 305         * i386.c (GRP10): Renamed to ...
 306         (GRP12): This.
 307         (GRP11): Renamed to ...
 308         (GRP13): This.
 309         (GRP12): Renamed to ...
 310         (GRP14): This.
 311         (GRP13): Renamed to ...
 312         (GRP15): This.
 313         (GRP14): Renamed to ...
 314         (GRP16): This.
 315         (dis386_twobyte): Updated.
 316         (grps): Likewise.
 317
 318 2006-06-09  Nick Clifton  <nickc@redhat.com>
 319
 320         * po/fi.po: Updated Finnish translation.
 321
 322 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 323
 324         * po/Make-in (pdf, ps): New dummy targets.
 325
 326 2006-06-06  Paul Brook  <paul@codesourcery.com>
 327
 328         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 329         instructions.
 330         (neon_opcodes): Add conditional execution specifiers.
 331         (thumb_opcodes): Ditto.
 332         (thumb32_opcodes): Ditto.
 333         (arm_conditional): Change 0xe to "al" and add "" to end.
 334         (ifthen_state, ifthen_next_state, ifthen_address): New.
 335         (IFTHEN_COND): Define.
 336         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 337         (print_insn_arm): Change %c to use new values of arm_conditional.
 338         (print_insn_thumb16): Print thumb conditions.  Add %I.
 339         (print_insn_thumb32): Print thumb conditions.
 340         (find_ifthen_state): New function.
 341         (print_insn): Track IT block state.
 342
 343 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 344             Anton Blanchard  <anton@samba.org>
 345             Peter Bergner  <bergner@vnet.ibm.com>
 346
 347         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 348         (print_ppc_disassembler_options): Mention power6.
 349
 350 2006-06-06  Thiemo Seufer  <ths@mips.com>
 351             Chao-ying Fu  <fu@mips.com>
 352
 353         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 354         * mips-opc.c: Add DSP64 instructions.
 355
 356 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 357
 358         * m68hc11-dis.c (print_insn): Warning fix.
 359
 360 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 361
 362         * po/Make-in (top_builddir): Define.
 363
 364 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 365
 366         * Makefile.am: Run "make dep-am".
 367         * Makefile.in: Regenerate.
 368         * config.in: Regenerate.
 369
 370 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 371
 372         * Makefile.am (INCLUDES): Use @INCINTL@.
 373         * acinclude.m4: Include new gettext macros.
 374         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 375         Remove local code for po/Makefile.
 376         * Makefile.in, aclocal.m4, configure: Regenerated.
 377
 378 2006-05-30  Nick Clifton  <nickc@redhat.com>
 379
 380         * po/es.po: Updated Spanish translation.
 381
 382 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 383
 384         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 385         and fmovem entries.  Put register list entries before immediate
 386         mask entries.  Use "l" rather than "L" in the fmovem entries.
 387         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 388         out from INFO.
 389         (m68k_scan_mask): New function, split out from...
 390         (print_insn_m68k): ...here.  If no architecture has been set,
 391         first try printing an m680x0 instruction, then try a Coldfire one.
 392
 393 2006-05-24  Nick Clifton  <nickc@redhat.com>
 394
 395         * po/ga.po: Updated Irish translation.
 396
 397 2006-05-22  Nick Clifton  <nickc@redhat.com>
 398
 399         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 400
 401 2006-05-22  Nick Clifton  <nickc@redhat.com>
 402
 403         * po/nl.po: Updated translation.
 404
 405 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 406
 407         * avr-dis.c: Formatting fix.
 408
 409 2006-05-14  Thiemo Seufer  <ths@mips.com>
 410
 411         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 412         (mips16_opcodes): Change membership of instructions to their
 413         lowest baseline ISA.
 414
 415 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 416
 417         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 418
 419 2006-05-05  Julian Brown  <julian@codesourcery.com>
 420
 421         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 422         vldm/vstm.
 423
 424 2006-05-05  Thiemo Seufer  <ths@mips.com>
 425             David Ung  <davidu@mips.com>
 426
 427         * mips-opc.c: Add macro for cache instruction.
 428
 429 2006-05-04  Thiemo Seufer  <ths@mips.com>
 430             Nigel Stephens  <nigel@mips.com>
 431             David Ung  <davidu@mips.com>
 432
 433         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 434         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 435         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 436         MIPS64R2.
 437         * mips-opc.c: fix random typos in comments.
 438         (INSN_SMARTMIPS): New defines.
 439         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 440         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 441         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 442         FP_S and FP_D flags to denote single and double register
 443         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 444         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 445         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 446         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 447         release 2 ISAs.
 448         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 449
 450 2006-05-03  Thiemo Seufer  <ths@mips.com>
 451
 452         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 453
 454 2006-05-02  Thiemo Seufer  <ths@mips.com>
 455             Nigel Stephens  <nigel@mips.com>
 456             David Ung  <davidu@mips.com>
 457
 458         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 459         (print_mips16_insn_arg): Force mips16 to odd addresses.
 460
 461 2006-04-30  Thiemo Seufer  <ths@mips.com>
 462             David Ung  <davidu@mips.com>
 463
 464         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 465         "udi0" to "udi15".
 466         * mips-dis.c (print_insn_args): Adds udi argument handling.
 467
 468 2006-04-28  James E Wilson  <wilson@specifix.com>
 469
 470         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 471         error message.
 472
 473 2006-04-28  Thiemo Seufer  <ths@mips.com>
 474             David Ung  <davidu@mips.com>
 475             Nigel Stephens  <nigel@mips.com>
 476
 477         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 478         names.
 479
 480 2006-04-28  Thiemo Seufer  <ths@mips.com>
 481             Nigel Stephens  <nigel@mips.com>
 482             David Ung  <davidu@mips.com>
 483
 484         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 485         (print_insn_mips):  Adjust print_insn_args call.
 486
 487 2006-04-28  Thiemo Seufer  <ths@mips.com>
 488             Nigel Stephens  <nigel@mips.com>
 489
 490         * mips-dis.c (print_insn_args): Print $fcc only for FP
 491         instructions, use $cc elsewise.
 492
 493 2006-04-28  Thiemo Seufer  <ths@mips.com>
 494             Nigel Stephens  <nigel@mips.com>
 495
 496         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 497         Map MIPS16 registers to O32 names.
 498         (print_mips16_insn_arg): Use mips16_reg_names.
 499
 500 2006-04-26  Julian Brown  <julian@codesourcery.com>
 501
 502         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 503         VMOV.
 504
 505 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 506             Julian Brown  <julian@codesourcery.com>
 507
 508         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 509         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 510         Add unified load/store instruction names.
 511         (neon_opcode_table): New.
 512         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 513         (arm_decode_bitfield): New.
 514         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 515         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 516         (print_insn_neon): New.
 517         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 518         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 519         (print_insn_thumb32): Likewise.
 520
 521 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 522
 523         * Makefile.am: Run "make dep-am".
 524         * Makefile.in: Regenerate.
 525
 526 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 527
 528         * avr-dis.c (avr_operand): Warning fix.
 529
 530         * configure: Regenerate.
 531
 532 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 533
 534         * po/POTFILES.in: Regenerated.
 535
 536 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 537
 538         PR binutils/2454
 539         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 540         the symolic form of an address, so that the output of objdump -d
 541         can be reassembled.
 542
 543 2006-04-10  DJ Delorie  <dj@redhat.com>
 544
 545         * m32c-asm.c: Regenerate.
 546
 547 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 548
 549         * Makefile.am: Add install-html target.
 550         * Makefile.in: Regenerate.
 551
 552 2006-04-06  Nick Clifton  <nickc@redhat.com>
 553
 554         * po/vi/po: Updated Vietnamese translation.
 555
 556 2006-03-31  Paul Koning  <ni1d@arrl.net>
 557
 558         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 559
 560 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 561
 562         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 563         logic to identify halfword shifts.
 564
 565 2006-03-16  Paul Brook  <paul@codesourcery.com>
 566
 567         * arm-dis.c (arm_opcodes): Rename swi to svc.
 568         (thumb_opcodes): Ditto.
 569
 570 2006-03-13  DJ Delorie  <dj@redhat.com>
 571
 572         * m32c-asm.c: Regenerate.
 573         * m32c-desc.c: Likewise.
 574         * m32c-desc.h: Likewise.
 575         * m32c-dis.c: Likewise.
 576         * m32c-ibld.c: Likewise.
 577         * m32c-opc.c: Likewise.
 578         * m32c-opc.h: Likewise.
 579
 580 2006-03-10  DJ Delorie  <dj@redhat.com>
 581
 582         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 583         * m32c-opc.c: Likewise.
 584         * m32c-opc.h: Likewise.
 585
 586
 587 2006-03-09  Nick Clifton  <nickc@redhat.com>
 588
 589         * po/sv.po: Updated Swedish translation.
 590
 591 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 592
 593         PR binutils/2428
 594         * i386-dis.c (REP_Fixup): New function.
 595         (AL): Remove duplicate.
 596         (Xbr): New.
 597         (Xvr): Likewise.
 598         (Ybr): Likewise.
 599         (Yvr): Likewise.
 600         (indirDXr): Likewise.
 601         (ALr): Likewise.
 602         (eAXr): Likewise.
 603         (dis386): Updated entries of ins, outs, movs, lods and stos.
 604
 605 2006-03-05  Nick Clifton  <nickc@redhat.com>
 606
 607         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 608         signed 32-bit value into an unsigned 32-bit field when the host is
 609         a 64-bit machine.
 610         * fr30-ibld.c: Regenerate.
 611         * frv-ibld.c: Regenerate.
 612         * ip2k-ibld.c: Regenerate.
 613         * iq2000-asm.c: Regenerate.
 614         * iq2000-ibld.c: Regenerate.
 615         * m32c-ibld.c: Regenerate.
 616         * m32r-ibld.c: Regenerate.
 617         * openrisc-ibld.c: Regenerate.
 618         * xc16x-ibld.c: Regenerate.
 619         * xstormy16-ibld.c: Regenerate.
 620
 621 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 622
 623         * xc16x-asm.c: Regenerate.
 624         * xc16x-dis.c: Regenerate.
 625
 626 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 627
 628         * po/Make-in: Add html target.
 629
 630 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 631
 632         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 633         Intel Merom New Instructions.
 634         (THREE_BYTE_0): Likewise.
 635         (THREE_BYTE_1): Likewise.
 636         (three_byte_table): Likewise.
 637         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 638         THREE_BYTE_1 for entry 0x3a.
 639         (twobyte_has_modrm): Updated.
 640         (twobyte_uses_SSE_prefix): Likewise.
 641         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 642         Instructions.
 643
 644 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 645
 646         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 647         (v9_hpriv_reg_names): New table.
 648         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 649         New cases '$' and '%' for read/write hyperprivileged register.
 650         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 651         window handling and rdhpr/wrhpr instructions.
 652
 653 2006-02-24  DJ Delorie  <dj@redhat.com>
 654
 655         * m32c-desc.c: Regenerate with linker relaxation attributes.
 656         * m32c-desc.h: Likewise.
 657         * m32c-dis.c: Likewise.
 658         * m32c-opc.c: Likewise.
 659
 660 2006-02-24  Paul Brook  <paul@codesourcery.com>
 661
 662         * arm-dis.c (arm_opcodes): Add V7 instructions.
 663         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 664         (print_arm_address): New function.
 665         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 666         (psr_name): New function.
 667         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 668
 669 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 670
 671         * ia64-opc-i.c (bXc): New.
 672         (mXc): Likewise.
 673         (OpX2TaTbYaXcC): Likewise.
 674         (TF). Likewise.
 675         (TFCM). Likewise.
 676         (ia64_opcodes_i): Add instructions for tf.
 677
 678         * ia64-opc.h (IMMU5b): New.
 679
 680         * ia64-asmtab.c: Regenerated.
 681
 682 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 683
 684         * ia64-gen.c: Update copyright years.
 685         * ia64-opc-b.c: Likewise.
 686
 687 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 688
 689         * ia64-gen.c (lookup_regindex): Handle ".vm".
 690         (print_dependency_table): Handle '\"'.
 691
 692         * ia64-ic.tbl: Updated from SDM 2.2.
 693         * ia64-raw.tbl: Likewise.
 694         * ia64-waw.tbl: Likewise.
 695         * ia64-asmtab.c: Regenerated.
 696
 697         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 698
 699 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 700             Anil Paranjape   <anilp1@kpitcummins.com>
 701             Shilin Shakti    <shilins@kpitcummins.com>
 702
 703         * xc16x-desc.h: New file
 704         * xc16x-desc.c: New file
 705         * xc16x-opc.h: New file
 706         * xc16x-opc.c: New file
 707         * xc16x-ibld.c: New file
 708         * xc16x-asm.c: New file
 709         * xc16x-dis.c: New file
 710         * Makefile.am: Entries for xc16x
 711         * Makefile.in: Regenerate
 712         * cofigure.in: Add xc16x target information.
 713         * configure: Regenerate.
 714         * disassemble.c: Add xc16x target information.
 715
 716 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 719         moves.
 720
 721 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * i386-dis.c ('Z'): Add a new macro.
 724         (dis386_twobyte): Use "movZ" for control register moves.
 725
 726 2006-02-10  Nick Clifton  <nickc@redhat.com>
 727
 728         * iq2000-asm.c: Regenerate.
 729
 730 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 731
 732         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 733
 734 2006-01-26  David Ung  <davidu@mips.com>
 735
 736         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 737         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 738         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 739         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 740         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 741
 742 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 743
 744         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 745         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 746         disassembled.
 747         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 748         buffer overflows when disassembling instructions like
 749         ld (ix+123),0x23
 750         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 751         operand, if the offset is negative.
 752
 753 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 754
 755         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 756         unsigned char to hold data to be disassembled.
 757
 758 2006-01-17  Andreas Schwab  <schwab@suse.de>
 759
 760         PR binutils/1486
 761         * disassemble.c (disassemble_init_for_target): Set
 762         disassembler_needs_relocs for bfd_arch_arm.
 763
 764 2006-01-16  Paul Brook  <paul@codesourcery.com>
 765
 766         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 767         f?add?, and f?sub? instructions.
 768
 769 2006-01-16  Nick Clifton  <nickc@redhat.com>
 770
 771         * po/zh_CN.po: New Chinese (simplified) translation.
 772         * configure.in (ALL_LINGUAS): Add "zh_CH".
 773         * configure: Regenerate.
 774
 775 2006-01-05  Paul Brook  <paul@codesourcery.com>
 776
 777         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 778
 779 2006-01-06  DJ Delorie  <dj@redhat.com>
 780
 781         * m32c-desc.c: Regenerate.
 782         * m32c-opc.c: Regenerate.
 783         * m32c-opc.h: Regenerate.
 784
 785 2006-01-03  DJ Delorie  <dj@redhat.com>
 786
 787         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 788         * m32c-ibld.c: Regenerated.
 789
 790 For older changes see ChangeLog-2005
 791 \f
 792 Local Variables:
 793 mode: change-log
 794 left-margin: 8
 795 fill-column: 74
 796 version-control: never
 797 End: