opcodes/ChangeLog

   1 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * m68hc11-dis.c (print_insn): Warning fix.
   4
   5 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
   6
   7         * po/Make-in (top_builddir): Define.
   8
   9 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
  10
  11         * Makefile.am: Run "make dep-am".
  12         * Makefile.in: Regenerate.
  13         * config.in: Regenerate.
  14
  15 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  16
  17         * Makefile.am (INCLUDES): Use @INCINTL@.
  18         * acinclude.m4: Include new gettext macros.
  19         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
  20         Remove local code for po/Makefile.
  21         * Makefile.in, aclocal.m4, configure: Regenerated.
  22
  23 2006-05-30  Nick Clifton  <nickc@redhat.com>
  24
  25         * po/es.po: Updated Spanish translation.
  26
  27 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
  28
  29         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
  30         and fmovem entries.  Put register list entries before immediate
  31         mask entries.  Use "l" rather than "L" in the fmovem entries.
  32         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
  33         out from INFO.
  34         (m68k_scan_mask): New function, split out from...
  35         (print_insn_m68k): ...here.  If no architecture has been set,
  36         first try printing an m680x0 instruction, then try a Coldfire one.
  37
  38 2006-05-24  Nick Clifton  <nickc@redhat.com>
  39
  40         * po/ga.po: Updated Irish translation.
  41
  42 2006-05-22  Nick Clifton  <nickc@redhat.com>
  43
  44         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
  45
  46 2006-05-22  Nick Clifton  <nickc@redhat.com>
  47
  48         * po/nl.po: Updated translation.
  49
  50 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
  51
  52         * avr-dis.c: Formatting fix.
  53
  54 2006-05-14  Thiemo Seufer  <ths@mips.com>
  55
  56         * mips16-opc.c (I1, I32, I64): New shortcut defines.
  57         (mips16_opcodes): Change membership of instructions to their
  58         lowest baseline ISA.
  59
  60 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
  61
  62         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
  63
  64 2006-05-05  Julian Brown  <julian@codesourcery.com>
  65
  66         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
  67         vldm/vstm.
  68
  69 2006-05-05  Thiemo Seufer  <ths@mips.com>
  70             David Ung  <davidu@mips.com>
  71
  72         * mips-opc.c: Add macro for cache instruction.
  73
  74 2006-05-04  Thiemo Seufer  <ths@mips.com>
  75             Nigel Stephens  <nigel@mips.com>
  76             David Ung  <davidu@mips.com>
  77
  78         * mips-dis.c (mips_arch_choices): Add smartmips instruction
  79         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
  80         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
  81         MIPS64R2.
  82         * mips-opc.c: fix random typos in comments.
  83         (INSN_SMARTMIPS): New defines.
  84         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
  85         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
  86         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
  87         FP_S and FP_D flags to denote single and double register
  88         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
  89         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
  90         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
  91         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
  92         release 2 ISAs.
  93         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
  94
  95 2006-05-03  Thiemo Seufer  <ths@mips.com>
  96
  97         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
  98
  99 2006-05-02  Thiemo Seufer  <ths@mips.com>
 100             Nigel Stephens  <nigel@mips.com>
 101             David Ung  <davidu@mips.com>
 102
 103         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 104         (print_mips16_insn_arg): Force mips16 to odd addresses.
 105
 106 2006-04-30  Thiemo Seufer  <ths@mips.com>
 107             David Ung  <davidu@mips.com>
 108
 109         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 110         "udi0" to "udi15".
 111         * mips-dis.c (print_insn_args): Adds udi argument handling.
 112
 113 2006-04-28  James E Wilson  <wilson@specifix.com>
 114
 115         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 116         error message.
 117
 118 2006-04-28  Thiemo Seufer  <ths@mips.com>
 119             David Ung  <davidu@mips.com>
 120             Nigel Stephens  <nigel@mips.com>
 121
 122         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 123         names.
 124
 125 2006-04-28  Thiemo Seufer  <ths@mips.com>
 126             Nigel Stephens  <nigel@mips.com>
 127             David Ung  <davidu@mips.com>
 128
 129         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 130         (print_insn_mips):  Adjust print_insn_args call.
 131
 132 2006-04-28  Thiemo Seufer  <ths@mips.com>
 133             Nigel Stephens  <nigel@mips.com>
 134
 135         * mips-dis.c (print_insn_args): Print $fcc only for FP
 136         instructions, use $cc elsewise.
 137
 138 2006-04-28  Thiemo Seufer  <ths@mips.com>
 139             Nigel Stephens  <nigel@mips.com>
 140
 141         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 142         Map MIPS16 registers to O32 names.
 143         (print_mips16_insn_arg): Use mips16_reg_names.
 144
 145 2006-04-26  Julian Brown  <julian@codesourcery.com>
 146
 147         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 148         VMOV.
 149
 150 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 151             Julian Brown  <julian@codesourcery.com>
 152
 153         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 154         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 155         Add unified load/store instruction names.
 156         (neon_opcode_table): New.
 157         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 158         (arm_decode_bitfield): New.
 159         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 160         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 161         (print_insn_neon): New.
 162         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 163         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 164         (print_insn_thumb32): Likewise.
 165
 166 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 167
 168         * Makefile.am: Run "make dep-am".
 169         * Makefile.in: Regenerate.
 170
 171 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 172
 173         * avr-dis.c (avr_operand): Warning fix.
 174
 175         * configure: Regenerate.
 176
 177 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 178
 179         * po/POTFILES.in: Regenerated.
 180
 181 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 182
 183         PR binutils/2454
 184         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 185         the symolic form of an address, so that the output of objdump -d
 186         can be reassembled.
 187
 188 2006-04-10  DJ Delorie  <dj@redhat.com>
 189
 190         * m32c-asm.c: Regenerate.
 191
 192 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 193
 194         * Makefile.am: Add install-html target.
 195         * Makefile.in: Regenerate.
 196
 197 2006-04-06  Nick Clifton  <nickc@redhat.com>
 198
 199         * po/vi/po: Updated Vietnamese translation.
 200
 201 2006-03-31  Paul Koning  <ni1d@arrl.net>
 202
 203         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 204
 205 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 206
 207         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 208         logic to identify halfword shifts.
 209
 210 2006-03-16  Paul Brook  <paul@codesourcery.com>
 211
 212         * arm-dis.c (arm_opcodes): Rename swi to svc.
 213         (thumb_opcodes): Ditto.
 214
 215 2006-03-13  DJ Delorie  <dj@redhat.com>
 216
 217         * m32c-asm.c: Regenerate.
 218         * m32c-desc.c: Likewise.
 219         * m32c-desc.h: Likewise.
 220         * m32c-dis.c: Likewise.
 221         * m32c-ibld.c: Likewise.
 222         * m32c-opc.c: Likewise.
 223         * m32c-opc.h: Likewise.
 224
 225 2006-03-10  DJ Delorie  <dj@redhat.com>
 226
 227         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 228         * m32c-opc.c: Likewise.
 229         * m32c-opc.h: Likewise.
 230
 231
 232 2006-03-09  Nick Clifton  <nickc@redhat.com>
 233
 234         * po/sv.po: Updated Swedish translation.
 235
 236 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 237
 238         PR binutils/2428
 239         * i386-dis.c (REP_Fixup): New function.
 240         (AL): Remove duplicate.
 241         (Xbr): New.
 242         (Xvr): Likewise.
 243         (Ybr): Likewise.
 244         (Yvr): Likewise.
 245         (indirDXr): Likewise.
 246         (ALr): Likewise.
 247         (eAXr): Likewise.
 248         (dis386): Updated entries of ins, outs, movs, lods and stos.
 249
 250 2006-03-05  Nick Clifton  <nickc@redhat.com>
 251
 252         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 253         signed 32-bit value into an unsigned 32-bit field when the host is
 254         a 64-bit machine.
 255         * fr30-ibld.c: Regenerate.
 256         * frv-ibld.c: Regenerate.
 257         * ip2k-ibld.c: Regenerate.
 258         * iq2000-asm.c: Regenerate.
 259         * iq2000-ibld.c: Regenerate.
 260         * m32c-ibld.c: Regenerate.
 261         * m32r-ibld.c: Regenerate.
 262         * openrisc-ibld.c: Regenerate.
 263         * xc16x-ibld.c: Regenerate.
 264         * xstormy16-ibld.c: Regenerate.
 265
 266 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 267
 268         * xc16x-asm.c: Regenerate.
 269         * xc16x-dis.c: Regenerate.
 270
 271 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 272
 273         * po/Make-in: Add html target.
 274
 275 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 276
 277         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 278         Intel Merom New Instructions.
 279         (THREE_BYTE_0): Likewise.
 280         (THREE_BYTE_1): Likewise.
 281         (three_byte_table): Likewise.
 282         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 283         THREE_BYTE_1 for entry 0x3a.
 284         (twobyte_has_modrm): Updated.
 285         (twobyte_uses_SSE_prefix): Likewise.
 286         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 287         Instructions.
 288
 289 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 290
 291         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 292         (v9_hpriv_reg_names): New table.
 293         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 294         New cases '$' and '%' for read/write hyperprivileged register.
 295         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 296         window handling and rdhpr/wrhpr instructions.
 297
 298 2006-02-24  DJ Delorie  <dj@redhat.com>
 299
 300         * m32c-desc.c: Regenerate with linker relaxation attributes.
 301         * m32c-desc.h: Likewise.
 302         * m32c-dis.c: Likewise.
 303         * m32c-opc.c: Likewise.
 304
 305 2006-02-24  Paul Brook  <paul@codesourcery.com>
 306
 307         * arm-dis.c (arm_opcodes): Add V7 instructions.
 308         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 309         (print_arm_address): New function.
 310         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 311         (psr_name): New function.
 312         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 313
 314 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 315
 316         * ia64-opc-i.c (bXc): New.
 317         (mXc): Likewise.
 318         (OpX2TaTbYaXcC): Likewise.
 319         (TF). Likewise.
 320         (TFCM). Likewise.
 321         (ia64_opcodes_i): Add instructions for tf.
 322
 323         * ia64-opc.h (IMMU5b): New.
 324
 325         * ia64-asmtab.c: Regenerated.
 326
 327 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 328
 329         * ia64-gen.c: Update copyright years.
 330         * ia64-opc-b.c: Likewise.
 331
 332 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 333
 334         * ia64-gen.c (lookup_regindex): Handle ".vm".
 335         (print_dependency_table): Handle '\"'.
 336
 337         * ia64-ic.tbl: Updated from SDM 2.2.
 338         * ia64-raw.tbl: Likewise.
 339         * ia64-waw.tbl: Likewise.
 340         * ia64-asmtab.c: Regenerated.
 341
 342         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 343
 344 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 345             Anil Paranjape   <anilp1@kpitcummins.com>
 346             Shilin Shakti    <shilins@kpitcummins.com>
 347
 348         * xc16x-desc.h: New file
 349         * xc16x-desc.c: New file
 350         * xc16x-opc.h: New file
 351         * xc16x-opc.c: New file
 352         * xc16x-ibld.c: New file
 353         * xc16x-asm.c: New file
 354         * xc16x-dis.c: New file
 355         * Makefile.am: Entries for xc16x
 356         * Makefile.in: Regenerate
 357         * cofigure.in: Add xc16x target information.
 358         * configure: Regenerate.
 359         * disassemble.c: Add xc16x target information.
 360
 361 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 362
 363         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 364         moves.
 365
 366 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 367
 368         * i386-dis.c ('Z'): Add a new macro.
 369         (dis386_twobyte): Use "movZ" for control register moves.
 370
 371 2006-02-10  Nick Clifton  <nickc@redhat.com>
 372
 373         * iq2000-asm.c: Regenerate.
 374
 375 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 376
 377         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 378
 379 2006-01-26  David Ung  <davidu@mips.com>
 380
 381         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 382         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 383         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 384         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 385         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 386
 387 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 388
 389         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 390         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 391         disassembled.
 392         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 393         buffer overflows when disassembling instructions like
 394         ld (ix+123),0x23
 395         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 396         operand, if the offset is negative.
 397
 398 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 399
 400         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 401         unsigned char to hold data to be disassembled.
 402
 403 2006-01-17  Andreas Schwab  <schwab@suse.de>
 404
 405         PR binutils/1486
 406         * disassemble.c (disassemble_init_for_target): Set
 407         disassembler_needs_relocs for bfd_arch_arm.
 408
 409 2006-01-16  Paul Brook  <paul@codesourcery.com>
 410
 411         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 412         f?add?, and f?sub? instructions.
 413
 414 2006-01-16  Nick Clifton  <nickc@redhat.com>
 415
 416         * po/zh_CN.po: New Chinese (simplified) translation.
 417         * configure.in (ALL_LINGUAS): Add "zh_CH".
 418         * configure: Regenerate.
 419
 420 2006-01-05  Paul Brook  <paul@codesourcery.com>
 421
 422         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 423
 424 2006-01-06  DJ Delorie  <dj@redhat.com>
 425
 426         * m32c-desc.c: Regenerate.
 427         * m32c-opc.c: Regenerate.
 428         * m32c-opc.h: Regenerate.
 429
 430 2006-01-03  DJ Delorie  <dj@redhat.com>
 431
 432         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 433         * m32c-ibld.c: Regenerated.
 434
 435 For older changes see ChangeLog-2005
 436 \f
 437 Local Variables:
 438 mode: change-log
 439 left-margin: 8
 440 fill-column: 74
 441 version-control: never
 442 End: