1 2005-07-16 Alan Modra <amodra@bigpond.net.au>
3 * Makefile.am: Run "make dep-am".
4 (stamp-m32c): Fix cpu dependencies.
5 * Makefile.in: Regenerate.
6 * ip2k-dis.c: Regenerate.
8 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
10 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
11 (VMX_Fixup): New. Fix up Intel VMX Instructions.
15 (dis386_twobyte): Updated entries 0x78 and 0x79.
16 (twobyte_has_modrm): Likewise.
17 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
18 (OP_G): Handle m_mode.
20 2005-07-14 Jim Blandy <jimb@redhat.com>
22 Add support for the Renesas M32C and M16C.
23 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
24 * m32c-desc.h, m32c-opc.h: New.
25 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
26 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
28 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
29 m32c-ibld.lo, m32c-opc.lo.
30 (CLEANFILES): List stamp-m32c.
31 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
32 (CGEN_CPUS): Add m32c.
33 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
34 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
35 (m32c_opc_h): New variable.
36 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
37 (m32c-opc.lo): New rules.
38 * Makefile.in: Regenerated.
39 * configure.in: Add case for bfd_m32c_arch.
40 * configure: Regenerated.
41 * disassemble.c (ARCH_m32c): New.
42 [ARCH_m32c]: #include "m32c-desc.h".
43 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
44 (disassemble_init_for_target) [ARCH_m32c]: Same.
46 * cgen-ops.h, cgen-types.h: New files.
47 * Makefile.am (HFILES): List them.
48 * Makefile.in: Regenerated.
50 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
52 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
53 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
54 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
55 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
56 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
57 v850-dis.c: Fix format bugs.
58 * ia64-gen.c (fail, warn): Add format attribute.
59 * or32-opc.c (debug): Likewise.
61 2005-07-07 Khem Raj <kraj@mvista.com>
63 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
66 2005-07-06 Alan Modra <amodra@bigpond.net.au>
68 * Makefile.am (stamp-m32r): Fix path to cpu files.
69 (stamp-m32r, stamp-iq2000): Likewise.
70 * Makefile.in: Regenerate.
71 * m32r-asm.c: Regenerate.
72 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
73 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
75 2005-07-05 Nick Clifton <nickc@redhat.com>
77 * iq2000-asm.c: Regenerate.
78 * ms1-asm.c: Regenerate.
80 2005-07-05 Jan Beulich <jbeulich@novell.com>
82 * i386-dis.c (SVME_Fixup): New.
83 (grps): Use it for the lidt entry.
84 (PNI_Fixup): Call OP_M rather than OP_E.
85 (INVLPG_Fixup): Likewise.
87 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
89 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
91 2005-07-01 Nick Clifton <nickc@redhat.com>
93 * a29k-dis.c: Update to ISO C90 style function declarations and
95 * alpha-opc.c: Likewise.
96 * arc-dis.c: Likewise.
97 * arc-opc.c: Likewise.
98 * avr-dis.c: Likewise.
99 * cgen-asm.in: Likewise.
100 * cgen-dis.in: Likewise.
101 * cgen-ibld.in: Likewise.
102 * cgen-opc.c: Likewise.
103 * cris-dis.c: Likewise.
104 * d10v-dis.c: Likewise.
105 * d30v-dis.c: Likewise.
106 * d30v-opc.c: Likewise.
107 * dis-buf.c: Likewise.
108 * dlx-dis.c: Likewise.
109 * h8300-dis.c: Likewise.
110 * h8500-dis.c: Likewise.
111 * hppa-dis.c: Likewise.
112 * i370-dis.c: Likewise.
113 * i370-opc.c: Likewise.
114 * m10200-dis.c: Likewise.
115 * m10300-dis.c: Likewise.
116 * m68k-dis.c: Likewise.
117 * m88k-dis.c: Likewise.
118 * mips-dis.c: Likewise.
119 * mmix-dis.c: Likewise.
120 * msp430-dis.c: Likewise.
121 * ns32k-dis.c: Likewise.
122 * or32-dis.c: Likewise.
123 * or32-opc.c: Likewise.
124 * pdp11-dis.c: Likewise.
125 * pj-dis.c: Likewise.
126 * s390-dis.c: Likewise.
127 * sh-dis.c: Likewise.
128 * sh64-dis.c: Likewise.
129 * sparc-dis.c: Likewise.
130 * sparc-opc.c: Likewise.
131 * sysdep.h: Likewise.
132 * tic30-dis.c: Likewise.
133 * tic4x-dis.c: Likewise.
134 * tic80-dis.c: Likewise.
135 * v850-dis.c: Likewise.
136 * v850-opc.c: Likewise.
137 * vax-dis.c: Likewise.
138 * w65-dis.c: Likewise.
139 * z8kgen.c: Likewise.
141 * fr30-*: Regenerate.
143 * ip2k-*: Regenerate.
144 * iq2000-*: Regenerate.
145 * m32r-*: Regenerate.
147 * openrisc-*: Regenerate.
148 * xstormy16-*: Regenerate.
150 2005-06-23 Ben Elliston <bje@gnu.org>
152 * m68k-dis.c: Use ISC C90.
153 * m68k-opc.c: Formatting fixes.
155 2005-06-16 David Ung <davidu@mips.com>
157 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
158 instructions to the table; seb/seh/sew/zeb/zeh/zew.
160 2005-06-15 Dave Brolley <brolley@redhat.com>
162 Contribute Morpho ms1 on behalf of Red Hat
163 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
164 ms1-opc.h: New files, Morpho ms1 target.
166 2004-05-14 Stan Cox <scox@redhat.com>
168 * disassemble.c (ARCH_ms1): Define.
169 (disassembler): Handle bfd_arch_ms1
171 2004-05-13 Michael Snyder <msnyder@redhat.com>
173 * Makefile.am, Makefile.in: Add ms1 target.
174 * configure.in: Ditto.
176 2005-06-08 Zack Weinberg <zack@codesourcery.com>
178 * arm-opc.h: Delete; fold contents into ...
179 * arm-dis.c: ... here. Move includes of internal COFF headers
180 next to includes of internal ELF headers.
181 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
182 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
183 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
184 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
185 (iwmmxt_wwnames, iwmmxt_wwssnames):
187 (regnames): Remove iWMMXt coprocessor register sets.
188 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
189 (get_arm_regnames): Adjust fourth argument to match above changes.
190 (set_iwmmxt_regnames): Delete.
191 (print_insn_arm): Constify 'c'. Use ISO syntax for function
192 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
193 and iwmmxt_cregnames, not set_iwmmxt_regnames.
194 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
195 ISO syntax for function pointer calls.
197 2005-06-07 Zack Weinberg <zack@codesourcery.com>
199 * arm-dis.c: Split up the comments describing the format codes, so
200 that the ARM and 16-bit Thumb opcode tables each have comments
201 preceding them that describe all the codes, and only the codes,
202 valid in those tables. (32-bit Thumb table is already like this.)
203 Reorder the lists in all three comments to match the order in
204 which the codes are implemented.
205 Remove all forward declarations of static functions. Convert all
206 function definitions to ISO C format.
207 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
209 (print_insn_thumb16): Remove unused case 'I'.
210 (print_insn): Update for changed calling convention of subroutines.
212 2005-05-25 Jan Beulich <jbeulich@novell.com>
214 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
215 hex (but retain it being displayed as signed). Remove redundant
216 checks. Add handling of displacements for 16-bit addressing in Intel
219 2005-05-25 Jan Beulich <jbeulich@novell.com>
221 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
222 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
223 masking of 'rm' in 16-bit memory address handling.
225 2005-05-19 Anton Blanchard <anton@samba.org>
227 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
228 (print_ppc_disassembler_options): Document it.
229 * ppc-opc.c (SVC_LEV): Define.
230 (LEV): Allow optional operand.
232 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
233 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
235 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
237 * Makefile.in: Regenerate.
239 2005-05-17 Zack Weinberg <zack@codesourcery.com>
241 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
242 instructions. Adjust disassembly of some opcodes to match
244 (thumb32_opcodes): New table.
245 (print_insn_thumb): Rename print_insn_thumb16; don't handle
246 two-halfword branches here.
247 (print_insn_thumb32): New function.
248 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
249 and print_insn_thumb32. Be consistent about order of
250 halfwords when printing 32-bit instructions.
252 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
255 * i386-dis.c (branch_v_mode): New.
256 (indirEv): Use branch_v_mode instead of v_mode.
257 (OP_E): Handle branch_v_mode.
259 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
261 * d10v-dis.c (dis_2_short): Support 64bit host.
263 2005-05-07 Nick Clifton <nickc@redhat.com>
265 * po/nl.po: Updated translation.
267 2005-05-07 Nick Clifton <nickc@redhat.com>
269 * Update the address and phone number of the FSF organization in
270 the GPL notices in the following files:
271 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
272 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
273 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
274 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
275 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
276 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
277 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
278 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
279 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
280 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
281 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
282 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
283 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
284 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
285 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
286 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
287 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
288 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
289 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
290 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
291 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
292 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
293 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
294 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
295 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
296 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
297 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
298 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
299 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
300 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
301 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
302 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
303 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
305 2005-05-05 James E Wilson <wilson@specifixinc.com>
307 * ia64-opc.c: Include sysdep.h before libiberty.h.
309 2005-05-05 Nick Clifton <nickc@redhat.com>
311 * configure.in (ALL_LINGUAS): Add vi.
312 * configure: Regenerate.
315 2005-04-26 Jerome Guitton <guitton@gnat.com>
317 * configure.in: Fix the check for basename declaration.
318 * configure: Regenerate.
320 2005-04-19 Alan Modra <amodra@bigpond.net.au>
322 * ppc-opc.c (RTO): Define.
323 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
324 entries to suit PPC440.
326 2005-04-18 Mark Kettenis <kettenis@gnu.org>
328 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
331 2005-04-14 Nick Clifton <nickc@redhat.com>
333 * po/fi.po: New translation: Finnish.
334 * configure.in (ALL_LINGUAS): Add fi.
335 * configure: Regenerate.
337 2005-04-14 Alan Modra <amodra@bigpond.net.au>
339 * Makefile.am (NO_WERROR): Define.
340 * configure.in: Invoke AM_BINUTILS_WARNINGS.
341 * Makefile.in: Regenerate.
342 * aclocal.m4: Regenerate.
343 * configure: Regenerate.
345 2005-04-04 Nick Clifton <nickc@redhat.com>
347 * fr30-asm.c: Regenerate.
348 * frv-asm.c: Regenerate.
349 * iq2000-asm.c: Regenerate.
350 * m32r-asm.c: Regenerate.
351 * openrisc-asm.c: Regenerate.
353 2005-04-01 Jan Beulich <jbeulich@novell.com>
355 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
356 visible operands in Intel mode. The first operand of monitor is
359 2005-04-01 Jan Beulich <jbeulich@novell.com>
361 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
362 easier future additions.
364 2005-03-31 Jerome Guitton <guitton@gnat.com>
366 * configure.in: Check for basename.
367 * configure: Regenerate.
370 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
372 * i386-dis.c (SEG_Fixup): New.
374 (dis386): Use "Sv" for 0x8c and 0x8e.
376 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
377 Nick Clifton <nickc@redhat.com>
379 * vax-dis.c: (entry_addr): New varible: An array of user supplied
380 function entry mask addresses.
381 (entry_addr_occupied_slots): New variable: The number of occupied
382 elements in entry_addr.
383 (entry_addr_total_slots): New variable: The total number of
384 elements in entry_addr.
385 (parse_disassembler_options): New function. Fills in the entry_addr
387 (free_entry_array): New function. Release the memory used by the
388 entry addr array. Suppressed because there is no way to call it.
389 (is_function_entry): Check if a given address is a function's
390 start address by looking at supplied entry mask addresses and
391 symbol information, if available.
392 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
394 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
396 * cris-dis.c (print_with_operands): Use ~31L for long instead
399 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
401 * mmix-opc.c (O): Revert the last change.
404 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
406 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
409 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
411 * mmix-opc.c (O, Z): Force expression as unsigned long.
413 2005-03-18 Nick Clifton <nickc@redhat.com>
415 * ip2k-asm.c: Regenerate.
416 * op/opcodes.pot: Regenerate.
418 2005-03-16 Nick Clifton <nickc@redhat.com>
419 Ben Elliston <bje@au.ibm.com>
421 * configure.in (werror): New switch: Add -Werror to the
422 compiler command line. Enabled by default. Disable via
424 * configure: Regenerate.
426 2005-03-16 Alan Modra <amodra@bigpond.net.au>
428 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
431 2005-03-15 Alan Modra <amodra@bigpond.net.au>
433 * po/es.po: Commit new Spanish translation.
435 * po/fr.po: Commit new French translation.
437 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
439 * vax-dis.c: Fix spelling error
440 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
441 of just "Entry mask: < r1 ... >"
443 2005-03-12 Zack Weinberg <zack@codesourcery.com>
445 * arm-dis.c (arm_opcodes): Document %E and %V.
446 Add entries for v6T2 ARM instructions:
447 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
448 (print_insn_arm): Add support for %E and %V.
449 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
451 2005-03-10 Jeff Baker <jbaker@qnx.com>
452 Alan Modra <amodra@bigpond.net.au>
454 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
455 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
457 (XSPRG_MASK): Mask off extra bits now part of sprg field.
458 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
459 mfsprg4..7 after msprg and consolidate.
461 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
463 * vax-dis.c (entry_mask_bit): New array.
464 (print_insn_vax): Decode function entry mask.
466 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
468 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
470 2005-03-05 Alan Modra <amodra@bigpond.net.au>
472 * po/opcodes.pot: Regenerate.
474 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
476 * arc-dis.c (a4_decoding_class): New enum.
477 (dsmOneArcInst): Use the enum values for the decoding class.
478 Remove redundant case in the switch for decodingClass value 11.
480 2005-03-02 Jan Beulich <jbeulich@novell.com>
482 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
484 (OP_C): Consider lock prefix in non-64-bit modes.
486 2005-02-24 Alan Modra <amodra@bigpond.net.au>
488 * cris-dis.c (format_hex): Remove ineffective warning fix.
489 * crx-dis.c (make_instruction): Warning fix.
490 * frv-asm.c: Regenerate.
492 2005-02-23 Nick Clifton <nickc@redhat.com>
494 * cgen-dis.in: Use bfd_byte for buffers that are passed to
497 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
499 * crx-dis.c (make_instruction): Move argument structure into inner
500 scope and ensure that all of its fields are initialised before
503 * fr30-asm.c: Regenerate.
504 * fr30-dis.c: Regenerate.
505 * frv-asm.c: Regenerate.
506 * frv-dis.c: Regenerate.
507 * ip2k-asm.c: Regenerate.
508 * ip2k-dis.c: Regenerate.
509 * iq2000-asm.c: Regenerate.
510 * iq2000-dis.c: Regenerate.
511 * m32r-asm.c: Regenerate.
512 * m32r-dis.c: Regenerate.
513 * openrisc-asm.c: Regenerate.
514 * openrisc-dis.c: Regenerate.
515 * xstormy16-asm.c: Regenerate.
516 * xstormy16-dis.c: Regenerate.
518 2005-02-22 Alan Modra <amodra@bigpond.net.au>
520 * arc-ext.c: Warning fixes.
521 * arc-ext.h: Likewise.
522 * cgen-opc.c: Likewise.
523 * ia64-gen.c: Likewise.
524 * maxq-dis.c: Likewise.
525 * ns32k-dis.c: Likewise.
526 * w65-dis.c: Likewise.
527 * ia64-asmtab.c: Regenerate.
529 2005-02-22 Alan Modra <amodra@bigpond.net.au>
531 * fr30-desc.c: Regenerate.
532 * fr30-desc.h: Regenerate.
533 * fr30-opc.c: Regenerate.
534 * fr30-opc.h: Regenerate.
535 * frv-desc.c: Regenerate.
536 * frv-desc.h: Regenerate.
537 * frv-opc.c: Regenerate.
538 * frv-opc.h: Regenerate.
539 * ip2k-desc.c: Regenerate.
540 * ip2k-desc.h: Regenerate.
541 * ip2k-opc.c: Regenerate.
542 * ip2k-opc.h: Regenerate.
543 * iq2000-desc.c: Regenerate.
544 * iq2000-desc.h: Regenerate.
545 * iq2000-opc.c: Regenerate.
546 * iq2000-opc.h: Regenerate.
547 * m32r-desc.c: Regenerate.
548 * m32r-desc.h: Regenerate.
549 * m32r-opc.c: Regenerate.
550 * m32r-opc.h: Regenerate.
551 * m32r-opinst.c: Regenerate.
552 * openrisc-desc.c: Regenerate.
553 * openrisc-desc.h: Regenerate.
554 * openrisc-opc.c: Regenerate.
555 * openrisc-opc.h: Regenerate.
556 * xstormy16-desc.c: Regenerate.
557 * xstormy16-desc.h: Regenerate.
558 * xstormy16-opc.c: Regenerate.
559 * xstormy16-opc.h: Regenerate.
561 2005-02-21 Alan Modra <amodra@bigpond.net.au>
563 * Makefile.am: Run "make dep-am"
564 * Makefile.in: Regenerate.
566 2005-02-15 Nick Clifton <nickc@redhat.com>
568 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
569 compile time warnings.
570 (print_keyword): Likewise.
571 (default_print_insn): Likewise.
573 * fr30-desc.c: Regenerated.
574 * fr30-desc.h: Regenerated.
575 * fr30-dis.c: Regenerated.
576 * fr30-opc.c: Regenerated.
577 * fr30-opc.h: Regenerated.
578 * frv-desc.c: Regenerated.
579 * frv-dis.c: Regenerated.
580 * frv-opc.c: Regenerated.
581 * ip2k-asm.c: Regenerated.
582 * ip2k-desc.c: Regenerated.
583 * ip2k-desc.h: Regenerated.
584 * ip2k-dis.c: Regenerated.
585 * ip2k-opc.c: Regenerated.
586 * ip2k-opc.h: Regenerated.
587 * iq2000-desc.c: Regenerated.
588 * iq2000-dis.c: Regenerated.
589 * iq2000-opc.c: Regenerated.
590 * m32r-asm.c: Regenerated.
591 * m32r-desc.c: Regenerated.
592 * m32r-desc.h: Regenerated.
593 * m32r-dis.c: Regenerated.
594 * m32r-opc.c: Regenerated.
595 * m32r-opc.h: Regenerated.
596 * m32r-opinst.c: Regenerated.
597 * openrisc-desc.c: Regenerated.
598 * openrisc-desc.h: Regenerated.
599 * openrisc-dis.c: Regenerated.
600 * openrisc-opc.c: Regenerated.
601 * openrisc-opc.h: Regenerated.
602 * xstormy16-desc.c: Regenerated.
603 * xstormy16-desc.h: Regenerated.
604 * xstormy16-dis.c: Regenerated.
605 * xstormy16-opc.c: Regenerated.
606 * xstormy16-opc.h: Regenerated.
608 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
610 * dis-buf.c (perror_memory): Use sprintf_vma to print out
613 2005-02-11 Nick Clifton <nickc@redhat.com>
615 * iq2000-asm.c: Regenerate.
617 * frv-dis.c: Regenerate.
619 2005-02-07 Jim Blandy <jimb@redhat.com>
621 * Makefile.am (CGEN): Load guile.scm before calling the main
623 * Makefile.in: Regenerated.
624 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
625 Simply pass the cgen-opc.scm path to ${cgen} as its first
626 argument; ${cgen} itself now contains the '-s', or whatever is
627 appropriate for the Scheme being used.
629 2005-01-31 Andrew Cagney <cagney@gnu.org>
631 * configure: Regenerate to track ../gettext.m4.
633 2005-01-31 Jan Beulich <jbeulich@novell.com>
635 * ia64-gen.c (NELEMS): Define.
636 (shrink): Generate alias with missing second predicate register when
637 opcode has two outputs and these are both predicates.
638 * ia64-opc-i.c (FULL17): Define.
639 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
640 here to generate output template.
641 (TBITCM, TNATCM): Undefine after use.
642 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
643 first input. Add ld16 aliases without ar.csd as second output. Add
644 st16 aliases without ar.csd as second input. Add cmpxchg aliases
645 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
646 ar.ccv as third/fourth inputs. Consolidate through...
647 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
648 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
649 * ia64-asmtab.c: Regenerate.
651 2005-01-27 Andrew Cagney <cagney@gnu.org>
653 * configure: Regenerate to track ../gettext.m4 change.
655 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
657 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
658 * frv-asm.c: Rebuilt.
659 * frv-desc.c: Rebuilt.
660 * frv-desc.h: Rebuilt.
661 * frv-dis.c: Rebuilt.
662 * frv-ibld.c: Rebuilt.
663 * frv-opc.c: Rebuilt.
664 * frv-opc.h: Rebuilt.
666 2005-01-24 Andrew Cagney <cagney@gnu.org>
668 * configure: Regenerate, ../gettext.m4 was updated.
670 2005-01-21 Fred Fish <fnf@specifixinc.com>
672 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
673 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
674 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
677 2005-01-20 Alan Modra <amodra@bigpond.net.au>
679 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
681 2005-01-19 Fred Fish <fnf@specifixinc.com>
683 * mips-dis.c (no_aliases): New disassembly option flag.
684 (set_default_mips_dis_options): Init no_aliases to zero.
685 (parse_mips_dis_option): Handle no-aliases option.
686 (print_insn_mips): Ignore table entries that are aliases
687 if no_aliases is set.
688 (print_insn_mips16): Ditto.
689 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
690 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
691 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
692 * mips16-opc.c (mips16_opcodes): Ditto.
694 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
696 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
697 (inheritance diagram): Add missing edge.
698 (arch_sh1_up): Rename arch_sh_up to match external name to make life
699 easier for the testsuite.
700 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
701 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
702 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
703 arch_sh2a_or_sh4_up child.
704 (sh_table): Do renaming as above.
705 Correct comment for ldc.l for gas testsuite to read.
706 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
707 Correct comments for movy.w and movy.l for gas testsuite to read.
708 Correct comments for fmov.d and fmov.s for gas testsuite to read.
710 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
712 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
714 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
716 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
718 2005-01-10 Andreas Schwab <schwab@suse.de>
720 * disassemble.c (disassemble_init_for_target) <case
721 bfd_arch_ia64>: Set skip_zeroes to 16.
722 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
724 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
726 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
728 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
730 * avr-dis.c: Prettyprint. Added printing of symbol names in all
731 memory references. Convert avr_operand() to C90 formatting.
733 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
735 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
737 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
739 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
740 (no_op_insn): Initialize array with instructions that have no
742 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
744 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
746 * arm-dis.c: Correct top-level comment.
748 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
750 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
751 architecuture defining the insn.
752 (arm_opcodes, thumb_opcodes): Delete. Move to ...
753 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
755 Also include opcode/arm.h.
756 * Makefile.am (arm-dis.lo): Update dependency list.
757 * Makefile.in: Regenerate.
759 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
761 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
762 reflect the change to the short immediate syntax.
764 2004-11-19 Alan Modra <amodra@bigpond.net.au>
766 * or32-opc.c (debug): Warning fix.
767 * po/POTFILES.in: Regenerate.
769 * maxq-dis.c: Formatting.
770 (print_insn): Warning fix.
772 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
774 * arm-dis.c (WORD_ADDRESS): Define.
775 (print_insn): Use it. Correct big-endian end-of-section handling.
777 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
778 Vineet Sharma <vineets@noida.hcltech.com>
780 * maxq-dis.c: New file.
781 * disassemble.c (ARCH_maxq): Define.
782 (disassembler): Add 'print_insn_maxq_little' for handling maxq
784 * configure.in: Add case for bfd_maxq_arch.
785 * configure: Regenerate.
786 * Makefile.am: Add support for maxq-dis.c
787 * Makefile.in: Regenerate.
788 * aclocal.m4: Regenerate.
790 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
792 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
794 * crx-dis.c: Likewise.
796 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
798 Generally, handle CRISv32.
799 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
800 (struct cris_disasm_data): New type.
801 (format_reg, format_hex, cris_constraint, print_flags)
802 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
804 (format_sup_reg, print_insn_crisv32_with_register_prefix)
805 (print_insn_crisv32_without_register_prefix)
806 (print_insn_crisv10_v32_with_register_prefix)
807 (print_insn_crisv10_v32_without_register_prefix)
808 (cris_parse_disassembler_options): New functions.
809 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
810 parameter. All callers changed.
811 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
813 (cris_constraint) <case 'Y', 'U'>: New cases.
814 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
816 (print_with_operands) <case 'Y'>: New case.
817 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
818 <case 'N', 'Y', 'Q'>: New cases.
819 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
820 (print_insn_cris_with_register_prefix)
821 (print_insn_cris_without_register_prefix): Call
822 cris_parse_disassembler_options.
823 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
824 for CRISv32 and the size of immediate operands. New v32-only
825 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
826 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
827 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
828 Change brp to be v3..v10.
829 (cris_support_regs): New vector.
830 (cris_opcodes): Update head comment. New format characters '[',
831 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
832 Add new opcodes for v32 and adjust existing opcodes to accommodate
833 differences to earlier variants.
834 (cris_cond15s): New vector.
836 2004-11-04 Jan Beulich <jbeulich@novell.com>
838 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
840 (Mp): Use f_mode rather than none at all.
841 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
842 replaces what previously was x_mode; x_mode now means 128-bit SSE
844 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
845 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
846 pinsrw's second operand is Edqw.
847 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
848 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
849 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
850 mode when an operand size override is present or always suffixing.
851 More instructions will need to be added to this group.
852 (putop): Handle new macro chars 'C' (short/long suffix selector),
853 'I' (Intel mode override for following macro char), and 'J' (for
854 adding the 'l' prefix to far branches in AT&T mode). When an
855 alternative was specified in the template, honor macro character when
856 specified for Intel mode.
857 (OP_E): Handle new *_mode values. Correct pointer specifications for
858 memory operands. Consolidate output of index register.
859 (OP_G): Handle new *_mode values.
860 (OP_I): Handle const_1_mode.
861 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
862 respective opcode prefix bits have been consumed.
863 (OP_EM, OP_EX): Provide some default handling for generating pointer
866 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
868 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
871 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
873 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
874 (getregliststring): Support HI/LO and user registers.
875 * crx-opc.c (crx_instruction): Update data structure according to the
876 rearrangement done in CRX opcode header file.
877 (crx_regtab): Likewise.
878 (crx_optab): Likewise.
879 (crx_instruction): Reorder load/stor instructions, remove unsupported
881 support new Co-Processor instruction 'cpi'.
883 2004-10-27 Nick Clifton <nickc@redhat.com>
885 * opcodes/iq2000-asm.c: Regenerate.
886 * opcodes/iq2000-desc.c: Regenerate.
887 * opcodes/iq2000-desc.h: Regenerate.
888 * opcodes/iq2000-dis.c: Regenerate.
889 * opcodes/iq2000-ibld.c: Regenerate.
890 * opcodes/iq2000-opc.c: Regenerate.
891 * opcodes/iq2000-opc.h: Regenerate.
893 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
895 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
896 us4, us5 (respectively).
897 Remove unsupported 'popa' instruction.
898 Reverse operands order in store co-processor instructions.
900 2004-10-15 Alan Modra <amodra@bigpond.net.au>
902 * Makefile.am: Run "make dep-am"
903 * Makefile.in: Regenerate.
905 2004-10-12 Bob Wilson <bob.wilson@acm.org>
907 * xtensa-dis.c: Use ISO C90 formatting.
909 2004-10-09 Alan Modra <amodra@bigpond.net.au>
911 * ppc-opc.c: Revert 2004-09-09 change.
913 2004-10-07 Bob Wilson <bob.wilson@acm.org>
915 * xtensa-dis.c (state_names): Delete.
916 (fetch_data): Use xtensa_isa_maxlength.
917 (print_xtensa_operand): Replace operand parameter with opcode/operand
918 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
919 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
920 instruction bundles. Use xmalloc instead of malloc.
922 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
924 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
927 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
929 * crx-opc.c (crx_instruction): Support Co-processor insns.
930 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
931 (getregliststring): Change function to use the above enum.
932 (print_arg): Handle CO-Processor insns.
933 (crx_cinvs): Add 'b' option to invalidate the branch-target
936 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
938 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
939 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
940 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
941 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
942 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
944 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
946 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
949 2004-09-30 Paul Brook <paul@codesourcery.com>
951 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
952 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
954 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
956 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
957 (CONFIG_STATUS_DEPENDENCIES): New.
959 (config.status): Likewise.
960 * Makefile.in: Regenerated.
962 2004-09-17 Alan Modra <amodra@bigpond.net.au>
964 * Makefile.am: Run "make dep-am".
965 * Makefile.in: Regenerate.
966 * aclocal.m4: Regenerate.
967 * configure: Regenerate.
968 * po/POTFILES.in: Regenerate.
969 * po/opcodes.pot: Regenerate.
971 2004-09-11 Andreas Schwab <schwab@suse.de>
973 * configure: Rebuild.
975 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
977 * ppc-opc.c (L): Make this field not optional.
979 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
981 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
982 Fix parameter to 'm[t|f]csr' insns.
984 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
986 * configure.in: Autoupdate to autoconf 2.59.
987 * aclocal.m4: Rebuild with aclocal 1.4p6.
988 * configure: Rebuild with autoconf 2.59.
989 * Makefile.in: Rebuild with automake 1.4p6 (picking up
990 bfd changes for autoconf 2.59 on the way).
991 * config.in: Rebuild with autoheader 2.59.
993 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
995 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
997 2004-07-30 Michal Ludvig <mludvig@suse.cz>
999 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1000 (GRPPADLCK2): New define.
1001 (twobyte_has_modrm): True for 0xA6.
1002 (grps): GRPPADLCK2 for opcode 0xA6.
1004 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1006 Introduce SH2a support.
1007 * sh-opc.h (arch_sh2a_base): Renumber.
1008 (arch_sh2a_nofpu_base): Remove.
1009 (arch_sh_base_mask): Adjust.
1010 (arch_opann_mask): New.
1011 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1012 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1013 (sh_table): Adjust whitespace.
1014 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1015 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1016 instruction list throughout.
1017 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1018 of arch_sh2a in instruction list throughout.
1019 (arch_sh2e_up): Accomodate above changes.
1020 (arch_sh2_up): Ditto.
1021 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1022 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1023 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1024 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1025 * sh-opc.h (arch_sh2a_nofpu): New.
1026 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1027 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1029 2004-01-20 DJ Delorie <dj@redhat.com>
1030 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1031 2003-12-29 DJ Delorie <dj@redhat.com>
1032 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1033 sh_opcode_info, sh_table): Add sh2a support.
1034 (arch_op32): New, to tag 32-bit opcodes.
1035 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1036 2003-12-02 Michael Snyder <msnyder@redhat.com>
1037 * sh-opc.h (arch_sh2a): Add.
1038 * sh-dis.c (arch_sh2a): Handle.
1039 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1041 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1043 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1045 2004-07-22 Nick Clifton <nickc@redhat.com>
1048 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1049 insns - this is done by objdump itself.
1050 * h8500-dis.c (print_insn_h8500): Likewise.
1052 2004-07-21 Jan Beulich <jbeulich@novell.com>
1054 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1055 regardless of address size prefix in effect.
1056 (ptr_reg): Size or address registers does not depend on rex64, but
1057 on the presence of an address size override.
1058 (OP_MMX): Use rex.x only for xmm registers.
1059 (OP_EM): Use rex.z only for xmm registers.
1061 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1063 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1064 move/branch operations to the bottom so that VR5400 multimedia
1065 instructions take precedence in disassembly.
1067 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1069 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1070 ISA-specific "break" encoding.
1072 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1074 * arm-opc.h: Fix typo in comment.
1076 2004-07-11 Andreas Schwab <schwab@suse.de>
1078 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1080 2004-07-09 Andreas Schwab <schwab@suse.de>
1082 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1084 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1086 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1087 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1088 (crx-dis.lo): New target.
1089 (crx-opc.lo): Likewise.
1090 * Makefile.in: Regenerate.
1091 * configure.in: Handle bfd_crx_arch.
1092 * configure: Regenerate.
1093 * crx-dis.c: New file.
1094 * crx-opc.c: New file.
1095 * disassemble.c (ARCH_crx): Define.
1096 (disassembler): Handle ARCH_crx.
1098 2004-06-29 James E Wilson <wilson@specifixinc.com>
1100 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1101 * ia64-asmtab.c: Regnerate.
1103 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1105 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1106 (extract_fxm): Don't test dialect.
1107 (XFXFXM_MASK): Include the power4 bit.
1108 (XFXM): Add p4 param.
1109 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1111 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1113 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1114 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1116 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1118 * ppc-opc.c (BH, XLBH_MASK): Define.
1119 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1121 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1123 * i386-dis.c (x_mode): Comment.
1124 (two_source_ops): File scope.
1125 (float_mem): Correct fisttpll and fistpll.
1126 (float_mem_mode): New table.
1128 (OP_E): Correct intel mode PTR output.
1129 (ptr_reg): Use open_char and close_char.
1130 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1131 operands. Set two_source_ops.
1133 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1135 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1136 instead of _raw_size.
1138 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1140 * ia64-gen.c (in_iclass): Handle more postinc st
1142 * ia64-asmtab.c: Rebuilt.
1144 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1146 * s390-opc.txt: Correct architecture mask for some opcodes.
1147 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1148 in the esa mode as well.
1150 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1152 * sh-dis.c (target_arch): Make unsigned.
1153 (print_insn_sh): Replace (most of) switch with a call to
1154 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1155 * sh-opc.h: Redefine architecture flags values.
1156 Add sh3-nommu architecture.
1157 Reorganise <arch>_up macros so they make more visual sense.
1158 (SH_MERGE_ARCH_SET): Define new macro.
1159 (SH_VALID_BASE_ARCH_SET): Likewise.
1160 (SH_VALID_MMU_ARCH_SET): Likewise.
1161 (SH_VALID_CO_ARCH_SET): Likewise.
1162 (SH_VALID_ARCH_SET): Likewise.
1163 (SH_MERGE_ARCH_SET_VALID): Likewise.
1164 (SH_ARCH_SET_HAS_FPU): Likewise.
1165 (SH_ARCH_SET_HAS_DSP): Likewise.
1166 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1167 (sh_get_arch_from_bfd_mach): Add prototype.
1168 (sh_get_arch_up_from_bfd_mach): Likewise.
1169 (sh_get_bfd_mach_from_arch_set): Likewise.
1170 (sh_merge_bfd_arc): Likewise.
1172 2004-05-24 Peter Barada <peter@the-baradas.com>
1174 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1175 into new match_insn_m68k function. Loop over canidate
1176 matches and select first that completely matches.
1177 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1178 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1179 to verify addressing for MAC/EMAC.
1180 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1181 reigster halves since 'fpu' and 'spl' look misleading.
1182 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1183 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1184 first, tighten up match masks.
1185 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1186 'size' from special case code in print_insn_m68k to
1187 determine decode size of insns.
1189 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1191 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1192 well as when -mpower4.
1194 2004-05-13 Nick Clifton <nickc@redhat.com>
1196 * po/fr.po: Updated French translation.
1198 2004-05-05 Peter Barada <peter@the-baradas.com>
1200 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1201 variants in arch_mask. Only set m68881/68851 for 68k chips.
1202 * m68k-op.c: Switch from ColdFire chips to core variants.
1204 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1207 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1209 2004-04-29 Ben Elliston <bje@au.ibm.com>
1211 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1212 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1214 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1216 * sh-dis.c (print_insn_sh): Print the value in constant pool
1217 as a symbol if it looks like a symbol.
1219 2004-04-22 Peter Barada <peter@the-baradas.com>
1221 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1222 appropriate ColdFire architectures.
1223 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1225 Add EMAC instructions, fix MAC instructions. Remove
1226 macmw/macml/msacmw/msacml instructions since mask addressing now
1229 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1231 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1232 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1233 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1234 macro. Adjust all users.
1236 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1238 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1241 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1243 * m32r-asm.c: Regenerate.
1245 2004-03-29 Stan Shebs <shebs@apple.com>
1247 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1250 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1252 * aclocal.m4: Regenerate.
1253 * config.in: Regenerate.
1254 * configure: Regenerate.
1255 * po/POTFILES.in: Regenerate.
1256 * po/opcodes.pot: Regenerate.
1258 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1260 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1262 * ppc-opc.c (RA0): Define.
1263 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1264 (RAOPT): Rename from RAO. Update all uses.
1265 (powerpc_opcodes): Use RA0 as appropriate.
1267 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1269 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1271 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1273 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1275 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1277 * i386-dis.c (GRPPLOCK): Delete.
1278 (grps): Delete GRPPLOCK entry.
1280 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1282 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1284 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1285 (GRPPADLCK): Define.
1286 (dis386): Use NOP_Fixup on "nop".
1287 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1288 (twobyte_has_modrm): Set for 0xa7.
1289 (padlock_table): Delete. Move to..
1290 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1292 (print_insn): Revert PADLOCK_SPECIAL code.
1293 (OP_E): Delete sfence, lfence, mfence checks.
1295 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1297 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1298 (INVLPG_Fixup): New function.
1299 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1301 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1303 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1304 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1305 (padlock_table): New struct with PadLock instructions.
1306 (print_insn): Handle PADLOCK_SPECIAL.
1308 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1310 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1311 (OP_E): Twiddle clflush to sfence here.
1313 2004-03-08 Nick Clifton <nickc@redhat.com>
1315 * po/de.po: Updated German translation.
1317 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1319 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1320 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1321 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1324 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1326 * frv-asm.c: Regenerate.
1327 * frv-desc.c: Regenerate.
1328 * frv-desc.h: Regenerate.
1329 * frv-dis.c: Regenerate.
1330 * frv-ibld.c: Regenerate.
1331 * frv-opc.c: Regenerate.
1332 * frv-opc.h: Regenerate.
1334 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1336 * frv-desc.c, frv-opc.c: Regenerate.
1338 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1340 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1342 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1344 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1345 Also correct mistake in the comment.
1347 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1349 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1350 ensure that double registers have even numbers.
1351 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1352 that reserved instruction 0xfffd does not decode the same
1354 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1355 REG_N refers to a double register.
1356 Add REG_N_B01 nibble type and use it instead of REG_NM
1358 Adjust the bit patterns in a few comments.
1360 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1362 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1364 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1366 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1368 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1370 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1372 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1374 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1375 mtivor32, mtivor33, mtivor34.
1377 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1379 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1381 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1383 * arm-opc.h Maverick accumulator register opcode fixes.
1385 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1387 * m32r-dis.c: Regenerate.
1389 2004-01-27 Michael Snyder <msnyder@redhat.com>
1391 * sh-opc.h (sh_table): "fsrra", not "fssra".
1393 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1395 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1398 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1400 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1402 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1404 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1405 1. Don't print scale factor on AT&T mode when index missing.
1407 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1409 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1410 when loaded into XR registers.
1412 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1414 * frv-desc.h: Regenerate.
1415 * frv-desc.c: Regenerate.
1416 * frv-opc.c: Regenerate.
1418 2004-01-13 Michael Snyder <msnyder@redhat.com>
1420 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1422 2004-01-09 Paul Brook <paul@codesourcery.com>
1424 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1427 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1429 * Makefile.am (libopcodes_la_DEPENDENCIES)
1430 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1431 comment about the problem.
1432 * Makefile.in: Regenerate.
1434 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1436 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1437 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1438 cut&paste errors in shifting/truncating numerical operands.
1439 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1440 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1441 (parse_uslo16): Likewise.
1442 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1443 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1444 (parse_s12): Likewise.
1445 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1446 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1447 (parse_uslo16): Likewise.
1448 (parse_uhi16): Parse gothi and gotfuncdeschi.
1449 (parse_d12): Parse got12 and gotfuncdesc12.
1450 (parse_s12): Likewise.
1452 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1454 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1455 instruction which looks similar to an 'rla' instruction.
1457 For older changes see ChangeLog-0203
1463 version-control: never