opcodes/ChangeLog

   1 2008-11-14  Tristan Gingold  <gingold@adacore.com>
   2
   3         * makefile.vms (OBJS): Update list of objects.
   4         (DEFS): Update
   5         (CFLAGS): Update.
   6
   7 2008-11-06  Chao-ying Fu  <fu@mips.com>
   8
   9         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
  10         before sync.
  11         (sync): New instruction with 5-bit sync type.
  12         * mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.
  13
  14 2008-11-06  Nick Clifton  <nickc@redhat.com>
  15
  16         * avr-dis.c: Replace uses of sprintf without a format string with
  17         calls to strcpy.
  18
  19 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
  20
  21         * i386-opc.tbl: Add cmovpe and cmovpo.
  22         * i386-tbl.h: Regenerated.
  23
  24 2008-10-22  Nick Clifton  <nickc@redhat.com>
  25
  26         PR 6937
  27         * configure.in (SHARED_LIBADD): Revert previous change.
  28         Add a comment explaining why.
  29         (SHARED_DEPENDENCIES): Revert previous change.
  30         * configure: Regenerate.
  31
  32 2008-10-10  Nick Clifton  <nickc@redhat.com>
  33
  34         PR 6937
  35         * configure.in (SHARED_LIBADD): Add libiberty.a.
  36         (SHARED_DEPENDENCIES): Add libiberty.a.
  37
  38 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  39
  40         * i386-gen.c: Include "hashtab.h".
  41         (next_field): Take a new argument, last.  Check last.
  42         (process_i386_cpu_flag): Updated.
  43         (process_i386_opcode_modifier): Likewise.
  44         (process_i386_operand_type): Likewise.
  45         (process_i386_registers): Likewise.
  46         (output_i386_opcode): New.
  47         (opcode_hash_entry): Likewise.
  48         (opcode_hash_table): Likewise.
  49         (opcode_hash_hash): Likewise.
  50         (opcode_hash_eq): Likewise.
  51         (process_i386_opcodes): Use opcode hash table and opcode array.
  52
  53 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  54
  55         * s390-opc.txt (stdy, stey): Fix description
  56
  57 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
  58
  59         * Makefile.am: Run "make dep-am".
  60         * Makefile.in: Regenerate.
  61
  62 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
  63
  64         * aclocal.m4: Regenerated.
  65         * configure: Likewise.
  66         * Makefile.in: Likewise.
  67
  68 2008-09-29  Nick Clifton  <nickc@redhat.com>
  69
  70         * po/vi.po: Updated Vietnamese translation.
  71         * po/fr.po: Updated French translation.
  72
  73 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
  74
  75         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
  76         (cfxr, cfdr, cfer, clclu): Add esa flag.
  77         (sqd): Instruction added.
  78         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
  79         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
  80
  81 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
  82
  83         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
  84         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
  85
  86 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
  87
  88         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
  89         * i386-tbl.h: Regenerated.
  90
  91 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  92
  93         * i386-dis.c (dis386): Adjust far return mnemonics.
  94         * i386-opc.tbl: Add retf.
  95         * i386-tbl.h: Re-generate.
  96
  97 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  98
  99         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 100
 101 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 102
 103         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 104         * ia64-gen.c (lookup_specifier): Likewise.
 105
 106         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 107         * ia64-raw.tbl: Likewise.
 108         * ia64-waw.tbl: Likewise.
 109         * ia64-asmtab.c: Regenerated.
 110
 111 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 112
 113         * i386-opc.tbl: Correct fidivr operand size.
 114
 115         * i386-tbl.h: Regenerated.
 116
 117 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 118
 119         * configure.in: Update a number of obsolete autoconf macros.
 120         * aclocal.m4: Regenerate.
 121
 122 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 123
 124         AVX Programming Reference (August, 2008)
 125         * i386-dis.c (PREFIX_VEX_38DB): New.
 126         (PREFIX_VEX_38DC): Likewise.
 127         (PREFIX_VEX_38DD): Likewise.
 128         (PREFIX_VEX_38DE): Likewise.
 129         (PREFIX_VEX_38DF): Likewise.
 130         (PREFIX_VEX_3ADF): Likewise.
 131         (VEX_LEN_38DB_P_2): Likewise.
 132         (VEX_LEN_38DC_P_2): Likewise.
 133         (VEX_LEN_38DD_P_2): Likewise.
 134         (VEX_LEN_38DE_P_2): Likewise.
 135         (VEX_LEN_38DF_P_2): Likewise.
 136         (VEX_LEN_3ADF_P_2): Likewise.
 137         (PREFIX_VEX_3A04): Updated.
 138         (VEX_LEN_3A06_P_2): Likewise.
 139         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 140         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 141         (x86_64_table): Likewise.
 142         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 143         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 144         VEX_LEN_3ADF_P_2.
 145
 146         * i386-opc.tbl: Add AES + AVX instructions.
 147         * i386-init.h: Regenerated.
 148         * i386-tbl.h: Likewise.
 149
 150 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 151
 152         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 153         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 154
 155 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 156
 157         PR 6526
 158         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 159         * Makefile.in: Regenerate.
 160         * aclocal.m4: Regenerate.
 161         * config.in: Regenerate.
 162         * configure: Regenerate.
 163
 164 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 165
 166         PR 6825
 167         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 168
 169 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 170
 171         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 172
 173         * i386-tbl.h: Regenerated.
 174
 175 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 176
 177         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 178         * Makefile.in: Regenerate.
 179         * po/POTFILES.in: Regenerate.
 180
 181 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 182
 183         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 184         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 185         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 186         * ppc-opc.c (insert_xt6): New static function.
 187         (extract_xt6): Likewise.
 188         (insert_xa6): Likewise.
 189         (extract_xa6: Likewise.
 190         (insert_xb6): Likewise.
 191         (extract_xb6): Likewise.
 192         (insert_xb6s): Likewise.
 193         (extract_xb6s): Likewise.
 194         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 195         XX3DM_MASK, PPCVSX): New.
 196         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 197         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 198
 199 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 200
 201         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 202         * Makefile.in: Regenerate.
 203
 204 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 205
 206         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 207         * i386-tbl.h: Regenerated.
 208
 209 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 210
 211         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 212         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 213         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 214         (powerpc_opcodes): Add Xilinx APU related opcodes.
 215
 216 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 217
 218         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 219
 220 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 221
 222         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 223
 224 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 225
 226         * mips-opc.c (CP): New macro.
 227         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 228         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 229         dmtc2 Octeon instructions.
 230
 231 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 232
 233         * dis-init.c (init_disassemble_info): Init endian_code field.
 234         * arm-dis.c (print_insn): Disassemble code according to
 235         setting of endian_code.
 236         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 237
 238 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 239
 240         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 241         for ELF symbols.
 242
 243 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 244
 245         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 246         (print_ppc_disassembler_options): Likewise.
 247         * ppc-opc.c (PPC464): Define.
 248         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 249
 250 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 251
 252         * configure: Regenerate.
 253
 254 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 255
 256         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 257         ppc_cpu_t typedef.
 258         (struct dis_private): New.
 259         (POWERPC_DIALECT): New define.
 260         (powerpc_dialect): Renamed to...
 261         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 262         struct dis_private.
 263         (print_insn_big_powerpc): Update for using structure in
 264         info->private_data.
 265         (print_insn_little_powerpc): Likewise.
 266         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 267         (skip_optional_operands): Likewise.
 268         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 269         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 270         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 271         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 272         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 273         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 274         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 275         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 276         param to be of type ppc_cpu_t.  Update prototype.
 277
 278 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 279
 280         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 281         +s, +S.
 282         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 283         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 284         syncw, syncws, vm3mulu, vm0 and vmulu.
 285
 286         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 287         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 288         seqi, sne and snei.
 289
 290 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 291
 292         * i386-opc.tbl: Add vmovd with 64bit operand.
 293         * i386-tbl.h: Regenerated.
 294
 295 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 296
 297         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 298
 299 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 300
 301         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 302         * i386-tbl.h: Regenerated.
 303
 304 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 305
 306         PR gas/6517
 307         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 308         into 32bit and 64bit.  Remove Reg64|Qword and add
 309         IgnoreSize|No_qSuf on 32bit version.
 310         * i386-tbl.h: Regenerated.
 311
 312 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 313
 314         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 315         * i386-tbl.h: Regenerated.
 316
 317 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 318
 319         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 320
 321 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 322
 323         * Makefile.am: Run "make dep-am".
 324         * Makefile.in: Regenerate.
 325
 326 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 327
 328         * i386-dis.c (MOVBE_Fixup): New.
 329         (Mo): Likewise.
 330         (PREFIX_0F3880): Likewise.
 331         (PREFIX_0F3881): Likewise.
 332         (PREFIX_0F38F0): Updated.
 333         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 334         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 335         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 336
 337         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 338         CPU_EPT_FLAGS.
 339         (cpu_flags): Add CpuMovbe and CpuEPT.
 340
 341         * i386-opc.h (CpuMovbe): New.
 342         (CpuEPT): Likewise.
 343         (CpuLM): Updated.
 344         (i386_cpu_flags): Add cpumovbe and cpuept.
 345
 346         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 347         * i386-init.h: Regenerated.
 348         * i386-tbl.h: Likewise.
 349
 350 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 351
 352         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 353         the two drem and the two dremu macros.
 354
 355 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 356
 357         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 358         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 359         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 360         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 361
 362 2008-04-25  David S. Miller  <davem@davemloft.net>
 363
 364         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 365         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 366
 367 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 368
 369         * aclocal.m4: Regenerate.
 370         * configure: Regenerate.
 371
 372 2008-04-23  David S. Miller  <davem@davemloft.net>
 373
 374         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 375         extended values.
 376         (prefetch_table): Add missing values.
 377
 378 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 379
 380         * i386-gen.c (opcode_modifiers): Add NoAVX.
 381
 382         * i386-opc.h (NoAVX): New.
 383         (OldGcc): Updated.
 384         (i386_opcode_modifier): Add noavx.
 385
 386         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 387         instructions which don't have AVX equivalent.
 388         * i386-tbl.h: Regenerated.
 389
 390 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 391
 392         * i386-dis.c (OP_VEX_FMA): New.
 393         (OP_EX_VexImmW): Likewise.
 394         (VexFMA): Likewise.
 395         (Vex128FMA): Likewise.
 396         (EXVexImmW): Likewise.
 397         (get_vex_imm8): Likewise.
 398         (OP_EX_VexReg): Likewise.
 399         (vex_i4_done): Renamed to ...
 400         (vex_w_done): This.
 401         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 402         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 403         FMA instructions.
 404         (print_insn): Updated.
 405         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 406         (OP_REG_VexI4): Check invalid high registers.
 407
 408 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 409             Michael Meissner  <michael.meissner@amd.com>
 410
 411         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 412         * i386-tbl.h: Regenerate from i386-opc.tbl.
 413
 414 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 415
 416         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 417         accept Power E500MC instructions.
 418         (print_ppc_disassembler_options): Document -Me500mc.
 419         * ppc-opc.c (DUIS, DUI, T): New.
 420         (XRT, XRTRA): Likewise.
 421         (E500MC): Likewise.
 422         (powerpc_opcodes): Add new Power E500MC instructions.
 423
 424 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 425
 426         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 427         (print_s390_disassembler_options): New function.
 428         * disassemble.c (disassembler_usage): Invoke
 429         print_s390_disassembler_options.
 430
 431 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 432
 433         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 434         of local variables used for mnemonic parsing: prefix, suffix and
 435         number.
 436
 437 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 438
 439         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 440         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 441         (s390_crb_extensions): New extensions table.
 442         (insertExpandedMnemonic): Handle '$' tag.
 443         * s390-opc.txt: Remove conditional jump variants which can now
 444         be expanded automatically.
 445         Replace '*' tag with '$' in the compare and branch instructions.
 446
 447 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 448
 449         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 450         (PREFIX_VEX_3AXX): Likewis.
 451
 452 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 453
 454         * i386-opc.tbl: Remove 4 extra blank lines.
 455
 456 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 457
 458         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 459         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 460         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 461         * i386-opc.tbl: Likewise.
 462
 463         * i386-opc.h (CpuCLMUL): Renamed to ...
 464         (CpuPCLMUL): This.
 465         (CpuFMA): Updated.
 466         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 467
 468         * i386-init.h: Regenerated.
 469
 470 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 471
 472         * i386-dis.c (OP_E_register): New.
 473         (OP_E_memory): Likewise.
 474         (OP_VEX): Likewise.
 475         (OP_EX_Vex): Likewise.
 476         (OP_EX_VexW): Likewise.
 477         (OP_XMM_Vex): Likewise.
 478         (OP_XMM_VexW): Likewise.
 479         (OP_REG_VexI4): Likewise.
 480         (PCLMUL_Fixup): Likewise.
 481         (VEXI4_Fixup): Likewise.
 482         (VZERO_Fixup): Likewise.
 483         (VCMP_Fixup): Likewise.
 484         (VPERMIL2_Fixup): Likewise.
 485         (rex_original): Likewise.
 486         (rex_ignored): Likewise.
 487         (Mxmm): Likewise.
 488         (XMM): Likewise.
 489         (EXxmm): Likewise.
 490         (EXxmmq): Likewise.
 491         (EXymmq): Likewise.
 492         (Vex): Likewise.
 493         (Vex128): Likewise.
 494         (Vex256): Likewise.
 495         (VexI4): Likewise.
 496         (EXdVex): Likewise.
 497         (EXqVex): Likewise.
 498         (EXVexW): Likewise.
 499         (EXdVexW): Likewise.
 500         (EXqVexW): Likewise.
 501         (XMVex): Likewise.
 502         (XMVexW): Likewise.
 503         (XMVexI4): Likewise.
 504         (PCLMUL): Likewise.
 505         (VZERO): Likewise.
 506         (VCMP): Likewise.
 507         (VPERMIL2): Likewise.
 508         (xmm_mode): Likewise.
 509         (xmmq_mode): Likewise.
 510         (ymmq_mode): Likewise.
 511         (vex_mode): Likewise.
 512         (vex128_mode): Likewise.
 513         (vex256_mode): Likewise.
 514         (USE_VEX_C4_TABLE): Likewise.
 515         (USE_VEX_C5_TABLE): Likewise.
 516         (USE_VEX_LEN_TABLE): Likewise.
 517         (VEX_C4_TABLE): Likewise.
 518         (VEX_C5_TABLE): Likewise.
 519         (VEX_LEN_TABLE): Likewise.
 520         (REG_VEX_XX): Likewise.
 521         (MOD_VEX_XXX): Likewise.
 522         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 523         (PREFIX_0F3A44): Likewise.
 524         (PREFIX_0F3ADF): Likewise.
 525         (PREFIX_VEX_XXX): Likewise.
 526         (VEX_OF): Likewise.
 527         (VEX_OF38): Likewise.
 528         (VEX_OF3A): Likewise.
 529         (VEX_LEN_XXX): Likewise.
 530         (vex): Likewise.
 531         (need_vex): Likewise.
 532         (need_vex_reg): Likewise.
 533         (vex_i4_done): Likewise.
 534         (vex_table): Likewise.
 535         (vex_len_table): Likewise.
 536         (OP_REG_VexI4): Likewise.
 537         (vex_cmp_op): Likewise.
 538         (pclmul_op): Likewise.
 539         (vpermil2_op): Likewise.
 540         (m_mode): Updated.
 541         (es_reg): Likewise.
 542         (PREFIX_0F38F0): Likewise.
 543         (PREFIX_0F3A60): Likewise.
 544         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 545         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 546         and PREFIX_VEX_XXX entries.
 547         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 548         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 549         PREFIX_0F3ADF.
 550         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 551         Add MOD_VEX_XXX entries.
 552         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 553         REX byte in rex_original.
 554         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 555         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 556         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 557         calling get_valid_dis386.  Use rex_original and rex_ignored when
 558         printing out REX.
 559         (putop): Handle "XY".
 560         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 561         ymmq_mode.
 562         (OP_E_extended): Updated to use OP_E_register and
 563         OP_E_memory.
 564         (OP_XMM): Handle VEX.
 565         (OP_EX): Likewise.
 566         (XMM_Fixup): Likewise.
 567         (CMP_Fixup): Use ARRAY_SIZE.
 568
 569         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 570         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 571         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 572         OPERAND_TYPE_VEX_IMM4.
 573         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 574         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 575         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 576         VexImmExt and SSE2AVX.
 577         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 578
 579         * i386-opc.h (CpuAVX): New.
 580         (CpuAES): Likewise.
 581         (CpuCLMUL): Likewise.
 582         (CpuFMA): Likewise.
 583         (Vex): Likewise.
 584         (Vex256): Likewise.
 585         (VexNDS): Likewise.
 586         (VexNDD): Likewise.
 587         (VexW0): Likewise.
 588         (VexW1): Likewise.
 589         (Vex0F): Likewise.
 590         (Vex0F38): Likewise.
 591         (Vex0F3A): Likewise.
 592         (Vex3Sources): Likewise.
 593         (VexImmExt): Likewise.
 594         (SSE2AVX): Likewise.
 595         (RegYMM): Likewise.
 596         (Ymmword): Likewise.
 597         (Vex_Imm4): Likewise.
 598         (Implicit1stXmm0): Likewise.
 599         (CpuXsave): Updated.
 600         (CpuLM): Likewise.
 601         (ByteOkIntel): Likewise.
 602         (OldGcc): Likewise.
 603         (Control): Likewise.
 604         (Unspecified): Likewise.
 605         (OTMax): Likewise.
 606         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 607         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 608         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 609         vex3sources, veximmext and sse2avx.
 610         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 611
 612         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 613
 614         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 615
 616         * i386-init.h: Regenerated.
 617         * i386-tbl.h: Likewise.
 618
 619 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 620
 621         From  Robin Getz  <robin.getz@analog.com>
 622         * bfin-dis.c (bu32): Typedef.
 623         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 624         (constant_formats[]): Add uimm32 and huimm16.
 625         (fmtconst_val): New.
 626         (uimm32): Define.
 627         (huimm32): Define.
 628         (imm16_val): Define.
 629         (luimm16_val): Define.
 630         (struct saved_state): Define.
 631         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 632         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 633         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 634         (get_allreg): New.
 635         (decode_LDIMMhalf_0): Print out the whole register value.
 636
 637         From Jie Zhang  <jie.zhang@analog.com>
 638         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 639         multiply and multiply-accumulate to data register instruction.
 640
 641         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 642         c_imm32, c_huimm32e): Define.
 643         (constant_formats): Add flags for printing decimal, leading spaces, and
 644         exact symbols.
 645         (comment, parallel): Add global flags in all disassembly.
 646         (fmtconst): Take advantage of new flags, and print default in hex.
 647         (fmtconst_val): Likewise.
 648         (decode_macfunc): Be consistant with spaces, tabs, comments,
 649         capitalization in disassembly, fix minor coding style issues.
 650         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 651         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 652         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 653         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 654         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 655         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 656         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 657         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 658         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 659         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 660         _print_insn_bfin, print_insn_bfin): Likewise.
 661
 662 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 663
 664         * aclocal.m4: Regenerate.
 665         * configure: Likewise.
 666         * Makefile.in: Likewise.
 667
 668 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 669
 670         * Makefile.am: Run "make dep-am".
 671         * Makefile.in: Regenerate.
 672         * configure: Regenerate.
 673
 674 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 675
 676         * ppc-opc.c (powerpc_opcodes): Order and format.
 677
 678 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 679
 680         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 681         * i386-tbl.h: Regenerated.
 682
 683 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 684
 685         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 686         x86-64.
 687         * i386-tbl.h: Regenerated.
 688
 689 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 690
 691         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 692         and Fword for far indirect jmp. Allow Reg16 and Word for near
 693         indirect jmp on x86-64. Disallow Fword for lcall.
 694         * i386-tbl.h: Re-generate.
 695
 696 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 697
 698         * cr16-opc.c  (cr16_num_optab): Defined
 699
 700 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 701
 702         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 703         * i386-init.h: Regenerated.
 704
 705 2008-02-14  Nick Clifton  <nickc@redhat.com>
 706
 707         PR binutils/5524
 708         * configure.in (SHARED_LIBADD): Select the correct host specific
 709         file extension for shared libraries.
 710         * configure: Regenerate.
 711
 712 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 713
 714         * i386-opc.h (RegFlat): New.
 715         * i386-reg.tbl (flat): Add.
 716         * i386-tbl.h: Re-generate.
 717
 718 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 719
 720         * i386-dis.c (a_mode): New.
 721         (cond_jump_mode): Adjust.
 722         (Ma): Change to a_mode.
 723         (intel_operand_size): Handle a_mode.
 724         * i386-opc.tbl: Allow Dword and Qword for bound.
 725         * i386-tbl.h: Re-generate.
 726
 727 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 728
 729         * i386-gen.c (process_i386_registers): Process new fields.
 730         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 731         unsigned char. Add dw2_regnum and Dw2Inval.
 732         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 733         register names.
 734         * i386-tbl.h: Re-generate.
 735
 736 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 737
 738         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 739         * i386-init.h: Updated.
 740
 741 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * i386-gen.c (cpu_flags): Add CpuXsave.
 744
 745         * i386-opc.h (CpuXsave): New.
 746         (CpuLM): Updated.
 747         (i386_cpu_flags): Add cpuxsave.
 748
 749         * i386-dis.c (MOD_0FAE_REG_4): New.
 750         (RM_0F01_REG_2): Likewise.
 751         (MOD_0FAE_REG_5): Updated.
 752         (RM_0F01_REG_3): Likewise.
 753         (reg_table): Use MOD_0FAE_REG_4.
 754         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 755         for xrstor.
 756         (rm_table): Add RM_0F01_REG_2.
 757
 758         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 759         * i386-init.h: Regenerated.
 760         * i386-tbl.h: Likewise.
 761
 762 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 763
 764         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 765         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 766         * i386-tbl.h: Re-generate.
 767
 768 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 769
 770         PR 5715
 771         * configure: Regenerated.
 772
 773 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 774
 775         * mips-dis.c: Update copyright.
 776         (mips_arch_choices): Add Octeon.
 777         * mips-opc.c: Update copyright.
 778         (IOCT): New macro.
 779         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 780
 781 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 782
 783         * ppc-opc.c: Support optional L form mtmsr.
 784
 785 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 788
 789 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 790
 791         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 792         * i386-init.h: Regenerated.
 793
 794 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 795
 796         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 797         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 798
 799 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 800
 801         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 802         (cpu_flags): Likewise.
 803
 804         * i386-opc.h (CpuMMX2): Removed.
 805         (CpuSSE): Updated.
 806
 807         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 808         * i386-init.h: Regenerated.
 809         * i386-tbl.h: Likewise.
 810
 811 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 812
 813         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 814         CPU_SMX_FLAGS.
 815         * i386-init.h: Regenerated.
 816
 817 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 818
 819         * i386-opc.tbl: Use Qword on movddup.
 820         * i386-tbl.h: Regenerated.
 821
 822 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 823
 824         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 825         * i386-tbl.h: Regenerated.
 826
 827 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 828
 829         * i386-dis.c (Mx): New.
 830         (PREFIX_0FC3): Likewise.
 831         (PREFIX_0FC7_REG_6): Updated.
 832         (dis386_twobyte): Use PREFIX_0FC3.
 833         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 834         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 835         movntss.
 836
 837 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 838
 839         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 840         (operand_types): Add Mem.
 841
 842         * i386-opc.h (IntelSyntax): New.
 843         * i386-opc.h (Mem): New.
 844         (Byte): Updated.
 845         (Opcode_Modifier_Max): Updated.
 846         (i386_opcode_modifier): Add intelsyntax.
 847         (i386_operand_type): Add mem.
 848
 849         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 850         instructions.
 851
 852         * i386-reg.tbl: Add size for accumulator.
 853
 854         * i386-init.h: Regenerated.
 855         * i386-tbl.h: Likewise.
 856
 857 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 858
 859         * i386-opc.h (Byte): Fix a typo.
 860
 861 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         PR gas/5534
 864         * i386-gen.c (operand_type_init): Add Dword to
 865         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 866         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 867         Qword and Xmmword.
 868         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 869         Xmmword, Unspecified and Anysize.
 870         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 871         an alias of Xmmword.
 872
 873         * i386-opc.h (CheckSize): Removed.
 874         (Byte): Updated.
 875         (Word): Likewise.
 876         (Dword): Likewise.
 877         (Qword): Likewise.
 878         (Xmmword): Likewise.
 879         (FWait): Updated.
 880         (OTMax): Likewise.
 881         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 882         qword and xmmword.
 883         (Fword): New.
 884         (TBYTE): Likewise.
 885         (Unspecified): Likewise.
 886         (Anysize): Likewise.
 887         (i386_operand_type): Add byte, word, dword, fword, qword,
 888         tbyte xmmword, unspecified and anysize.
 889
 890         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 891         Tbyte, Xmmword, Unspecified and Anysize.
 892
 893         * i386-reg.tbl: Add size for accumulator.
 894
 895         * i386-init.h: Regenerated.
 896         * i386-tbl.h: Likewise.
 897
 898 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 899
 900         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 901         (REG_0F18): Updated.
 902         (reg_table): Updated.
 903         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 904         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 905
 906 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 907
 908         * i386-gen.c (set_bitfield): Use fail () on error.
 909
 910 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 911
 912         * i386-gen.c (lineno): New.
 913         (filename): Likewise.
 914         (set_bitfield): Report filename and line numer on error.
 915         (process_i386_opcodes): Set filename and update lineno.
 916         (process_i386_registers): Likewise.
 917
 918 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 919
 920         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 921         ATTSyntax.
 922
 923         * i386-opc.h (IntelMnemonic): Renamed to ..
 924         (ATTSyntax): This
 925         (Opcode_Modifier_Max): Updated.
 926         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 927         and intelsyntax.
 928
 929         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 930         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 931         * i386-tbl.h: Regenerated.
 932
 933 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 934
 935         * i386-gen.c: Update copyright to 2008.
 936         * i386-opc.h: Likewise.
 937         * i386-opc.tbl: Likewise.
 938
 939         * i386-init.h: Regenerated.
 940         * i386-tbl.h: Likewise.
 941
 942 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 943
 944         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 945         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 946         * i386-tbl.h: Regenerated.
 947
 948 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 949
 950         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 951         CpuSSE4_2_Or_ABM.
 952         (cpu_flags): Likewise.
 953
 954         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 955         (CpuSSE4_2_Or_ABM): Likewise.
 956         (CpuLM): Updated.
 957         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 958
 959         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 960         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 961         and CpuPadLock, respectively.
 962         * i386-init.h: Regenerated.
 963         * i386-tbl.h: Likewise.
 964
 965 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 966
 967         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 968
 969         * i386-opc.h (No_xSuf): Removed.
 970         (CheckSize): Updated.
 971
 972         * i386-tbl.h: Regenerated.
 973
 974 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 975
 976         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 977         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 978         CPU_SSE5_FLAGS.
 979         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 980
 981         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 982         (CpuLM): Updated.
 983         (i386_cpu_flags): Add cpusse4_2_or_abm.
 984
 985         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 986         CpuABM|CpuSSE4_2 on popcnt.
 987         * i386-init.h: Regenerated.
 988         * i386-tbl.h: Likewise.
 989
 990 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 991
 992         * i386-opc.h: Update comments.
 993
 994 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 995
 996         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 997         * i386-opc.h: Likewise.
 998         * i386-opc.tbl: Likewise.
 999
1000 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1001
1002         PR gas/5534
1003         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1004         Byte, Word, Dword, QWord and Xmmword.
1005
1006         * i386-opc.h (No_xSuf): New.
1007         (CheckSize): Likewise.
1008         (Byte): Likewise.
1009         (Word): Likewise.
1010         (Dword): Likewise.
1011         (QWord): Likewise.
1012         (Xmmword): Likewise.
1013         (FWait): Updated.
1014         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1015         Dword, QWord and Xmmword.
1016
1017         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1018         used.
1019         * i386-tbl.h: Regenerated.
1020
1021 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1022
1023         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1024         From Miod Vallat.
1025
1026 For older changes see ChangeLog-2007
1027 \f
1028 Local Variables:
1029 mode: change-log
1030 left-margin: 8
1031 fill-column: 74
1032 version-control: never
1033 End: