opcodes/ChangeLog

   1 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         PR binutils/11960
   4         * i386-dis.c (sIv): New.
   5         (dis386): Replace Iq with sIv on "pushT".
   6         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
   7         (x86_64_table): Replace {T|}/{P|} with P.
   8         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
   9         (OP_sI): Update v_mode.  Remove w_mode.
  10
  11 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  12
  13         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  14         on E500 and E500MC.
  15
  16 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  17
  18         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  19         prefetchw.
  20
  21 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  22
  23         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  24         to processor flags for PENTIUMPRO processors and later.
  25         * i386-opc.h (enum): Add CpuNop.
  26         (i386_cpu_flags): Add cpunop bit.
  27         * i386-opc.tbl: Change nop cpu_flags.
  28         * i386-init.h: Regenerated.
  29         * i386-tbl.h: Likewise.
  30
  31 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  32
  33         * i386-opc.h (enum): Fix typos in comments.
  34
  35 2010-08-06  Alan Modra  <amodra@gmail.com>
  36
  37         * disassemble.c: Formatting.
  38         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  39
  40 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  41
  42         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  43         * i386-tbl.h: Regenerated.
  44
  45 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  46
  47         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  48
  49         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  50         * i386-tbl.h: Regenerated.
  51
  52 2010-07-29  DJ Delorie  <dj@redhat.com>
  53
  54         * rx-decode.opc (SRR): New.
  55         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  56         r0,r0) and NOP3 (max r0,r0) special cases.
  57         * rx-decode.c: Regenerate.
  58
  59 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  60
  61         * i386-dis.c: Add 0F to VEX opcode enums.
  62
  63 2010-07-27  DJ Delorie  <dj@redhat.com>
  64
  65         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  66         (rx_decode_opcode): Likewise.
  67         * rx-decode.c: Regenerate.
  68
  69 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  70             Ina Pandit  <ina.pandit@kpitcummins.com>
  71
  72         * v850-dis.c (v850_sreg_names): Updated structure for system
  73         registers.
  74         (float_cc_names): new structure for condition codes.
  75         (print_value): Update the function that prints value.
  76         (get_operand_value): New function to get the operand value.
  77         (disassemble): Updated to handle the disassembly of instructions.
  78         (print_insn_v850): Updated function to print instruction for different
  79         families.
  80         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  81         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  82         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  83         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  84         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  85         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  86         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  87         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  88         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  89         (v850_operands): Update with the relocation name. Also update
  90         the instructions with specific set of processors.
  91
  92 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  93
  94         * arm-dis.c (print_insn_arm): Add cases for printing more
  95         symbolic operands.
  96         (print_insn_thumb32): Likewise.
  97
  98 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  99
 100         * mips-dis.c (print_insn_mips): Correct branch instruction type
 101         determination.
 102
 103 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 104
 105         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 106         type and delay slot determination.
 107         (print_insn_mips16): Extend branch instruction type and delay
 108         slot determination to cover all instructions.
 109         * mips16-opc.c (BR): Remove macro.
 110         (UBR, CBR): New macros.
 111         (mips16_opcodes): Update branch annotation for "b", "beqz",
 112         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 113         and "jrc".
 114
 115 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 116
 117         AVX Programming Reference (June, 2010)
 118         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 119         * i386-opc.tbl: Likewise.
 120         * i386-tbl.h: Regenerated.
 121
 122 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 123
 124         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 125
 126 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 127
 128         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 129         ppc_cpu_t before inverting.
 130         (ppc_parse_cpu): Likewise.
 131         (print_insn_powerpc): Likewise.
 132
 133 2010-07-03  Alan Modra  <amodra@gmail.com>
 134
 135         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 136         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 137         (PPC64, MFDEC2): Update.
 138         (NON32, NO371): Define.
 139         (powerpc_opcode): Update to not use old opcode flags, and avoid
 140         -m601 duplicates.
 141
 142 2010-07-03  DJ Delorie  <dj@delorie.com>
 143
 144         * m32c-ibld.c: Regenerate.
 145
 146 2010-07-03  Alan Modra  <amodra@gmail.com>
 147
 148         * ppc-opc.c (PWR2COM): Define.
 149         (PPCPWR2): Add PPC_OPCODE_COMMON.
 150         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 151         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 152         "rac" from -mcom.
 153
 154 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 155
 156         AVX Programming Reference (June, 2010)
 157         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 158         (PREFIX_0FAE_REG_1): Likewise.
 159         (PREFIX_0FAE_REG_2): Likewise.
 160         (PREFIX_0FAE_REG_3): Likewise.
 161         (PREFIX_VEX_3813): Likewise.
 162         (PREFIX_VEX_3A1D): Likewise.
 163         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 164         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 165         PREFIX_VEX_3A1D.
 166         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 167         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 168         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 169
 170         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 171         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 172         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 173
 174         * i386-opc.h (CpuXsaveopt): New.
 175         (CpuFSGSBase): Likewise.
 176         (CpuRdRnd): Likewise.
 177         (CpuF16C): Likewise.
 178         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 179         cpuf16c.
 180
 181         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 182         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 183         * i386-init.h: Regenerated.
 184         * i386-tbl.h: Likewise.
 185
 186 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 187
 188         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 189         and mtocrf on EFS.
 190
 191 2010-06-29  Alan Modra  <amodra@gmail.com>
 192
 193         * maxq-dis.c: Delete file.
 194         * Makefile.am: Remove references to maxq.
 195         * configure.in: Likewise.
 196         * disassemble.c: Likewise.
 197         * Makefile.in: Regenerate.
 198         * configure: Regenerate.
 199         * po/POTFILES.in: Regenerate.
 200
 201 2010-06-29  Alan Modra  <amodra@gmail.com>
 202
 203         * mep-dis.c: Regenerate.
 204
 205 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 206
 207         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 208
 209 2010-06-27  Alan Modra  <amodra@gmail.com>
 210
 211         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 212         (decodeInstr): Likewise.
 213         * dlx-dis.c (print_insn_dlx): Likewise.
 214         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 215         * maxq-dis.c (check_move, print_insn): Likewise.
 216         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 217         * msp430-dis.c (msp430_branchinstr): Likewise.
 218         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 219         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 220         * sparc-dis.c (print_insn_sparc): Likewise.
 221         * fr30-asm.c: Regenerate.
 222         * frv-asm.c: Regenerate.
 223         * ip2k-asm.c: Regenerate.
 224         * iq2000-asm.c: Regenerate.
 225         * lm32-asm.c: Regenerate.
 226         * m32c-asm.c: Regenerate.
 227         * m32r-asm.c: Regenerate.
 228         * mep-asm.c: Regenerate.
 229         * mt-asm.c: Regenerate.
 230         * openrisc-asm.c: Regenerate.
 231         * xc16x-asm.c: Regenerate.
 232         * xstormy16-asm.c: Regenerate.
 233
 234 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 235
 236         PR gas/11673
 237         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 238
 239 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 240
 241         PR binutils/11676
 242         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 243
 244 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 245
 246         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 247         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 248         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 249         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 250         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 251         Treat lwsync as msync on e500.
 252
 253 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 254
 255         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 256
 257 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 258
 259         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 260         constants is the same on 32-bit and 64-bit hosts.
 261
 262 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 263
 264         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 265         .short directives so that they can be reassembled.
 266
 267 2010-05-26  Catherine Moore <clm@codesourcery.com>
 268             David Ung  <davidu@mips.com>
 269
 270         * mips-opc.c: Change membership to I1 for instructions ssnop and
 271         ehb.
 272
 273 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 274
 275         * i386-dis.c (sib): New.
 276         (get_sib): Likewise.
 277         (print_insn): Call get_sib.
 278         OP_E_memory): Use sib.
 279
 280 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 281
 282         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 283         * mips-opc.c (I16): Remove.
 284         (mips_builtin_op): Reclassify jalx.
 285
 286 2010-05-19  Alan Modra  <amodra@gmail.com>
 287
 288         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 289         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 290
 291 2010-05-13  Alan Modra  <amodra@gmail.com>
 292
 293         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 294
 295 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 296
 297         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 298         format.
 299         (print_insn_thumb16): Add support for new %W format.
 300
 301 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 302
 303         * Makefile.in: Regenerate with automake 1.11.1.
 304         * aclocal.m4: Ditto.
 305
 306 2010-05-05  Nick Clifton  <nickc@redhat.com>
 307
 308         * po/es.po: Updated Spanish translation.
 309
 310 2010-04-22  Nick Clifton  <nickc@redhat.com>
 311
 312         * po/opcodes.pot: Updated by the Translation project.
 313         * po/vi.po: Updated Vietnamese translation.
 314
 315 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 316
 317         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 318         bits in opcode.
 319
 320 2010-04-09  Nick Clifton  <nickc@redhat.com>
 321
 322         * i386-dis.c (print_insn): Remove unused variable op.
 323         (OP_sI): Remove unused variable mask.
 324
 325 2010-04-07  Alan Modra  <amodra@gmail.com>
 326
 327         * configure: Regenerate.
 328
 329 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 330
 331         * ppc-opc.c (RBOPT): New define.
 332         ("dccci"): Enable for PPCA2.  Make operands optional.
 333         ("iccci"): Likewise.  Do not deprecate for PPC476.
 334
 335 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 336
 337         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 338
 339 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 340
 341         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 342         * Makefile.in: Regenerate.
 343         * configure.in (bfd_tic6x_arch): New.
 344         * configure: Regenerate.
 345         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 346         (disassembler): Handle TI C6X.
 347         * tic6x-dis.c: New.
 348
 349 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 350
 351         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 352
 353 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 354
 355         * dis-buf.c (buffer_read_memory): Give error for reading just
 356         before the start of memory.
 357
 358 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 359             Quentin Neill <quentin.neill@amd.com>
 360
 361         * i386-dis.c (OP_LWP_I): Removed.
 362         (reg_table): Do not use OP_LWP_I, use Iq.
 363         (OP_LWPCB_E): Remove use of names16.
 364         (OP_LWP_E): Same.
 365         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 366         should not set the Vex.length bit.
 367         * i386-tbl.h: Regenerated.
 368
 369 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 370
 371         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 372
 373 2010-02-24  Nick Clifton  <nickc@redhat.com>
 374
 375         PR binutils/6773
 376         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 377         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 378         (thumb32_opcodes): Likewise.
 379
 380 2010-02-15  Nick Clifton  <nickc@redhat.com>
 381
 382         * po/vi.po: Updated Vietnamese translation.
 383
 384 2010-02-12  Doug Evans  <dje@sebabeach.org>
 385
 386         * lm32-opinst.c: Regenerate.
 387
 388 2010-02-11  Doug Evans  <dje@sebabeach.org>
 389
 390         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 391         (print_address): Delete CGEN_PRINT_ADDRESS.
 392         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 393         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 394         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 395         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 396
 397         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 398         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 399         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 400         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 401         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 402         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 403         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 404         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 405         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 406         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 407         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 408         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 409
 410 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 411
 412         * i386-dis.c: Update copyright.
 413         * i386-gen.c: Likewise.
 414         * i386-opc.h: Likewise.
 415         * i386-opc.tbl: Likewise.
 416
 417 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 418             Sebastian Pop  <sebastian.pop@amd.com>
 419
 420         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 421         function to handle 5th imm8 operand.
 422         (PREFIX_VEX_3A48): Added.
 423         (PREFIX_VEX_3A49): Added.
 424         (VEX_W_3A48_P_2): Added.
 425         (VEX_W_3A49_P_2): Added.
 426         (prefix table): Added entries for PREFIX_VEX_3A48
 427         and PREFIX_VEX_3A49.
 428         (vex table): Added entries for VEX_W_3A48_P_2 and
 429         and VEX_W_3A49_P_2.
 430         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 431         for Vec_Imm4 operands.
 432         * i386-opc.h (enum): Added Vec_Imm4.
 433         (i386_operand_type): Added vec_imm4.
 434         * i386-opc.tbl: Add entries for vpermilp[ds].
 435         * i386-init.h: Regenerated.
 436         * i386-tbl.h: Regenerated.
 437
 438 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 439
 440         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 441         and "pwr7".  Move "a2" into alphabetical order.
 442
 443 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 444
 445         * ppc-dis.c (ppc_opts): Add titan entry.
 446         * ppc-opc.c (TITAN, MULHW): Define.
 447         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 448
 449 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 450
 451         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 452         to CPU_BDVER1_FLAGS
 453         * i386-init.h: Regenerated.
 454
 455 2010-02-03  Anthony Green  <green@moxielogic.com>
 456
 457         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 458         0x0f, and make 0x00 an illegal instruction.
 459
 460 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 461
 462         * opcodes/arm-dis.c (struct arm_private_data): New.
 463         (print_insn_coprocessor, print_insn_arm): Update to use struct
 464         arm_private_data.
 465         (is_mapping_symbol, get_map_sym_type): New functions.
 466         (get_sym_code_type): Check the symbol's section.  Do not check
 467         mapping symbols.
 468         (print_insn): Default to disassembling ARM mode code.  Check
 469         for mapping symbols separately from other symbols.  Use
 470         struct arm_private_data.
 471
 472 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 473
 474         * i386-dis.c (EXVexWdqScalar): New.
 475         (vex_scalar_w_dq_mode): Likewise.
 476         (prefix_table): Update entries for PREFIX_VEX_3899,
 477         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 478         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 479         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 480         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 481         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 482         (OP_EX): Likewise.
 483
 484 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 485
 486         * i386-dis.c (XMScalar): New.
 487         (EXdScalar): Likewise.
 488         (EXqScalar): Likewise.
 489         (EXqScalarS): Likewise.
 490         (VexScalar): Likewise.
 491         (EXdVexScalarS): Likewise.
 492         (EXqVexScalarS): Likewise.
 493         (XMVexScalar): Likewise.
 494         (scalar_mode): Likewise.
 495         (d_scalar_mode): Likewise.
 496         (d_scalar_swap_mode): Likewise.
 497         (q_scalar_mode): Likewise.
 498         (q_scalar_swap_mode): Likewise.
 499         (vex_scalar_mode): Likewise.
 500         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 501         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 502         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 503         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 504         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 505         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 506         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 507         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 508         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 509         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 510         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 511         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 512         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 513         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 514         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 515         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 516         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 517         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 518         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 519         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 520         q_scalar_mode, q_scalar_swap_mode.
 521         (OP_XMM): Handle scalar_mode.
 522         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 523         and q_scalar_swap_mode.
 524         (OP_VEX): Handle vex_scalar_mode.
 525
 526 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 527
 528         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 529
 530 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 531
 532         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 533
 534 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 535
 536         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 537
 538 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 539
 540         * i386-dis.c (Bad_Opcode): New.
 541         (bad_opcode): Likewise.
 542         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 543         (dis386_twobyte): Likewise.
 544         (reg_table): Likewise.
 545         (prefix_table): Likewise.
 546         (x86_64_table): Likewise.
 547         (vex_len_table): Likewise.
 548         (vex_w_table): Likewise.
 549         (mod_table): Likewise.
 550         (rm_table): Likewise.
 551         (float_reg): Likewise.
 552         (reg_table): Remove trailing "(bad)" entries.
 553         (prefix_table): Likewise.
 554         (x86_64_table): Likewise.
 555         (vex_len_table): Likewise.
 556         (vex_w_table): Likewise.
 557         (mod_table): Likewise.
 558         (rm_table): Likewise.
 559         (get_valid_dis386): Handle bytemode 0.
 560
 561 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 562
 563         * i386-opc.h (VEXScalar): New.
 564
 565         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 566         instructions.
 567         * i386-tbl.h: Regenerated.
 568
 569 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 572
 573         * i386-opc.tbl: Add xsave64 and xrstor64.
 574         * i386-tbl.h: Regenerated.
 575
 576 2010-01-20  Nick Clifton  <nickc@redhat.com>
 577
 578         PR 11170
 579         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 580         based post-indexed addressing.
 581
 582 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 583
 584         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 585         * i386-tbl.h: Regenerated.
 586
 587 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 588
 589         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 590         comments.
 591
 592 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 593
 594         * i386-dis.c (names_mm): New.
 595         (intel_names_mm): Likewise.
 596         (att_names_mm): Likewise.
 597         (names_xmm): Likewise.
 598         (intel_names_xmm): Likewise.
 599         (att_names_xmm): Likewise.
 600         (names_ymm): Likewise.
 601         (intel_names_ymm): Likewise.
 602         (att_names_ymm): Likewise.
 603         (print_insn): Set names_mm, names_xmm and names_ymm.
 604         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 605         (OP_XMM): Likewise.
 606         (OP_EM): Likewise.
 607         (OP_EMC): Likewise.
 608         (OP_MXC): Likewise.
 609         (OP_EX): Likewise.
 610         (XMM_Fixup): Likewise.
 611         (OP_VEX): Likewise.
 612         (OP_EX_VexReg): Likewise.
 613         (OP_Vex_2src): Likewise.
 614         (OP_Vex_2src_1): Likewise.
 615         (OP_Vex_2src_2): Likewise.
 616         (OP_REG_VexI4): Likewise.
 617
 618 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 619
 620         * i386-dis.c (print_insn): Update comments.
 621
 622 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 623
 624         * i386-dis.c (rex_original): Removed.
 625         (ckprefix): Remove rex_original.
 626         (print_insn): Update comments.
 627
 628 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 629
 630         * Makefile.in: Regenerate.
 631         * configure: Regenerate.
 632
 633 2010-01-07  Doug Evans  <dje@sebabeach.org>
 634
 635         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 636         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 637         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 638         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 639         * xstormy16-ibld.c: Regenerate.
 640
 641 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 642
 643         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 644         * i386-init.h: Regenerated.
 645
 646 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 647
 648         * arm-dis.c (print_insn): Fixed search for next symbol and data
 649         dumping condition, and the initial mapping symbol state.
 650
 651 2010-01-05  Doug Evans  <dje@sebabeach.org>
 652
 653         * cgen-ibld.in: #include "cgen/basic-modes.h".
 654         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 655         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 656         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 657         * xstormy16-ibld.c: Regenerate.
 658
 659 2010-01-04  Nick Clifton  <nickc@redhat.com>
 660
 661         PR 11123
 662         * arm-dis.c (print_insn_coprocessor): Initialise value.
 663
 664 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 665
 666         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 667
 668 2010-01-02  Doug Evans  <dje@sebabeach.org>
 669
 670         * cgen-asm.in: Update copyright year.
 671         * cgen-dis.in: Update copyright year.
 672         * cgen-ibld.in: Update copyright year.
 673         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 674         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 675         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 676         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 677         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 678         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 679         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 680         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 681         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 682         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 683         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 684         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 685         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 686         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 687         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 688         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 689         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 690         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 691         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 692         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 693         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 694
 695 For older changes see ChangeLog-2009
 696 \f
 697 Local Variables:
 698 mode: change-log
 699 left-margin: 8
 700 fill-column: 74
 701 version-control: never
 702 End: