opcodes/ChangeLog

   1 2015-06-01  Jan Beulich  <jbeulich@suse.com>
   2
   3         * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
   4         * i386-tbl.h: Regenerate.
   5
   6 2015-05-18  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-opc.tbl: Remove Disp32 from AMD64 direct call/jmp.
   9         * i386-init.h: Regenerated.
  10
  11 2015-05-15  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         PR binutis/18386
  14         * i386-dis.c: Add comments for '@'.
  15         (x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9.
  16         (enum x86_64_isa): New.
  17         (isa64): Likewise.
  18         (print_i386_disassembler_options): Add amd64 and intel64.
  19         (print_insn): Handle amd64 and intel64.
  20         (putop): Handle '@'.
  21         (OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit.
  22         * i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64.
  23         * i386-opc.h (AMD64): New.
  24         (CpuIntel64): Likewise.
  25         (i386_cpu_flags): Add cpuamd64 and cpuintel64.
  26         * i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64.
  27         Mark direct call/jmp without Disp16|Disp32 as Intel64.
  28         * i386-init.h: Regenerated.
  29         * i386-tbl.h: Likewise.
  30
  31 2015-05-14  Peter Bergner  <bergner@vnet.ibm.com>
  32
  33         * ppc-opc.c (IH) New define.
  34         (powerpc_opcodes) <wait>: Do not enable for POWER7.
  35         <tlbie>: Add RS operand for POWER7.
  36         <slbia>: Add IH operand for POWER6.
  37
  38 2015-05-11  H.J. Lu  <hongjiu.lu@intel.com>
  39
  40         * opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit
  41         direct branch.
  42         (jmp): Likewise.
  43         * i386-tbl.h: Regenerated.
  44
  45 2015-05-11  H.J. Lu  <hongjiu.lu@intel.com>
  46
  47         * configure.ac: Support bfd_iamcu_arch.
  48         * disassemble.c (disassembler): Support bfd_iamcu_arch.
  49         * i386-gen.c (cpu_flag_init): Add CPU_IAMCU_FLAGS and
  50         CPU_IAMCU_COMPAT_FLAGS.
  51         (cpu_flags): Add CpuIAMCU.
  52         * i386-opc.h (CpuIAMCU): New.
  53         (i386_cpu_flags): Add cpuiamcu.
  54         * configure: Regenerated.
  55         * i386-init.h: Likewise.
  56         * i386-tbl.h: Likewise.
  57
  58 2015-05-08  H.J. Lu  <hongjiu.lu@intel.com>
  59
  60         PR binutis/18386
  61         * i386-dis.c (X86_64_E8): New.
  62         (X86_64_E9): Likewise.
  63         Update comments on 'T', 'U', 'V'.  Add comments for '^'.
  64         (dis386): Replace callT/jmpT with X86_64_E8/X86_64_E9.
  65         (x86_64_table): Add X86_64_E8 and X86_64_E9.
  66         (mod_table): Replace {T|} with ^ on Jcall/Jmp.
  67         (putop): Handle '^'.
  68         (OP_J): Ignore the operand size prefix in 64-bit.  Don't check
  69         REX_W.
  70
  71 2015-04-30  DJ Delorie  <dj@redhat.com>
  72
  73         * disassemble.c (disassembler): Choose suitable disassembler based
  74         on E_ABI.
  75         * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
  76         it to decode mul/div insns.
  77         * rl78-decode.c: Regenerate.
  78         * rl78-dis.c (print_insn_rl78): Rename to...
  79         (print_insn_rl78_common): ...this, take ISA parameter.
  80         (print_insn_rl78): New.
  81         (print_insn_rl78_g10): New.
  82         (print_insn_rl78_g13): New.
  83         (print_insn_rl78_g14): New.
  84         (rl78_get_disassembler): New.
  85
  86 2015-04-29  Nick Clifton  <nickc@redhat.com>
  87
  88         * po/fr.po: Updated French translation.
  89
  90 2015-04-27  Peter Bergner  <bergner@vnet.ibm.com>
  91
  92         * ppc-opc.c (DCBT_EO): New define.
  93         (powerpc_opcodes) <lbarx>: Enable for POWER8 and later.
  94         <lharx>: Likewise.
  95         <stbcx.>: Likewise.
  96         <sthcx.>: Likewise.
  97         <waitrsv>: Do not enable for POWER7 and later.
  98         <waitimpl>: Likewise.
  99         <dcbt>: Default to the two operand form of the instruction for all
 100         "old" cpus.  For "new" cpus, use the operand ordering that matches
 101         whether the cpu is server or embedded.
 102         <dcbtst>: Likewise.
 103
 104 2015-04-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 105
 106         * s390-opc.c: New instruction type VV0UU2.
 107         * s390-opc.txt: Fix instruction types for VFCE, VLDE, VFSQ, WFK,
 108         and WFC.
 109
 110 2015-04-23  Jan Beulich  <jbeulich@suse.com>
 111
 112         * i386-dis.c (putop): Extend "XY" handling to AVX512. Handle "XZ".
 113         * i386-dis-evex.h.c (vcvtpd2ps, vcvtqq2ps, vcvttpd2udq,
 114         vcvtpd2udq, vcvtuqq2ps, vcvttpd2dq, vcvtpd2dq): Add %XY.
 115         (vfpclasspd, vfpclassps): Add %XZ.
 116
 117 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 118
 119         * i386-dis.c (PREFIX_UD_SHIFT): Removed.
 120         (PREFIX_UD_REPZ): Likewise.
 121         (PREFIX_UD_REPNZ): Likewise.
 122         (PREFIX_UD_DATA): Likewise.
 123         (PREFIX_UD_ADDR): Likewise.
 124         (PREFIX_UD_LOCK): Likewise.
 125
 126 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 127
 128         * i386-dis.c (prefix_requirement): Removed.
 129         (print_insn): Don't set prefix_requirement.  Check
 130         dp->prefix_requirement instead of prefix_requirement.
 131
 132 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 133
 134         PR binutils/17898
 135         * i386-dis.c (PREFIX_0FC7_REG_6): Renamed to ...
 136         (PREFIX_MOD_0_0FC7_REG_6): This.
 137         (PREFIX_MOD_3_0FC7_REG_6): New.
 138         (PREFIX_MOD_3_0FC7_REG_7): Likewise.
 139         (prefix_table): Replace PREFIX_0FC7_REG_6 with
 140         PREFIX_MOD_0_0FC7_REG_6.  Add PREFIX_MOD_3_0FC7_REG_6 and
 141         PREFIX_MOD_3_0FC7_REG_7.
 142         (mod_table): Replace PREFIX_0FC7_REG_6 with
 143         PREFIX_MOD_0_0FC7_REG_6.  Use PREFIX_MOD_3_0FC7_REG_6 and
 144         PREFIX_MOD_3_0FC7_REG_7.
 145
 146 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 147
 148         * i386-dis.c (PREFIX_MANDATORY_REPZ): Removed.
 149         (PREFIX_MANDATORY_REPNZ): Likewise.
 150         (PREFIX_MANDATORY_DATA): Likewise.
 151         (PREFIX_MANDATORY_ADDR): Likewise.
 152         (PREFIX_MANDATORY_LOCK): Likewise.
 153         (PREFIX_MANDATORY): Likewise.
 154         (PREFIX_UD_SHIFT): Set to 8
 155         (PREFIX_UD_REPZ): Updated.
 156         (PREFIX_UD_REPNZ): Likewise.
 157         (PREFIX_UD_DATA): Likewise.
 158         (PREFIX_UD_ADDR): Likewise.
 159         (PREFIX_UD_LOCK): Likewise.
 160         (PREFIX_IGNORED_SHIFT): New.
 161         (PREFIX_IGNORED_REPZ): Likewise.
 162         (PREFIX_IGNORED_REPNZ): Likewise.
 163         (PREFIX_IGNORED_DATA): Likewise.
 164         (PREFIX_IGNORED_ADDR): Likewise.
 165         (PREFIX_IGNORED_LOCK): Likewise.
 166         (PREFIX_OPCODE): Likewise.
 167         (PREFIX_IGNORED): Likewise.
 168         (Bad_Opcode): Replace PREFIX_MANDATORY with 0.
 169         (dis386_twobyte): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
 170         (three_byte_table): Likewise.
 171         (mod_table): Likewise.
 172         (mandatory_prefix): Renamed to ...
 173         (prefix_requirement): This.
 174         (prefix_table): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
 175         Update PREFIX_90 entry.
 176         (get_valid_dis386): Check prefix_requirement to see if a prefix
 177         should be ignored.
 178         (print_insn): Replace mandatory_prefix with prefix_requirement.
 179
 180 2015-04-15  Renlin Li  <renlin.li@arm.com>
 181
 182         * arm-dis.c (thumb32_opcodes): Define 'D' format control code,
 183         use it for ssat and ssat16.
 184         (print_insn_thumb32): Add handle case for 'D' control code.
 185
 186 2015-04-06  Ilya Tocar  <ilya.tocar@intel.com>
 187             H.J. Lu  <hongjiu.lu@intel.com>
 188
 189         * i386-dis-evex.h (evex_table): Fill prefix_requirement field.
 190         * i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
 191         PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
 192         PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
 193         PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
 194         (Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
 195         Fill prefix_requirement field.
 196         (struct dis386): Add prefix_requirement field.
 197         (dis386): Fill prefix_requirement field.
 198         (dis386_twobyte): Ditto.
 199         (twobyte_has_mandatory_prefix_: Remove.
 200         (reg_table): Fill prefix_requirement field.
 201         (prefix_table): Ditto.
 202         (x86_64_table): Ditto.
 203         (three_byte_table): Ditto.
 204         (xop_table): Ditto.
 205         (vex_table): Ditto.
 206         (vex_len_table): Ditto.
 207         (vex_w_table): Ditto.
 208         (mod_table): Ditto.
 209         (bad_opcode): Ditto.
 210         (print_insn): Use prefix_requirement.
 211         (FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
 212         FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
 213         (float_reg): Ditto.
 214
 215 2015-03-30  Mike Frysinger  <vapier@gentoo.org>
 216
 217         * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
 218
 219 2015-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 220
 221         * Makefile.in: Regenerated.
 222
 223 2015-03-25  Anton Blanchard  <anton@samba.org>
 224
 225         * ppc-dis.c (disassemble_init_powerpc): Only initialise
 226         powerpc_opcd_indices and vle_opcd_indices once.
 227
 228 2015-03-25  Anton Blanchard  <anton@samba.org>
 229
 230         * ppc-opc.c (powerpc_opcodes): Add slbfee.
 231
 232 2015-03-24  Terry Guo  <terry.guo@arm.com>
 233
 234         * arm-dis.c (opcode32): Updated to use new arm feature struct.
 235         (opcode16): Likewise.
 236         (coprocessor_opcodes): Replace bit with feature struct.
 237         (neon_opcodes): Likewise.
 238         (arm_opcodes): Likewise.
 239         (thumb_opcodes): Likewise.
 240         (thumb32_opcodes): Likewise.
 241         (print_insn_coprocessor): Likewise.
 242         (print_insn_arm): Likewise.
 243         (select_arm_features): Follow new feature struct.
 244
 245 2015-03-17  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
 246
 247         * i386-dis.c (rm_table): Add clzero.
 248         * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
 249         Add CPU_CLZERO_FLAGS.
 250         (cpu_flags): Add CpuCLZERO.
 251         * i386-opc.h: Add CpuCLZERO.
 252         * i386-opc.tbl: Add clzero.
 253         * i386-init.h: Re-generated.
 254         * i386-tbl.h: Re-generated.
 255
 256 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
 257
 258         * mips-opc.c (decode_mips_operand): Fix constraint issues
 259         with u and y operands.
 260
 261 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
 262
 263         * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
 264
 265 2015-03-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 266
 267         * s390-opc.c: Add new IBM z13 instructions.
 268         * s390-opc.txt: Likewise.
 269
 270 2015-03-10  Renlin Li  <renlin.li@arm.com>
 271
 272         * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
 273         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
 274         related alias.
 275         * aarch64-asm-2.c: Regenerate.
 276         * aarch64-dis-2.c: Likewise.
 277         * aarch64-opc-2.c: Likewise.
 278
 279 2015-03-03  Jiong Wang  <jiong.wang@arm.com>
 280
 281         * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
 282
 283 2015-02-25  Oleg Endo  <olegendo@gcc.gnu.org>
 284
 285         * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
 286         arch_sh_up.
 287         (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
 288         arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
 289
 290 2015-02-23  Vinay  <Vinay.G@kpit.com>
 291
 292         * rl78-decode.opc (MOV): Added space between two operands for
 293         'mov' instruction in index addressing mode.
 294         * rl78-decode.c: Regenerate.
 295
 296 2015-02-19  Pedro Alves  <palves@redhat.com>
 297
 298         * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
 299
 300 2015-02-10  Pedro Alves  <palves@redhat.com>
 301             Tom Tromey  <tromey@redhat.com>
 302
 303         * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
 304         microblaze_and, microblaze_xor.
 305         * microblaze-opc.h (opcodes): Adjust.
 306
 307 2015-01-28  James Bowman  <james.bowman@ftdichip.com>
 308
 309         * Makefile.am: Add FT32 files.
 310         * configure.ac: Handle FT32.
 311         * disassemble.c (disassembler): Call print_insn_ft32.
 312         * ft32-dis.c: New file.
 313         * ft32-opc.c: New file.
 314         * Makefile.in: Regenerate.
 315         * configure: Regenerate.
 316         * po/POTFILES.in: Regenerate.
 317
 318 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 319
 320         * nds32-asm.c (keyword_sr): Add new system registers.
 321
 322 2015-01-16  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 323
 324         * s390-dis.c (s390_extract_operand): Support vector register
 325         operands.
 326         (s390_print_insn_with_opcode): Support new operands types and add
 327         new handling of optional operands.
 328         * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
 329         and include opcode/s390.h instead.
 330         (struct op_struct): New field `flags'.
 331         (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
 332         (dumpTable): Dump flags.
 333         (main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
 334         string.
 335         * s390-opc.c: Add new operands types, instruction formats, and
 336         instruction masks.
 337         (s390_opformats): Add new formats for .insn.
 338         * s390-opc.txt: Add new instructions.
 339
 340 2015-01-01  Alan Modra  <amodra@gmail.com>
 341
 342         Update year range in copyright notice of all files.
 343
 344 For older changes see ChangeLog-2014
 345 \f
 346 Copyright (C) 2015 Free Software Foundation, Inc.
 347
 348 Copying and distribution of this file, with or without modification,
 349 are permitted in any medium without royalty provided the copyright
 350 notice and this notice are preserved.
 351
 352 Local Variables:
 353 mode: change-log
 354 left-margin: 8
 355 fill-column: 74
 356 version-control: never
 357 End: