Add znver1 processor
[binutils-gdb.git] / opcodes / ChangeLog
1 2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
2
3 * i386-dis.c (rm_table): Add clzero.
4 * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
5 Add CPU_CLZERO_FLAGS.
6 (cpu_flags): Add CpuCLZERO.
7 * i386-opc.h: Add CpuCLZERO.
8 * i386-opc.tbl: Add clzero.
9 * i386-init.h: Re-generated.
10 * i386-tbl.h: Re-generated.
11
12 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
13
14 * mips-opc.c (decode_mips_operand): Fix constraint issues
15 with u and y operands.
16
17 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
18
19 * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
20
21 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
22
23 * s390-opc.c: Add new IBM z13 instructions.
24 * s390-opc.txt: Likewise.
25
26 2015-03-10 Renlin Li <renlin.li@arm.com>
27
28 * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
29 stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
30 related alias.
31 * aarch64-asm-2.c: Regenerate.
32 * aarch64-dis-2.c: Likewise.
33 * aarch64-opc-2.c: Likewise.
34
35 2015-03-03 Jiong Wang <jiong.wang@arm.com>
36
37 * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
38
39 2015-02-25 Oleg Endo <olegendo@gcc.gnu.org>
40
41 * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
42 arch_sh_up.
43 (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
44 arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
45
46 2015-02-23 Vinay <Vinay.G@kpit.com>
47
48 * rl78-decode.opc (MOV): Added space between two operands for
49 'mov' instruction in index addressing mode.
50 * rl78-decode.c: Regenerate.
51
52 2015-02-19 Pedro Alves <palves@redhat.com>
53
54 * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
55
56 2015-02-10 Pedro Alves <palves@redhat.com>
57 Tom Tromey <tromey@redhat.com>
58
59 * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
60 microblaze_and, microblaze_xor.
61 * microblaze-opc.h (opcodes): Adjust.
62
63 2015-01-28 James Bowman <james.bowman@ftdichip.com>
64
65 * Makefile.am: Add FT32 files.
66 * configure.ac: Handle FT32.
67 * disassemble.c (disassembler): Call print_insn_ft32.
68 * ft32-dis.c: New file.
69 * ft32-opc.c: New file.
70 * Makefile.in: Regenerate.
71 * configure: Regenerate.
72 * po/POTFILES.in: Regenerate.
73
74 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
75
76 * nds32-asm.c (keyword_sr): Add new system registers.
77
78 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
79
80 * s390-dis.c (s390_extract_operand): Support vector register
81 operands.
82 (s390_print_insn_with_opcode): Support new operands types and add
83 new handling of optional operands.
84 * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
85 and include opcode/s390.h instead.
86 (struct op_struct): New field `flags'.
87 (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
88 (dumpTable): Dump flags.
89 (main): Parse flags from the s390-opc.txt file. Add z13 as cpu
90 string.
91 * s390-opc.c: Add new operands types, instruction formats, and
92 instruction masks.
93 (s390_opformats): Add new formats for .insn.
94 * s390-opc.txt: Add new instructions.
95
96 2015-01-01 Alan Modra <amodra@gmail.com>
97
98 Update year range in copyright notice of all files.
99
100 For older changes see ChangeLog-2014
101 \f
102 Copyright (C) 2015 Free Software Foundation, Inc.
103
104 Copying and distribution of this file, with or without modification,
105 are permitted in any medium without royalty provided the copyright
106 notice and this notice are preserved.
107
108 Local Variables:
109 mode: change-log
110 left-margin: 8
111 fill-column: 74
112 version-control: never
113 End: