* ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2
3 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
4 and mtocrf on EFS.
5
6 2010-06-29 Alan Modra <amodra@gmail.com>
7
8 * maxq-dis.c: Delete file.
9 * Makefile.am: Remove references to maxq.
10 * configure.in: Likewise.
11 * disassemble.c: Likewise.
12 * Makefile.in: Regenerate.
13 * configure: Regenerate.
14 * po/POTFILES.in: Regenerate.
15
16 2010-06-29 Alan Modra <amodra@gmail.com>
17
18 * mep-dis.c: Regenerate.
19
20 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
21
22 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
23
24 2010-06-27 Alan Modra <amodra@gmail.com>
25
26 * arc-dis.c (arc_sprintf): Delete set but unused variables.
27 (decodeInstr): Likewise.
28 * dlx-dis.c (print_insn_dlx): Likewise.
29 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
30 * maxq-dis.c (check_move, print_insn): Likewise.
31 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
32 * msp430-dis.c (msp430_branchinstr): Likewise.
33 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
34 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
35 * sparc-dis.c (print_insn_sparc): Likewise.
36 * fr30-asm.c: Regenerate.
37 * frv-asm.c: Regenerate.
38 * ip2k-asm.c: Regenerate.
39 * iq2000-asm.c: Regenerate.
40 * lm32-asm.c: Regenerate.
41 * m32c-asm.c: Regenerate.
42 * m32r-asm.c: Regenerate.
43 * mep-asm.c: Regenerate.
44 * mt-asm.c: Regenerate.
45 * openrisc-asm.c: Regenerate.
46 * xc16x-asm.c: Regenerate.
47 * xstormy16-asm.c: Regenerate.
48
49 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
50
51 PR gas/11673
52 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
53
54 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
55
56 PR binutils/11676
57 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
58
59 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
60
61 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
62 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
63 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
64 touch floating point regs and are enabled by COM, PPC or PPCCOM.
65 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
66 Treat lwsync as msync on e500.
67
68 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
69
70 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
71
72 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
73
74 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
75 constants is the same on 32-bit and 64-bit hosts.
76
77 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
78
79 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
80 .short directives so that they can be reassembled.
81
82 2010-05-26 Catherine Moore <clm@codesourcery.com>
83 David Ung <davidu@mips.com>
84
85 * mips-opc.c: Change membership to I1 for instructions ssnop and
86 ehb.
87
88 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
89
90 * i386-dis.c (sib): New.
91 (get_sib): Likewise.
92 (print_insn): Call get_sib.
93 OP_E_memory): Use sib.
94
95 2010-05-26 Catherine Moore <clm@codesoourcery.com>
96
97 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
98 * mips-opc.c (I16): Remove.
99 (mips_builtin_op): Reclassify jalx.
100
101 2010-05-19 Alan Modra <amodra@gmail.com>
102
103 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
104 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
105
106 2010-05-13 Alan Modra <amodra@gmail.com>
107
108 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
109
110 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
111
112 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
113 format.
114 (print_insn_thumb16): Add support for new %W format.
115
116 2010-05-07 Tristan Gingold <gingold@adacore.com>
117
118 * Makefile.in: Regenerate with automake 1.11.1.
119 * aclocal.m4: Ditto.
120
121 2010-05-05 Nick Clifton <nickc@redhat.com>
122
123 * po/es.po: Updated Spanish translation.
124
125 2010-04-22 Nick Clifton <nickc@redhat.com>
126
127 * po/opcodes.pot: Updated by the Translation project.
128 * po/vi.po: Updated Vietnamese translation.
129
130 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
131
132 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
133 bits in opcode.
134
135 2010-04-09 Nick Clifton <nickc@redhat.com>
136
137 * i386-dis.c (print_insn): Remove unused variable op.
138 (OP_sI): Remove unused variable mask.
139
140 2010-04-07 Alan Modra <amodra@gmail.com>
141
142 * configure: Regenerate.
143
144 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
145
146 * ppc-opc.c (RBOPT): New define.
147 ("dccci"): Enable for PPCA2. Make operands optional.
148 ("iccci"): Likewise. Do not deprecate for PPC476.
149
150 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
151
152 * cr16-opc.c (cr16_instruction): Fix typo in comment.
153
154 2010-03-25 Joseph Myers <joseph@codesourcery.com>
155
156 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
157 * Makefile.in: Regenerate.
158 * configure.in (bfd_tic6x_arch): New.
159 * configure: Regenerate.
160 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
161 (disassembler): Handle TI C6X.
162 * tic6x-dis.c: New.
163
164 2010-03-24 Mike Frysinger <vapier@gentoo.org>
165
166 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
167
168 2010-03-23 Joseph Myers <joseph@codesourcery.com>
169
170 * dis-buf.c (buffer_read_memory): Give error for reading just
171 before the start of memory.
172
173 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
174 Quentin Neill <quentin.neill@amd.com>
175
176 * i386-dis.c (OP_LWP_I): Removed.
177 (reg_table): Do not use OP_LWP_I, use Iq.
178 (OP_LWPCB_E): Remove use of names16.
179 (OP_LWP_E): Same.
180 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
181 should not set the Vex.length bit.
182 * i386-tbl.h: Regenerated.
183
184 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
185
186 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
187
188 2010-02-24 Nick Clifton <nickc@redhat.com>
189
190 PR binutils/6773
191 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
192 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
193 (thumb32_opcodes): Likewise.
194
195 2010-02-15 Nick Clifton <nickc@redhat.com>
196
197 * po/vi.po: Updated Vietnamese translation.
198
199 2010-02-12 Doug Evans <dje@sebabeach.org>
200
201 * lm32-opinst.c: Regenerate.
202
203 2010-02-11 Doug Evans <dje@sebabeach.org>
204
205 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
206 (print_address): Delete CGEN_PRINT_ADDRESS.
207 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
208 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
209 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
210 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
211
212 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
213 * frv-desc.c, * frv-desc.h, * frv-opc.c,
214 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
215 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
216 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
217 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
218 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
219 * mep-desc.c, * mep-desc.h, * mep-opc.c,
220 * mt-desc.c, * mt-desc.h, * mt-opc.c,
221 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
222 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
223 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
224
225 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
226
227 * i386-dis.c: Update copyright.
228 * i386-gen.c: Likewise.
229 * i386-opc.h: Likewise.
230 * i386-opc.tbl: Likewise.
231
232 2010-02-10 Quentin Neill <quentin.neill@amd.com>
233 Sebastian Pop <sebastian.pop@amd.com>
234
235 * i386-dis.c (OP_EX_VexImmW): Reintroduced
236 function to handle 5th imm8 operand.
237 (PREFIX_VEX_3A48): Added.
238 (PREFIX_VEX_3A49): Added.
239 (VEX_W_3A48_P_2): Added.
240 (VEX_W_3A49_P_2): Added.
241 (prefix table): Added entries for PREFIX_VEX_3A48
242 and PREFIX_VEX_3A49.
243 (vex table): Added entries for VEX_W_3A48_P_2 and
244 and VEX_W_3A49_P_2.
245 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
246 for Vec_Imm4 operands.
247 * i386-opc.h (enum): Added Vec_Imm4.
248 (i386_operand_type): Added vec_imm4.
249 * i386-opc.tbl: Add entries for vpermilp[ds].
250 * i386-init.h: Regenerated.
251 * i386-tbl.h: Regenerated.
252
253 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
254
255 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
256 and "pwr7". Move "a2" into alphabetical order.
257
258 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
259
260 * ppc-dis.c (ppc_opts): Add titan entry.
261 * ppc-opc.c (TITAN, MULHW): Define.
262 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
263
264 2010-02-03 Quentin Neill <quentin.neill@amd.com>
265
266 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
267 to CPU_BDVER1_FLAGS
268 * i386-init.h: Regenerated.
269
270 2010-02-03 Anthony Green <green@moxielogic.com>
271
272 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
273 0x0f, and make 0x00 an illegal instruction.
274
275 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
276
277 * opcodes/arm-dis.c (struct arm_private_data): New.
278 (print_insn_coprocessor, print_insn_arm): Update to use struct
279 arm_private_data.
280 (is_mapping_symbol, get_map_sym_type): New functions.
281 (get_sym_code_type): Check the symbol's section. Do not check
282 mapping symbols.
283 (print_insn): Default to disassembling ARM mode code. Check
284 for mapping symbols separately from other symbols. Use
285 struct arm_private_data.
286
287 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
288
289 * i386-dis.c (EXVexWdqScalar): New.
290 (vex_scalar_w_dq_mode): Likewise.
291 (prefix_table): Update entries for PREFIX_VEX_3899,
292 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
293 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
294 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
295 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
296 (intel_operand_size): Handle vex_scalar_w_dq_mode.
297 (OP_EX): Likewise.
298
299 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
300
301 * i386-dis.c (XMScalar): New.
302 (EXdScalar): Likewise.
303 (EXqScalar): Likewise.
304 (EXqScalarS): Likewise.
305 (VexScalar): Likewise.
306 (EXdVexScalarS): Likewise.
307 (EXqVexScalarS): Likewise.
308 (XMVexScalar): Likewise.
309 (scalar_mode): Likewise.
310 (d_scalar_mode): Likewise.
311 (d_scalar_swap_mode): Likewise.
312 (q_scalar_mode): Likewise.
313 (q_scalar_swap_mode): Likewise.
314 (vex_scalar_mode): Likewise.
315 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
316 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
317 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
318 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
319 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
320 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
321 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
322 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
323 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
324 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
325 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
326 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
327 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
328 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
329 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
330 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
331 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
332 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
333 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
334 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
335 q_scalar_mode, q_scalar_swap_mode.
336 (OP_XMM): Handle scalar_mode.
337 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
338 and q_scalar_swap_mode.
339 (OP_VEX): Handle vex_scalar_mode.
340
341 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
342
343 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
344
345 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
346
347 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
348
349 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
350
351 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
352
353 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
354
355 * i386-dis.c (Bad_Opcode): New.
356 (bad_opcode): Likewise.
357 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
358 (dis386_twobyte): Likewise.
359 (reg_table): Likewise.
360 (prefix_table): Likewise.
361 (x86_64_table): Likewise.
362 (vex_len_table): Likewise.
363 (vex_w_table): Likewise.
364 (mod_table): Likewise.
365 (rm_table): Likewise.
366 (float_reg): Likewise.
367 (reg_table): Remove trailing "(bad)" entries.
368 (prefix_table): Likewise.
369 (x86_64_table): Likewise.
370 (vex_len_table): Likewise.
371 (vex_w_table): Likewise.
372 (mod_table): Likewise.
373 (rm_table): Likewise.
374 (get_valid_dis386): Handle bytemode 0.
375
376 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
377
378 * i386-opc.h (VEXScalar): New.
379
380 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
381 instructions.
382 * i386-tbl.h: Regenerated.
383
384 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
385
386 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
387
388 * i386-opc.tbl: Add xsave64 and xrstor64.
389 * i386-tbl.h: Regenerated.
390
391 2010-01-20 Nick Clifton <nickc@redhat.com>
392
393 PR 11170
394 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
395 based post-indexed addressing.
396
397 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
398
399 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
400 * i386-tbl.h: Regenerated.
401
402 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
403
404 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
405 comments.
406
407 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
408
409 * i386-dis.c (names_mm): New.
410 (intel_names_mm): Likewise.
411 (att_names_mm): Likewise.
412 (names_xmm): Likewise.
413 (intel_names_xmm): Likewise.
414 (att_names_xmm): Likewise.
415 (names_ymm): Likewise.
416 (intel_names_ymm): Likewise.
417 (att_names_ymm): Likewise.
418 (print_insn): Set names_mm, names_xmm and names_ymm.
419 (OP_MMX): Use names_mm, names_xmm and names_ymm.
420 (OP_XMM): Likewise.
421 (OP_EM): Likewise.
422 (OP_EMC): Likewise.
423 (OP_MXC): Likewise.
424 (OP_EX): Likewise.
425 (XMM_Fixup): Likewise.
426 (OP_VEX): Likewise.
427 (OP_EX_VexReg): Likewise.
428 (OP_Vex_2src): Likewise.
429 (OP_Vex_2src_1): Likewise.
430 (OP_Vex_2src_2): Likewise.
431 (OP_REG_VexI4): Likewise.
432
433 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
434
435 * i386-dis.c (print_insn): Update comments.
436
437 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
438
439 * i386-dis.c (rex_original): Removed.
440 (ckprefix): Remove rex_original.
441 (print_insn): Update comments.
442
443 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
444
445 * Makefile.in: Regenerate.
446 * configure: Regenerate.
447
448 2010-01-07 Doug Evans <dje@sebabeach.org>
449
450 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
451 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
452 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
453 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
454 * xstormy16-ibld.c: Regenerate.
455
456 2010-01-06 Quentin Neill <quentin.neill@amd.com>
457
458 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
459 * i386-init.h: Regenerated.
460
461 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
462
463 * arm-dis.c (print_insn): Fixed search for next symbol and data
464 dumping condition, and the initial mapping symbol state.
465
466 2010-01-05 Doug Evans <dje@sebabeach.org>
467
468 * cgen-ibld.in: #include "cgen/basic-modes.h".
469 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
470 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
471 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
472 * xstormy16-ibld.c: Regenerate.
473
474 2010-01-04 Nick Clifton <nickc@redhat.com>
475
476 PR 11123
477 * arm-dis.c (print_insn_coprocessor): Initialise value.
478
479 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
480
481 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
482
483 2010-01-02 Doug Evans <dje@sebabeach.org>
484
485 * cgen-asm.in: Update copyright year.
486 * cgen-dis.in: Update copyright year.
487 * cgen-ibld.in: Update copyright year.
488 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
489 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
490 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
491 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
492 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
493 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
494 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
495 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
496 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
497 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
498 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
499 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
500 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
501 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
502 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
503 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
504 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
505 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
506 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
507 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
508 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
509
510 For older changes see ChangeLog-2009
511 \f
512 Local Variables:
513 mode: change-log
514 left-margin: 8
515 fill-column: 74
516 version-control: never
517 End: