opcodes/ChangeLog

   1 2016-06-13  Graham Markall  <graham.markall@embecosm.com>
   2
   3         * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb,
   4         imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms,
   5         csma, cbba, zncv, and hofs.
   6         * arc-opc.c: Add flag classes, insert/extract functions, and operands to
   7         support the above instructions.
   8
   9 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
  10
  11         * arc-nps400-tbl.h: Add andab and orab instructions.
  12
  13 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
  14
  15         * arc-nps400-tbl.h: Add addl-like instructions.
  16
  17 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
  18
  19         * arc-nps400-tbl.h: Add mxb and imxb instructions.
  20
  21 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
  22
  23         * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey and calcxkey
  24         instructions.
  25
  26 2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
  27
  28         * s390-dis.c (option_use_insn_len_bits_p): New file scope
  29         variable.
  30         (init_disasm): Handle new command line option "insnlength".
  31         (print_s390_disassembler_options): Mention new option in help
  32         output.
  33         (print_insn_s390): Use the encoded insn length when dumping
  34         unknown instructions.
  35
  36 2016-06-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
  37
  38         * avr-dis.c (avr_operand): Add default data address space origin (0x800000)
  39          to the address and set as symbol address for LDS/ STS immediate operands.
  40
  41 2016-06-07  Alan Modra  <amodra@gmail.com>
  42
  43         * ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
  44         cpu for "vle" to e500.
  45         * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
  46         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
  47         (PPCNONE): Delete, substitute throughout.
  48         (powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
  49         except for major opcode 4 and 31.
  50         (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
  51
  52 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
  53
  54         * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
  55         ARM_EXT_RAS in relevant entries.
  56
  57 2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
  58
  59         PR binutils/20196
  60         * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
  61         opcodes for E6500.
  62
  63 2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
  64
  65         PR binutis/18386
  66         * i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
  67         (indir_v_mode): New.
  68         Add comments for '&'.
  69         (reg_table): Replace "{T|}" with "{&|}" on call and jmp.
  70         (putop): Handle '&'.
  71         (intel_operand_size): Handle indir_v_mode.
  72         (OP_E_register): Likewise.
  73         * i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
  74         64-bit indirect call/jmp for AMD64.
  75         * i386-tbl.h: Regenerated
  76
  77 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
  78
  79         * arc-dis.c (struct arc_operand_iterator): New structure.
  80         (find_format_from_table): All the old content from find_format,
  81         with some minor adjustments, and parameter renaming.
  82         (find_format_long_instructions): New function.
  83         (find_format): Rewritten.
  84         (arc_insn_length): Add LSB parameter.
  85         (extract_operand_value): New function.
  86         (operand_iterator_next): New function.
  87         (print_insn_arc): Use new functions to find opcode, and iterator
  88         over operands.
  89         * arc-opc.c (insert_nps_3bit_dst_short): New function.
  90         (extract_nps_3bit_dst_short): New function.
  91         (insert_nps_3bit_src2_short): New function.
  92         (extract_nps_3bit_src2_short): New function.
  93         (insert_nps_bitop1_size): New function.
  94         (extract_nps_bitop1_size): New function.
  95         (insert_nps_bitop2_size): New function.
  96         (extract_nps_bitop2_size): New function.
  97         (insert_nps_bitop_mod4_msb): New function.
  98         (extract_nps_bitop_mod4_msb): New function.
  99         (insert_nps_bitop_mod4_lsb): New function.
 100         (extract_nps_bitop_mod4_lsb): New function.
 101         (insert_nps_bitop_dst_pos3_pos4): New function.
 102         (extract_nps_bitop_dst_pos3_pos4): New function.
 103         (insert_nps_bitop_ins_ext): New function.
 104         (extract_nps_bitop_ins_ext): New function.
 105         (arc_operands): Add new operands.
 106         (arc_long_opcodes): New global array.
 107         (arc_num_long_opcodes): New global.
 108         * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
 109
 110 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 111
 112         * nds32-asm.h: Add extern "C".
 113         * sh-opc.h: Likewise.
 114
 115 2016-06-01  Graham Markall  <graham.markall@embecosm.com>
 116
 117         * arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and
 118         0,b,limm to the rflt instruction.
 119
 120 2016-05-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 121
 122         * sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned
 123         constant.
 124
 125 2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
 126
 127         PR gas/20145
 128         * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS,
 129         CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS,
 130         CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS,
 131         CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS,
 132         CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS.
 133         * i386-init.h: Regenerated.
 134
 135 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 136
 137         PR gas/20145
 138         * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS.  Remove
 139         CpuMMX from CPU_SSE_FLAGS.  Remove AVX and AVX512 bits from
 140         CPU_ANY_SSE_FLAGS.  Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
 141         Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
 142         CpuXSAVEC.  Add CPU_AVX_FLAGS to CpuF16C.  Remove CpuMMX from
 143         CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
 144         CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
 145         Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS.   Add CPU_ANY_287_FLAGS,
 146         CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
 147         CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
 148         CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS.  Enable CpuRegMMX
 149         for MMX.  Enable CpuRegXMM for SSE, AVX and AVX512.  Enable
 150         CpuRegYMM for AVX and AVX512VL,  Enable CpuRegZMM and
 151         CpuRegMask for AVX512.
 152         (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
 153         and CpuRegMask.
 154         (set_bitfield_from_cpu_flag_init): New function.
 155         (set_bitfield): Remove const on f.  Call
 156         set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
 157         * i386-opc.h (CpuRegMMX): New.
 158         (CpuRegXMM): Likewise.
 159         (CpuRegYMM): Likewise.
 160         (CpuRegZMM): Likewise.
 161         (CpuRegMask): Likewise.
 162         (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
 163         and cpuregmask.
 164         * i386-init.h: Regenerated.
 165         * i386-tbl.h: Likewise.
 166
 167 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 168
 169         PR gas/20154
 170         * i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
 171         (opcode_modifiers): Add AMD64 and Intel64.
 172         (main): Properly verify CpuMax.
 173         * i386-opc.h (CpuAMD64): Removed.
 174         (CpuIntel64): Likewise.
 175         (CpuMax): Set to CpuNo64.
 176         (i386_cpu_flags): Remove cpuamd64 and cpuintel64.
 177         (AMD64): New.
 178         (Intel64): Likewise.
 179         (i386_opcode_modifier): Add amd64 and intel64.
 180         (i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
 181         on call and jmp.
 182         * i386-init.h: Regenerated.
 183         * i386-tbl.h: Likewise.
 184
 185 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 186
 187         PR gas/20154
 188         * i386-gen.c (main): Fail if CpuMax is incorrect.
 189         * i386-opc.h (CpuMax): Set to CpuIntel64.
 190         * i386-tbl.h: Regenerated.
 191
 192 2016-05-27  Nick Clifton  <nickc@redhat.com>
 193
 194         PR target/20150
 195         * msp430-dis.c (msp430dis_read_two_bytes): New function.
 196         (msp430dis_opcode_unsigned): New function.
 197         (msp430dis_opcode_signed): New function.
 198         (msp430_singleoperand): Use the new opcode reading functions.
 199         Only disassenmble bytes if they were successfully read.
 200         (msp430_doubleoperand): Likewise.
 201         (msp430_branchinstr): Likewise.
 202         (msp430x_callx_instr): Likewise.
 203         (print_insn_msp430): Check that it is safe to read bytes before
 204         attempting disassembly.  Use the new opcode reading functions.
 205
 206 2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
 207
 208         * ppc-opc.c (CY): New define.  Document it.
 209         (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
 210
 211 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 212
 213         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
 214         CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
 215         and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
 216         CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
 217         CPU_ANY_AVX_FLAGS.
 218         * i386-init.h: Regenerated.
 219
 220 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 221
 222         PR gas/20141
 223         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
 224         CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
 225         * i386-init.h: Regenerated.
 226
 227 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 228
 229         * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
 230         CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
 231         * i386-init.h: Regenerated.
 232
 233 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 234
 235         * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
 236         information.
 237         (print_insn_arc): Set insn_type information.
 238         * arc-opc.c (C_CC): Add F_CLASS_COND.
 239         * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
 240         (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
 241         (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
 242         (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
 243         (brne, brne_s, jeq_s, jne_s): Likewise.
 244
 245 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 246
 247         * arc-tbl.h (neg): New instruction variant.
 248
 249 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 250
 251         * arc-dis.c (find_format, find_format, get_auxreg)
 252         (print_insn_arc): Changed.
 253         * arc-ext.h (INSERT_XOP): Likewise.
 254
 255 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 256
 257         * tic54x-dis.c (sprint_mmr): Adjust.
 258         * tic54x-opc.c: Likewise.
 259
 260 2016-05-19  Alan Modra  <amodra@gmail.com>
 261
 262         * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
 263
 264 2016-05-19  Alan Modra  <amodra@gmail.com>
 265
 266         * ppc-opc.c: Formatting.
 267         (NSISIGNOPT): Define.
 268         (powerpc_opcodes <subis>): Use NSISIGNOPT.
 269
 270 2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
 271
 272         * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
 273         replacing references to `micromips_ase' throughout.
 274         (_print_insn_mips): Don't use file-level microMIPS annotation to
 275         determine the disassembly mode with the symbol table.
 276
 277 2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
 278
 279         * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
 280
 281 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 282
 283         * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
 284         mips64r6.
 285         * mips-opc.c (D34): New macro.
 286         (mips_builtin_opcodes): Define bposge32c for DSPr3.
 287
 288 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
 289
 290         * i386-dis.c (prefix_table): Add RDPID instruction.
 291         * i386-gen.c (cpu_flag_init): Add RDPID flag.
 292         (cpu_flags): Add RDPID bitfield.
 293         * i386-opc.h (enum): Add RDPID element.
 294         (i386_cpu_flags): Add RDPID field.
 295         * i386-opc.tbl: Add RDPID instruction.
 296         * i386-init.h: Regenerate.
 297         * i386-tbl.h: Regenerate.
 298
 299 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 300
 301         * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
 302         branch type of a symbol.
 303         (print_insn): Likewise.
 304
 305 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 306
 307         * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
 308         Mainline Security Extensions instructions.
 309         (thumb_opcodes): Add entries for narrow ARMv8-M Security
 310         Extensions instructions.
 311         (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
 312         instructions.
 313         (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
 314         special registers.
 315
 316 2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 317
 318         * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
 319
 320 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 321
 322         * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
 323         (arcExtMap_genOpcode): Likewise.
 324         * arc-opc.c (arg_32bit_rc): Define new variable.
 325         (arg_32bit_u6): Likewise.
 326         (arg_32bit_limm): Likewise.
 327
 328 2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 329
 330         * aarch64-gen.c (VERIFIER): Define.
 331         * aarch64-opc.c (VERIFIER): Define.
 332         (verify_ldpsw): Use static linkage.
 333         * aarch64-opc.h (verify_ldpsw): Remove.
 334         * aarch64-tbl.h: Use VERIFIER for verifiers.
 335
 336 2016-04-28  Nick Clifton  <nickc@redhat.com>
 337
 338         PR target/19722
 339         * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
 340         * aarch64-opc.c (verify_ldpsw): New function.
 341         * aarch64-opc.h (verify_ldpsw): New prototype.
 342         * aarch64-tbl.h: Add initialiser for verifier field.
 343         (LDPSW): Set verifier to verify_ldpsw.
 344
 345 2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
 346
 347         PR binutils/19983
 348         PR binutils/19984
 349         * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
 350         smaller than address size.
 351
 352 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 353
 354         * alpha-dis.c: Regenerate.
 355         * crx-dis.c: Likewise.
 356         * disassemble.c: Likewise.
 357         * epiphany-opc.c: Likewise.
 358         * fr30-opc.c: Likewise.
 359         * frv-opc.c: Likewise.
 360         * ip2k-opc.c: Likewise.
 361         * iq2000-opc.c: Likewise.
 362         * lm32-opc.c: Likewise.
 363         * lm32-opinst.c: Likewise.
 364         * m32c-opc.c: Likewise.
 365         * m32r-opc.c: Likewise.
 366         * m32r-opinst.c: Likewise.
 367         * mep-opc.c: Likewise.
 368         * mt-opc.c: Likewise.
 369         * or1k-opc.c: Likewise.
 370         * or1k-opinst.c: Likewise.
 371         * tic80-opc.c: Likewise.
 372         * xc16x-opc.c: Likewise.
 373         * xstormy16-opc.c: Likewise.
 374
 375 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 376
 377         * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
 378         fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
 379         calcsd, and calcxd instructions.
 380         * arc-opc.c (insert_nps_bitop_size): Delete.
 381         (extract_nps_bitop_size): Delete.
 382         (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
 383         (extract_nps_qcmp_m3): Define.
 384         (extract_nps_qcmp_m2): Define.
 385         (extract_nps_qcmp_m1): Define.
 386         (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
 387         (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
 388         (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
 389         NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
 390         NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
 391         NPS_QCMP_M3.
 392
 393 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 394
 395         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
 396
 397 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 398
 399         * Makefile.in: Regenerated with automake 1.11.6.
 400         * aclocal.m4: Likewise.
 401
 402 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 403
 404         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
 405         instructions.
 406         * arc-opc.c (insert_nps_cmem_uimm16): New function.
 407         (extract_nps_cmem_uimm16): New function.
 408         (arc_operands): Add NPS_XLDST_UIMM16 operand.
 409
 410 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 411
 412         * arc-dis.c (arc_insn_length): New function.
 413         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
 414         (find_format): Change insnLen parameter to unsigned.
 415
 416 2016-04-13  Nick Clifton  <nickc@redhat.com>
 417
 418         PR target/19937
 419         * v850-opc.c (v850_opcodes): Correct masks for long versions of
 420         the LD.B and LD.BU instructions.
 421
 422 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 423
 424         * arc-dis.c (find_format): Check for extension flags.
 425         (print_flags): New function.
 426         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
 427         .extAuxRegister.
 428         * arc-ext.c (arcExtMap_coreRegName): Use
 429         LAST_EXTENSION_CORE_REGISTER.
 430         (arcExtMap_coreReadWrite): Likewise.
 431         (dump_ARC_extmap): Update printing.
 432         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
 433         (arc_aux_regs): Add cpu field.
 434         * arc-regs.h: Add cpu field, lower case name aux registers.
 435
 436 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 437
 438         * arc-tbl.h: Add rtsc, sleep with no arguments.
 439
 440 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 441
 442         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
 443         Initialize.
 444         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 445         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 446         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 447         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 448         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 449         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 450         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 451         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 452         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 453         (arc_opcode arc_opcodes): Null terminate the array.
 454         (arc_num_opcodes): Remove.
 455         * arc-ext.h (INSERT_XOP): Define.
 456         (extInstruction_t): Likewise.
 457         (arcExtMap_instName): Delete.
 458         (arcExtMap_insn): New function.
 459         (arcExtMap_genOpcode): Likewise.
 460         * arc-ext.c (ExtInstruction): Remove.
 461         (create_map): Zero initialize instruction fields.
 462         (arcExtMap_instName): Remove.
 463         (arcExtMap_insn): New function.
 464         (dump_ARC_extmap): More info while debuging.
 465         (arcExtMap_genOpcode): New function.
 466         * arc-dis.c (find_format): New function.
 467         (print_insn_arc): Use find_format.
 468         (arc_get_disassembler): Enable dump_ARC_extmap only when
 469         debugging.
 470
 471 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
 472
 473         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
 474         instruction bits out.
 475
 476 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 477
 478         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
 479         * arc-opc.c (arc_flag_operands): Add new flags.
 480         (arc_flag_classes): Add new classes.
 481
 482 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 483
 484         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 485
 486 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
 487
 488         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
 489         encode1, rflt, crc16, and crc32 instructions.
 490         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
 491         (arc_flag_classes): Add C_NPS_R.
 492         (insert_nps_bitop_size_2b): New function.
 493         (extract_nps_bitop_size_2b): Likewise.
 494         (insert_nps_bitop_uimm8): Likewise.
 495         (extract_nps_bitop_uimm8): Likewise.
 496         (arc_operands): Add new operand entries.
 497
 498 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 499
 500         * arc-regs.h: Add a new subclass field.  Add double assist
 501         accumulator register values.
 502         * arc-tbl.h: Use DPA subclass to mark the double assist
 503         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 504         * arc-opc.c (RSP): Define instead of SP.
 505         (arc_aux_regs): Add the subclass field.
 506
 507 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 508
 509         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 510
 511 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 512
 513         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 514         NPS_R_SRC1.
 515
 516 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 517
 518         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 519         issues.  No functional changes.
 520
 521 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 522
 523         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 524         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 525         (RTT): Remove duplicate.
 526         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 527         (PCT_CONFIG*): Remove.
 528         (D1L, D1H, D2H, D2L): Define.
 529
 530 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 531
 532         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 533
 534 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 535
 536         * arc-tbl.h (invld07): Remove.
 537         * arc-ext-tbl.h: New file.
 538         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 539         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 540
 541 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 542
 543         Fix -Wstack-usage warnings.
 544         * aarch64-dis.c (print_operands): Substitute size.
 545         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 546
 547 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 548
 549         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 550         to get a proper diagnostic when an invalid ASR register is used.
 551
 552 2016-03-22  Nick Clifton  <nickc@redhat.com>
 553
 554         * configure: Regenerate.
 555
 556 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 557
 558         * arc-nps400-tbl.h: New file.
 559         * arc-opc.c: Add top level comment.
 560         (insert_nps_3bit_dst): New function.
 561         (extract_nps_3bit_dst): New function.
 562         (insert_nps_3bit_src2): New function.
 563         (extract_nps_3bit_src2): New function.
 564         (insert_nps_bitop_size): New function.
 565         (extract_nps_bitop_size): New function.
 566         (arc_flag_operands): Add nps400 entries.
 567         (arc_flag_classes): Add nps400 entries.
 568         (arc_operands): Add nps400 entries.
 569         (arc_opcodes): Add nps400 include.
 570
 571 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 572
 573         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 574         the new class enum values.
 575
 576 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 577
 578         * arc-dis.c (print_insn_arc): Handle nps400.
 579
 580 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 581
 582         * arc-opc.c (BASE): Delete.
 583
 584 2016-03-18  Nick Clifton  <nickc@redhat.com>
 585
 586         PR target/19721
 587         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 588         of MOV insn that aliases an ORR insn.
 589
 590 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 591
 592         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 593
 594 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 595
 596         * mcore-opc.h: Add const qualifiers.
 597         * microblaze-opc.h (struct op_code_struct): Likewise.
 598         * sh-opc.h: Likewise.
 599         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 600         (tic4x_print_op): Likewise.
 601
 602 2016-03-02  Alan Modra  <amodra@gmail.com>
 603
 604         * or1k-desc.h: Regenerate.
 605         * fr30-ibld.c: Regenerate.
 606         * rl78-decode.c: Regenerate.
 607
 608 2016-03-01  Nick Clifton  <nickc@redhat.com>
 609
 610         PR target/19747
 611         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 612
 613 2016-02-24  Renlin Li  <renlin.li@arm.com>
 614
 615         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 616         (print_insn_coprocessor): Support fp16 instructions.
 617
 618 2016-02-24  Renlin Li  <renlin.li@arm.com>
 619
 620         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 621         vminnm, vrint(mpna).
 622
 623 2016-02-24  Renlin Li  <renlin.li@arm.com>
 624
 625         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 626         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 627
 628 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 629
 630         * i386-dis.c (print_insn): Parenthesize expression to prevent
 631         truncated addresses.
 632         (OP_J): Likewise.
 633
 634 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 635             Janek van Oirschot  <jvanoirs@synopsys.com>
 636
 637         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 638         variable.
 639
 640 2016-02-04  Nick Clifton  <nickc@redhat.com>
 641
 642         PR target/19561
 643         * msp430-dis.c (print_insn_msp430): Add a special case for
 644         decoding an RRC instruction with the ZC bit set in the extension
 645         word.
 646
 647 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 648
 649         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 650         * epiphany-ibld.c: Regenerate.
 651         * fr30-ibld.c: Regenerate.
 652         * frv-ibld.c: Regenerate.
 653         * ip2k-ibld.c: Regenerate.
 654         * iq2000-ibld.c: Regenerate.
 655         * lm32-ibld.c: Regenerate.
 656         * m32c-ibld.c: Regenerate.
 657         * m32r-ibld.c: Regenerate.
 658         * mep-ibld.c: Regenerate.
 659         * mt-ibld.c: Regenerate.
 660         * or1k-ibld.c: Regenerate.
 661         * xc16x-ibld.c: Regenerate.
 662         * xstormy16-ibld.c: Regenerate.
 663
 664 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 665
 666         * epiphany-dis.c: Regenerated from latest cpu files.
 667
 668 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 669
 670         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 671         test bit.
 672
 673 2016-01-25  Renlin Li  <renlin.li@arm.com>
 674
 675         * arm-dis.c (mapping_symbol_for_insn): New function.
 676         (find_ifthen_state): Call mapping_symbol_for_insn().
 677
 678 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 679
 680         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 681         of MSR UAO immediate operand.
 682
 683 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 684
 685         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 686         instruction support.
 687
 688 2016-01-17  Alan Modra  <amodra@gmail.com>
 689
 690         * configure: Regenerate.
 691
 692 2016-01-14  Nick Clifton  <nickc@redhat.com>
 693
 694         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 695         instructions that can support stack pointer operations.
 696         * rl78-decode.c: Regenerate.
 697         * rl78-dis.c: Fix display of stack pointer in MOVW based
 698         instructions.
 699
 700 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 701
 702         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 703         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 704         erxtatus_el1 and erxaddr_el1.
 705
 706 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 707
 708         * arm-dis.c (arm_opcodes): Add "esb".
 709         (thumb_opcodes): Likewise.
 710
 711 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 712
 713         * ppc-opc.c <xscmpnedp>: Delete.
 714         <xvcmpnedp>: Likewise.
 715         <xvcmpnedp.>: Likewise.
 716         <xvcmpnesp>: Likewise.
 717         <xvcmpnesp.>: Likewise.
 718
 719 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 720
 721         PR gas/13050
 722         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 723         addition to ISA_A.
 724
 725 2016-01-01  Alan Modra  <amodra@gmail.com>
 726
 727         Update year range in copyright notice of all files.
 728
 729 For older changes see ChangeLog-2015
 730 \f
 731 Copyright (C) 2016 Free Software Foundation, Inc.
 732
 733 Copying and distribution of this file, with or without modification,
 734 are permitted in any medium without royalty provided the copyright
 735 notice and this notice are preserved.
 736
 737 Local Variables:
 738 mode: change-log
 739 left-margin: 8
 740 fill-column: 74
 741 version-control: never
 742 End: