1 2008-08-01 Pedro Alves <pedro@codesourcery.com>
3 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
4 * Makefile.in: Regenerate.
6 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
8 * i386-reg.tbl: Use Dw2Inval on AVX registers.
9 * i386-tbl.h: Regenerated.
11 2008-07-30 Michael J. Eager <eager@eagercon.com>
13 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
14 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
15 (insert_sprg, PPC405): Use PPC_OPCODE_405.
16 (powerpc_opcodes): Add Xilinx APU related opcodes.
18 2008-07-30 Alan Modra <amodra@bigpond.net.au>
20 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
22 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
24 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
26 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
28 * mips-opc.c (CP): New macro.
29 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
30 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
31 dmtc2 Octeon instructions.
33 2008-07-07 Stan Shebs <stan@codesourcery.com>
35 * dis-init.c (init_disassemble_info): Init endian_code field.
36 * arm-dis.c (print_insn): Disassemble code according to
37 setting of endian_code.
38 (print_insn_big_arm): Detect when BE8 extension flag has been set.
40 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
42 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
45 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
47 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
48 (print_ppc_disassembler_options): Likewise.
49 * ppc-opc.c (PPC464): Define.
50 (powerpc_opcodes): Add mfdcrux and mtdcrux.
52 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
54 * configure: Regenerate.
56 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
58 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
60 (struct dis_private): New.
61 (POWERPC_DIALECT): New define.
62 (powerpc_dialect): Renamed to...
63 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
65 (print_insn_big_powerpc): Update for using structure in
67 (print_insn_little_powerpc): Likewise.
68 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
69 (skip_optional_operands): Likewise.
70 (print_insn_powerpc): Likewise. Remove initialization of dialect.
71 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
72 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
73 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
74 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
75 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
76 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
77 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
78 param to be of type ppc_cpu_t. Update prototype.
80 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
82 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
84 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
85 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
86 syncw, syncws, vm3mulu, vm0 and vmulu.
88 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
89 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
92 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
94 * i386-opc.tbl: Add vmovd with 64bit operand.
95 * i386-tbl.h: Regenerated.
97 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
99 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
101 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
103 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
104 * i386-tbl.h: Regenerated.
106 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
109 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
110 into 32bit and 64bit. Remove Reg64|Qword and add
111 IgnoreSize|No_qSuf on 32bit version.
112 * i386-tbl.h: Regenerated.
114 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
116 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
117 * i386-tbl.h: Regenerated.
119 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
121 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
123 2008-05-14 Alan Modra <amodra@bigpond.net.au>
125 * Makefile.am: Run "make dep-am".
126 * Makefile.in: Regenerate.
128 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
130 * i386-dis.c (MOVBE_Fixup): New.
132 (PREFIX_0F3880): Likewise.
133 (PREFIX_0F3881): Likewise.
134 (PREFIX_0F38F0): Updated.
135 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
136 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
137 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
139 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
141 (cpu_flags): Add CpuMovbe and CpuEPT.
143 * i386-opc.h (CpuMovbe): New.
146 (i386_cpu_flags): Add cpumovbe and cpuept.
148 * i386-opc.tbl: Add entries for movbe and EPT instructions.
149 * i386-init.h: Regenerated.
150 * i386-tbl.h: Likewise.
152 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
154 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
155 the two drem and the two dremu macros.
157 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
159 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
160 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
161 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
162 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
164 2008-04-25 David S. Miller <davem@davemloft.net>
166 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
167 instead of %sys_tick_cmpr, as suggested in architecture manuals.
169 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
171 * aclocal.m4: Regenerate.
172 * configure: Regenerate.
174 2008-04-23 David S. Miller <davem@davemloft.net>
176 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
178 (prefetch_table): Add missing values.
180 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
182 * i386-gen.c (opcode_modifiers): Add NoAVX.
184 * i386-opc.h (NoAVX): New.
186 (i386_opcode_modifier): Add noavx.
188 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
189 instructions which don't have AVX equivalent.
190 * i386-tbl.h: Regenerated.
192 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
194 * i386-dis.c (OP_VEX_FMA): New.
195 (OP_EX_VexImmW): Likewise.
197 (Vex128FMA): Likewise.
198 (EXVexImmW): Likewise.
199 (get_vex_imm8): Likewise.
200 (OP_EX_VexReg): Likewise.
201 (vex_i4_done): Renamed to ...
203 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
204 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
206 (print_insn): Updated.
207 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
208 (OP_REG_VexI4): Check invalid high registers.
210 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
211 Michael Meissner <michael.meissner@amd.com>
213 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
214 * i386-tbl.h: Regenerate from i386-opc.tbl.
216 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
218 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
219 accept Power E500MC instructions.
220 (print_ppc_disassembler_options): Document -Me500mc.
221 * ppc-opc.c (DUIS, DUI, T): New.
222 (XRT, XRTRA): Likewise.
224 (powerpc_opcodes): Add new Power E500MC instructions.
226 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
228 * s390-dis.c (init_disasm): Evaluate disassembler_options.
229 (print_s390_disassembler_options): New function.
230 * disassemble.c (disassembler_usage): Invoke
231 print_s390_disassembler_options.
233 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
235 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
236 of local variables used for mnemonic parsing: prefix, suffix and
239 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
241 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
242 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
243 (s390_crb_extensions): New extensions table.
244 (insertExpandedMnemonic): Handle '$' tag.
245 * s390-opc.txt: Remove conditional jump variants which can now
246 be expanded automatically.
247 Replace '*' tag with '$' in the compare and branch instructions.
249 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
251 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
252 (PREFIX_VEX_3AXX): Likewis.
254 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
256 * i386-opc.tbl: Remove 4 extra blank lines.
258 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
260 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
261 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
262 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
263 * i386-opc.tbl: Likewise.
265 * i386-opc.h (CpuCLMUL): Renamed to ...
268 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
270 * i386-init.h: Regenerated.
272 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
274 * i386-dis.c (OP_E_register): New.
275 (OP_E_memory): Likewise.
277 (OP_EX_Vex): Likewise.
278 (OP_EX_VexW): Likewise.
279 (OP_XMM_Vex): Likewise.
280 (OP_XMM_VexW): Likewise.
281 (OP_REG_VexI4): Likewise.
282 (PCLMUL_Fixup): Likewise.
283 (VEXI4_Fixup): Likewise.
284 (VZERO_Fixup): Likewise.
285 (VCMP_Fixup): Likewise.
286 (VPERMIL2_Fixup): Likewise.
287 (rex_original): Likewise.
288 (rex_ignored): Likewise.
309 (VPERMIL2): Likewise.
310 (xmm_mode): Likewise.
311 (xmmq_mode): Likewise.
312 (ymmq_mode): Likewise.
313 (vex_mode): Likewise.
314 (vex128_mode): Likewise.
315 (vex256_mode): Likewise.
316 (USE_VEX_C4_TABLE): Likewise.
317 (USE_VEX_C5_TABLE): Likewise.
318 (USE_VEX_LEN_TABLE): Likewise.
319 (VEX_C4_TABLE): Likewise.
320 (VEX_C5_TABLE): Likewise.
321 (VEX_LEN_TABLE): Likewise.
322 (REG_VEX_XX): Likewise.
323 (MOD_VEX_XXX): Likewise.
324 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
325 (PREFIX_0F3A44): Likewise.
326 (PREFIX_0F3ADF): Likewise.
327 (PREFIX_VEX_XXX): Likewise.
329 (VEX_OF38): Likewise.
330 (VEX_OF3A): Likewise.
331 (VEX_LEN_XXX): Likewise.
333 (need_vex): Likewise.
334 (need_vex_reg): Likewise.
335 (vex_i4_done): Likewise.
336 (vex_table): Likewise.
337 (vex_len_table): Likewise.
338 (OP_REG_VexI4): Likewise.
339 (vex_cmp_op): Likewise.
340 (pclmul_op): Likewise.
341 (vpermil2_op): Likewise.
344 (PREFIX_0F38F0): Likewise.
345 (PREFIX_0F3A60): Likewise.
346 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
347 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
348 and PREFIX_VEX_XXX entries.
349 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
350 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
352 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
353 Add MOD_VEX_XXX entries.
354 (ckprefix): Initialize rex_original and rex_ignored. Store the
355 REX byte in rex_original.
356 (get_valid_dis386): Handle the implicit prefix in VEX prefix
357 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
358 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
359 calling get_valid_dis386. Use rex_original and rex_ignored when
361 (putop): Handle "XY".
362 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
364 (OP_E_extended): Updated to use OP_E_register and
366 (OP_XMM): Handle VEX.
368 (XMM_Fixup): Likewise.
369 (CMP_Fixup): Use ARRAY_SIZE.
371 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
372 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
373 (operand_type_init): Add OPERAND_TYPE_REGYMM and
374 OPERAND_TYPE_VEX_IMM4.
375 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
376 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
377 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
378 VexImmExt and SSE2AVX.
379 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
381 * i386-opc.h (CpuAVX): New.
383 (CpuCLMUL): Likewise.
394 (Vex3Sources): Likewise.
395 (VexImmExt): Likewise.
399 (Vex_Imm4): Likewise.
400 (Implicit1stXmm0): Likewise.
403 (ByteOkIntel): Likewise.
406 (Unspecified): Likewise.
408 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
409 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
410 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
411 vex3sources, veximmext and sse2avx.
412 (i386_operand_type): Add regymm, ymmword and vex_imm4.
414 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
416 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
418 * i386-init.h: Regenerated.
419 * i386-tbl.h: Likewise.
421 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
423 From Robin Getz <robin.getz@analog.com>
424 * bfin-dis.c (bu32): Typedef.
425 (enum const_forms_t): Add c_uimm32 and c_huimm32.
426 (constant_formats[]): Add uimm32 and huimm16.
431 (luimm16_val): Define.
432 (struct saved_state): Define.
433 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
434 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
435 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
437 (decode_LDIMMhalf_0): Print out the whole register value.
439 From Jie Zhang <jie.zhang@analog.com>
440 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
441 multiply and multiply-accumulate to data register instruction.
443 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
444 c_imm32, c_huimm32e): Define.
445 (constant_formats): Add flags for printing decimal, leading spaces, and
447 (comment, parallel): Add global flags in all disassembly.
448 (fmtconst): Take advantage of new flags, and print default in hex.
449 (fmtconst_val): Likewise.
450 (decode_macfunc): Be consistant with spaces, tabs, comments,
451 capitalization in disassembly, fix minor coding style issues.
452 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
453 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
454 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
455 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
456 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
457 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
458 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
459 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
460 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
461 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
462 _print_insn_bfin, print_insn_bfin): Likewise.
464 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
466 * aclocal.m4: Regenerate.
467 * configure: Likewise.
468 * Makefile.in: Likewise.
470 2008-03-13 Alan Modra <amodra@bigpond.net.au>
472 * Makefile.am: Run "make dep-am".
473 * Makefile.in: Regenerate.
474 * configure: Regenerate.
476 2008-03-07 Alan Modra <amodra@bigpond.net.au>
478 * ppc-opc.c (powerpc_opcodes): Order and format.
480 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
482 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
483 * i386-tbl.h: Regenerated.
485 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
487 * i386-opc.tbl: Disallow 16-bit near indirect branches for
489 * i386-tbl.h: Regenerated.
491 2008-02-21 Jan Beulich <jbeulich@novell.com>
493 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
494 and Fword for far indirect jmp. Allow Reg16 and Word for near
495 indirect jmp on x86-64. Disallow Fword for lcall.
496 * i386-tbl.h: Re-generate.
498 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
500 * cr16-opc.c (cr16_num_optab): Defined
502 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
504 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
505 * i386-init.h: Regenerated.
507 2008-02-14 Nick Clifton <nickc@redhat.com>
510 * configure.in (SHARED_LIBADD): Select the correct host specific
511 file extension for shared libraries.
512 * configure: Regenerate.
514 2008-02-13 Jan Beulich <jbeulich@novell.com>
516 * i386-opc.h (RegFlat): New.
517 * i386-reg.tbl (flat): Add.
518 * i386-tbl.h: Re-generate.
520 2008-02-13 Jan Beulich <jbeulich@novell.com>
522 * i386-dis.c (a_mode): New.
523 (cond_jump_mode): Adjust.
524 (Ma): Change to a_mode.
525 (intel_operand_size): Handle a_mode.
526 * i386-opc.tbl: Allow Dword and Qword for bound.
527 * i386-tbl.h: Re-generate.
529 2008-02-13 Jan Beulich <jbeulich@novell.com>
531 * i386-gen.c (process_i386_registers): Process new fields.
532 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
533 unsigned char. Add dw2_regnum and Dw2Inval.
534 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
536 * i386-tbl.h: Re-generate.
538 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
540 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
541 * i386-init.h: Updated.
543 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
545 * i386-gen.c (cpu_flags): Add CpuXsave.
547 * i386-opc.h (CpuXsave): New.
549 (i386_cpu_flags): Add cpuxsave.
551 * i386-dis.c (MOD_0FAE_REG_4): New.
552 (RM_0F01_REG_2): Likewise.
553 (MOD_0FAE_REG_5): Updated.
554 (RM_0F01_REG_3): Likewise.
555 (reg_table): Use MOD_0FAE_REG_4.
556 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
558 (rm_table): Add RM_0F01_REG_2.
560 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
561 * i386-init.h: Regenerated.
562 * i386-tbl.h: Likewise.
564 2008-02-11 Jan Beulich <jbeulich@novell.com>
566 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
567 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
568 * i386-tbl.h: Re-generate.
570 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
573 * configure: Regenerated.
575 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
577 * mips-dis.c: Update copyright.
578 (mips_arch_choices): Add Octeon.
579 * mips-opc.c: Update copyright.
581 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
583 2008-01-29 Alan Modra <amodra@bigpond.net.au>
585 * ppc-opc.c: Support optional L form mtmsr.
587 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
589 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
591 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
593 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
594 * i386-init.h: Regenerated.
596 2008-01-23 Tristan Gingold <gingold@adacore.com>
598 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
599 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
601 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
603 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
604 (cpu_flags): Likewise.
606 * i386-opc.h (CpuMMX2): Removed.
609 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
610 * i386-init.h: Regenerated.
611 * i386-tbl.h: Likewise.
613 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
615 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
617 * i386-init.h: Regenerated.
619 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
621 * i386-opc.tbl: Use Qword on movddup.
622 * i386-tbl.h: Regenerated.
624 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
626 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
627 * i386-tbl.h: Regenerated.
629 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
631 * i386-dis.c (Mx): New.
632 (PREFIX_0FC3): Likewise.
633 (PREFIX_0FC7_REG_6): Updated.
634 (dis386_twobyte): Use PREFIX_0FC3.
635 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
636 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
639 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
641 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
642 (operand_types): Add Mem.
644 * i386-opc.h (IntelSyntax): New.
645 * i386-opc.h (Mem): New.
647 (Opcode_Modifier_Max): Updated.
648 (i386_opcode_modifier): Add intelsyntax.
649 (i386_operand_type): Add mem.
651 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
654 * i386-reg.tbl: Add size for accumulator.
656 * i386-init.h: Regenerated.
657 * i386-tbl.h: Likewise.
659 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
661 * i386-opc.h (Byte): Fix a typo.
663 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
666 * i386-gen.c (operand_type_init): Add Dword to
667 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
668 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
670 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
671 Xmmword, Unspecified and Anysize.
672 (set_bitfield): Make Mmword an alias of Qword. Make Oword
675 * i386-opc.h (CheckSize): Removed.
683 (i386_opcode_modifier): Remove checksize, byte, word, dword,
687 (Unspecified): Likewise.
689 (i386_operand_type): Add byte, word, dword, fword, qword,
690 tbyte xmmword, unspecified and anysize.
692 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
693 Tbyte, Xmmword, Unspecified and Anysize.
695 * i386-reg.tbl: Add size for accumulator.
697 * i386-init.h: Regenerated.
698 * i386-tbl.h: Likewise.
700 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
702 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
704 (reg_table): Updated.
705 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
706 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
708 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
710 * i386-gen.c (set_bitfield): Use fail () on error.
712 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
714 * i386-gen.c (lineno): New.
715 (filename): Likewise.
716 (set_bitfield): Report filename and line numer on error.
717 (process_i386_opcodes): Set filename and update lineno.
718 (process_i386_registers): Likewise.
720 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
722 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
725 * i386-opc.h (IntelMnemonic): Renamed to ..
727 (Opcode_Modifier_Max): Updated.
728 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
731 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
732 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
733 * i386-tbl.h: Regenerated.
735 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
737 * i386-gen.c: Update copyright to 2008.
738 * i386-opc.h: Likewise.
739 * i386-opc.tbl: Likewise.
741 * i386-init.h: Regenerated.
742 * i386-tbl.h: Likewise.
744 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
746 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
747 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
748 * i386-tbl.h: Regenerated.
750 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
752 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
754 (cpu_flags): Likewise.
756 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
757 (CpuSSE4_2_Or_ABM): Likewise.
759 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
761 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
762 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
763 and CpuPadLock, respectively.
764 * i386-init.h: Regenerated.
765 * i386-tbl.h: Likewise.
767 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
769 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
771 * i386-opc.h (No_xSuf): Removed.
772 (CheckSize): Updated.
774 * i386-tbl.h: Regenerated.
776 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
778 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
779 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
781 (cpu_flags): Add CpuSSE4_2_Or_ABM.
783 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
785 (i386_cpu_flags): Add cpusse4_2_or_abm.
787 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
788 CpuABM|CpuSSE4_2 on popcnt.
789 * i386-init.h: Regenerated.
790 * i386-tbl.h: Likewise.
792 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
794 * i386-opc.h: Update comments.
796 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
798 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
799 * i386-opc.h: Likewise.
800 * i386-opc.tbl: Likewise.
802 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
805 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
806 Byte, Word, Dword, QWord and Xmmword.
808 * i386-opc.h (No_xSuf): New.
809 (CheckSize): Likewise.
816 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
817 Dword, QWord and Xmmword.
819 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
821 * i386-tbl.h: Regenerated.
823 2008-01-02 Mark Kettenis <kettenis@gnu.org>
825 * m88k-dis.c (instructions): Fix fcvt.* instructions.
828 For older changes see ChangeLog-2007
834 version-control: never