opcodes/ChangeLog

   1 2010-09-22  Robin Getz  <robin.getz@analog.com>
   2
   3         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
   4         Reject P6/P7 to TESTSET.
   5         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
   6         SP onto the stack.
   7         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
   8         P/D fields match all the time.
   9         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
  10         are 0 for accumulator compares.
  11         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
  12         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
  13         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
  14         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  15         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  16         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
  17         insns.
  18         (decode_dagMODim_0): Verify br field for IREG ops.
  19         (decode_LDST_0): Reject preg load into same preg.
  20         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
  21         (print_insn_bfin): Likewise.
  22
  23 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  24
  25         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
  26
  27 2010-09-22  Robin Getz  <robin.getz@analog.com>
  28
  29         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
  30
  31 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
  34
  35 2010-09-22  Robin Getz  <robin.getz@analog.com>
  36
  37         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
  38         register values greater than 8.
  39         (IS_RESERVEDREG, allreg, mostreg): New helpers.
  40         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
  41         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
  42         (decode_CC2dreg_0): Check valid CC register number.
  43
  44 2010-09-22  Robin Getz  <robin.getz@analog.com>
  45
  46         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  47
  48 2010-09-22  Robin Getz  <robin.getz@analog.com>
  49
  50         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
  51         (reg_names): Likewise.
  52         (decode_statbits): Likewise; while reformatting to make manageable.
  53
  54 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  55
  56         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  57         (decode_pseudoOChar_0): New function.
  58         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  59
  60 2010-09-22  Robin Getz  <robin.getz@analog.com>
  61
  62         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  63         LSHIFT instead of SHIFT.
  64
  65 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * bfin-dis.c (constant_formats): Constify the whole structure.
  68         (fmtconst): Add const to return value.
  69         (reg_names): Mark const.
  70         (decode_multfunc): Mark s0/s1 as const.
  71         (decode_macfunc): Mark a/sop as const.
  72
  73 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  74
  75         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  76
  77 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  78
  79         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  80         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  81
  82 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  83
  84         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  85         dlx_insn_type array.
  86
  87 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  88
  89         PR binutils/11960
  90         * i386-dis.c (sIv): New.
  91         (dis386): Replace Iq with sIv on "pushT".
  92         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  93         (x86_64_table): Replace {T|}/{P|} with P.
  94         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  95         (OP_sI): Update v_mode.  Remove w_mode.
  96
  97 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  98
  99         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 100         on E500 and E500MC.
 101
 102 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 103
 104         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 105         prefetchw.
 106
 107 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 108
 109         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 110         to processor flags for PENTIUMPRO processors and later.
 111         * i386-opc.h (enum): Add CpuNop.
 112         (i386_cpu_flags): Add cpunop bit.
 113         * i386-opc.tbl: Change nop cpu_flags.
 114         * i386-init.h: Regenerated.
 115         * i386-tbl.h: Likewise.
 116
 117 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 118
 119         * i386-opc.h (enum): Fix typos in comments.
 120
 121 2010-08-06  Alan Modra  <amodra@gmail.com>
 122
 123         * disassemble.c: Formatting.
 124         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 125
 126 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 127
 128         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 129         * i386-tbl.h: Regenerated.
 130
 131 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 132
 133         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 134
 135         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 136         * i386-tbl.h: Regenerated.
 137
 138 2010-07-29  DJ Delorie  <dj@redhat.com>
 139
 140         * rx-decode.opc (SRR): New.
 141         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 142         r0,r0) and NOP3 (max r0,r0) special cases.
 143         * rx-decode.c: Regenerate.
 144
 145 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 146
 147         * i386-dis.c: Add 0F to VEX opcode enums.
 148
 149 2010-07-27  DJ Delorie  <dj@redhat.com>
 150
 151         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 152         (rx_decode_opcode): Likewise.
 153         * rx-decode.c: Regenerate.
 154
 155 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 156             Ina Pandit  <ina.pandit@kpitcummins.com>
 157
 158         * v850-dis.c (v850_sreg_names): Updated structure for system
 159         registers.
 160         (float_cc_names): new structure for condition codes.
 161         (print_value): Update the function that prints value.
 162         (get_operand_value): New function to get the operand value.
 163         (disassemble): Updated to handle the disassembly of instructions.
 164         (print_insn_v850): Updated function to print instruction for different
 165         families.
 166         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 167         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 168         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 169         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 170         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 171         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 172         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 173         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 174         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 175         (v850_operands): Update with the relocation name. Also update
 176         the instructions with specific set of processors.
 177
 178 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 179
 180         * arm-dis.c (print_insn_arm): Add cases for printing more
 181         symbolic operands.
 182         (print_insn_thumb32): Likewise.
 183
 184 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 185
 186         * mips-dis.c (print_insn_mips): Correct branch instruction type
 187         determination.
 188
 189 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 190
 191         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 192         type and delay slot determination.
 193         (print_insn_mips16): Extend branch instruction type and delay
 194         slot determination to cover all instructions.
 195         * mips16-opc.c (BR): Remove macro.
 196         (UBR, CBR): New macros.
 197         (mips16_opcodes): Update branch annotation for "b", "beqz",
 198         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 199         and "jrc".
 200
 201 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 202
 203         AVX Programming Reference (June, 2010)
 204         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 205         * i386-opc.tbl: Likewise.
 206         * i386-tbl.h: Regenerated.
 207
 208 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 209
 210         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 211
 212 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 213
 214         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 215         ppc_cpu_t before inverting.
 216         (ppc_parse_cpu): Likewise.
 217         (print_insn_powerpc): Likewise.
 218
 219 2010-07-03  Alan Modra  <amodra@gmail.com>
 220
 221         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 222         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 223         (PPC64, MFDEC2): Update.
 224         (NON32, NO371): Define.
 225         (powerpc_opcode): Update to not use old opcode flags, and avoid
 226         -m601 duplicates.
 227
 228 2010-07-03  DJ Delorie  <dj@delorie.com>
 229
 230         * m32c-ibld.c: Regenerate.
 231
 232 2010-07-03  Alan Modra  <amodra@gmail.com>
 233
 234         * ppc-opc.c (PWR2COM): Define.
 235         (PPCPWR2): Add PPC_OPCODE_COMMON.
 236         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 237         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 238         "rac" from -mcom.
 239
 240 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         AVX Programming Reference (June, 2010)
 243         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 244         (PREFIX_0FAE_REG_1): Likewise.
 245         (PREFIX_0FAE_REG_2): Likewise.
 246         (PREFIX_0FAE_REG_3): Likewise.
 247         (PREFIX_VEX_3813): Likewise.
 248         (PREFIX_VEX_3A1D): Likewise.
 249         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 250         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 251         PREFIX_VEX_3A1D.
 252         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 253         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 254         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 255
 256         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 257         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 258         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 259
 260         * i386-opc.h (CpuXsaveopt): New.
 261         (CpuFSGSBase): Likewise.
 262         (CpuRdRnd): Likewise.
 263         (CpuF16C): Likewise.
 264         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 265         cpuf16c.
 266
 267         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 268         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 269         * i386-init.h: Regenerated.
 270         * i386-tbl.h: Likewise.
 271
 272 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 273
 274         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 275         and mtocrf on EFS.
 276
 277 2010-06-29  Alan Modra  <amodra@gmail.com>
 278
 279         * maxq-dis.c: Delete file.
 280         * Makefile.am: Remove references to maxq.
 281         * configure.in: Likewise.
 282         * disassemble.c: Likewise.
 283         * Makefile.in: Regenerate.
 284         * configure: Regenerate.
 285         * po/POTFILES.in: Regenerate.
 286
 287 2010-06-29  Alan Modra  <amodra@gmail.com>
 288
 289         * mep-dis.c: Regenerate.
 290
 291 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 292
 293         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 294
 295 2010-06-27  Alan Modra  <amodra@gmail.com>
 296
 297         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 298         (decodeInstr): Likewise.
 299         * dlx-dis.c (print_insn_dlx): Likewise.
 300         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 301         * maxq-dis.c (check_move, print_insn): Likewise.
 302         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 303         * msp430-dis.c (msp430_branchinstr): Likewise.
 304         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 305         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 306         * sparc-dis.c (print_insn_sparc): Likewise.
 307         * fr30-asm.c: Regenerate.
 308         * frv-asm.c: Regenerate.
 309         * ip2k-asm.c: Regenerate.
 310         * iq2000-asm.c: Regenerate.
 311         * lm32-asm.c: Regenerate.
 312         * m32c-asm.c: Regenerate.
 313         * m32r-asm.c: Regenerate.
 314         * mep-asm.c: Regenerate.
 315         * mt-asm.c: Regenerate.
 316         * openrisc-asm.c: Regenerate.
 317         * xc16x-asm.c: Regenerate.
 318         * xstormy16-asm.c: Regenerate.
 319
 320 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 321
 322         PR gas/11673
 323         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 324
 325 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 326
 327         PR binutils/11676
 328         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 329
 330 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 331
 332         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 333         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 334         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 335         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 336         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 337         Treat lwsync as msync on e500.
 338
 339 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 340
 341         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 342
 343 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 344
 345         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 346         constants is the same on 32-bit and 64-bit hosts.
 347
 348 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 349
 350         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 351         .short directives so that they can be reassembled.
 352
 353 2010-05-26  Catherine Moore <clm@codesourcery.com>
 354             David Ung  <davidu@mips.com>
 355
 356         * mips-opc.c: Change membership to I1 for instructions ssnop and
 357         ehb.
 358
 359 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 360
 361         * i386-dis.c (sib): New.
 362         (get_sib): Likewise.
 363         (print_insn): Call get_sib.
 364         OP_E_memory): Use sib.
 365
 366 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 367
 368         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 369         * mips-opc.c (I16): Remove.
 370         (mips_builtin_op): Reclassify jalx.
 371
 372 2010-05-19  Alan Modra  <amodra@gmail.com>
 373
 374         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 375         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 376
 377 2010-05-13  Alan Modra  <amodra@gmail.com>
 378
 379         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 380
 381 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 382
 383         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 384         format.
 385         (print_insn_thumb16): Add support for new %W format.
 386
 387 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 388
 389         * Makefile.in: Regenerate with automake 1.11.1.
 390         * aclocal.m4: Ditto.
 391
 392 2010-05-05  Nick Clifton  <nickc@redhat.com>
 393
 394         * po/es.po: Updated Spanish translation.
 395
 396 2010-04-22  Nick Clifton  <nickc@redhat.com>
 397
 398         * po/opcodes.pot: Updated by the Translation project.
 399         * po/vi.po: Updated Vietnamese translation.
 400
 401 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 402
 403         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 404         bits in opcode.
 405
 406 2010-04-09  Nick Clifton  <nickc@redhat.com>
 407
 408         * i386-dis.c (print_insn): Remove unused variable op.
 409         (OP_sI): Remove unused variable mask.
 410
 411 2010-04-07  Alan Modra  <amodra@gmail.com>
 412
 413         * configure: Regenerate.
 414
 415 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 416
 417         * ppc-opc.c (RBOPT): New define.
 418         ("dccci"): Enable for PPCA2.  Make operands optional.
 419         ("iccci"): Likewise.  Do not deprecate for PPC476.
 420
 421 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 422
 423         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 424
 425 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 426
 427         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 428         * Makefile.in: Regenerate.
 429         * configure.in (bfd_tic6x_arch): New.
 430         * configure: Regenerate.
 431         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 432         (disassembler): Handle TI C6X.
 433         * tic6x-dis.c: New.
 434
 435 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 436
 437         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 438
 439 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 440
 441         * dis-buf.c (buffer_read_memory): Give error for reading just
 442         before the start of memory.
 443
 444 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 445             Quentin Neill <quentin.neill@amd.com>
 446
 447         * i386-dis.c (OP_LWP_I): Removed.
 448         (reg_table): Do not use OP_LWP_I, use Iq.
 449         (OP_LWPCB_E): Remove use of names16.
 450         (OP_LWP_E): Same.
 451         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 452         should not set the Vex.length bit.
 453         * i386-tbl.h: Regenerated.
 454
 455 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 456
 457         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 458
 459 2010-02-24  Nick Clifton  <nickc@redhat.com>
 460
 461         PR binutils/6773
 462         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 463         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 464         (thumb32_opcodes): Likewise.
 465
 466 2010-02-15  Nick Clifton  <nickc@redhat.com>
 467
 468         * po/vi.po: Updated Vietnamese translation.
 469
 470 2010-02-12  Doug Evans  <dje@sebabeach.org>
 471
 472         * lm32-opinst.c: Regenerate.
 473
 474 2010-02-11  Doug Evans  <dje@sebabeach.org>
 475
 476         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 477         (print_address): Delete CGEN_PRINT_ADDRESS.
 478         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 479         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 480         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 481         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 482
 483         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 484         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 485         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 486         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 487         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 488         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 489         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 490         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 491         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 492         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 493         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 494         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 495
 496 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 497
 498         * i386-dis.c: Update copyright.
 499         * i386-gen.c: Likewise.
 500         * i386-opc.h: Likewise.
 501         * i386-opc.tbl: Likewise.
 502
 503 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 504             Sebastian Pop  <sebastian.pop@amd.com>
 505
 506         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 507         function to handle 5th imm8 operand.
 508         (PREFIX_VEX_3A48): Added.
 509         (PREFIX_VEX_3A49): Added.
 510         (VEX_W_3A48_P_2): Added.
 511         (VEX_W_3A49_P_2): Added.
 512         (prefix table): Added entries for PREFIX_VEX_3A48
 513         and PREFIX_VEX_3A49.
 514         (vex table): Added entries for VEX_W_3A48_P_2 and
 515         and VEX_W_3A49_P_2.
 516         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 517         for Vec_Imm4 operands.
 518         * i386-opc.h (enum): Added Vec_Imm4.
 519         (i386_operand_type): Added vec_imm4.
 520         * i386-opc.tbl: Add entries for vpermilp[ds].
 521         * i386-init.h: Regenerated.
 522         * i386-tbl.h: Regenerated.
 523
 524 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 525
 526         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 527         and "pwr7".  Move "a2" into alphabetical order.
 528
 529 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 530
 531         * ppc-dis.c (ppc_opts): Add titan entry.
 532         * ppc-opc.c (TITAN, MULHW): Define.
 533         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 534
 535 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 536
 537         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 538         to CPU_BDVER1_FLAGS
 539         * i386-init.h: Regenerated.
 540
 541 2010-02-03  Anthony Green  <green@moxielogic.com>
 542
 543         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 544         0x0f, and make 0x00 an illegal instruction.
 545
 546 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 547
 548         * opcodes/arm-dis.c (struct arm_private_data): New.
 549         (print_insn_coprocessor, print_insn_arm): Update to use struct
 550         arm_private_data.
 551         (is_mapping_symbol, get_map_sym_type): New functions.
 552         (get_sym_code_type): Check the symbol's section.  Do not check
 553         mapping symbols.
 554         (print_insn): Default to disassembling ARM mode code.  Check
 555         for mapping symbols separately from other symbols.  Use
 556         struct arm_private_data.
 557
 558 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 559
 560         * i386-dis.c (EXVexWdqScalar): New.
 561         (vex_scalar_w_dq_mode): Likewise.
 562         (prefix_table): Update entries for PREFIX_VEX_3899,
 563         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 564         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 565         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 566         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 567         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 568         (OP_EX): Likewise.
 569
 570 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 571
 572         * i386-dis.c (XMScalar): New.
 573         (EXdScalar): Likewise.
 574         (EXqScalar): Likewise.
 575         (EXqScalarS): Likewise.
 576         (VexScalar): Likewise.
 577         (EXdVexScalarS): Likewise.
 578         (EXqVexScalarS): Likewise.
 579         (XMVexScalar): Likewise.
 580         (scalar_mode): Likewise.
 581         (d_scalar_mode): Likewise.
 582         (d_scalar_swap_mode): Likewise.
 583         (q_scalar_mode): Likewise.
 584         (q_scalar_swap_mode): Likewise.
 585         (vex_scalar_mode): Likewise.
 586         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 587         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 588         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 589         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 590         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 591         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 592         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 593         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 594         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 595         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 596         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 597         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 598         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 599         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 600         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 601         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 602         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 603         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 604         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 605         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 606         q_scalar_mode, q_scalar_swap_mode.
 607         (OP_XMM): Handle scalar_mode.
 608         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 609         and q_scalar_swap_mode.
 610         (OP_VEX): Handle vex_scalar_mode.
 611
 612 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 613
 614         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 615
 616 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 617
 618         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 619
 620 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 621
 622         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 623
 624 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 625
 626         * i386-dis.c (Bad_Opcode): New.
 627         (bad_opcode): Likewise.
 628         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 629         (dis386_twobyte): Likewise.
 630         (reg_table): Likewise.
 631         (prefix_table): Likewise.
 632         (x86_64_table): Likewise.
 633         (vex_len_table): Likewise.
 634         (vex_w_table): Likewise.
 635         (mod_table): Likewise.
 636         (rm_table): Likewise.
 637         (float_reg): Likewise.
 638         (reg_table): Remove trailing "(bad)" entries.
 639         (prefix_table): Likewise.
 640         (x86_64_table): Likewise.
 641         (vex_len_table): Likewise.
 642         (vex_w_table): Likewise.
 643         (mod_table): Likewise.
 644         (rm_table): Likewise.
 645         (get_valid_dis386): Handle bytemode 0.
 646
 647 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 648
 649         * i386-opc.h (VEXScalar): New.
 650
 651         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 652         instructions.
 653         * i386-tbl.h: Regenerated.
 654
 655 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 656
 657         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 658
 659         * i386-opc.tbl: Add xsave64 and xrstor64.
 660         * i386-tbl.h: Regenerated.
 661
 662 2010-01-20  Nick Clifton  <nickc@redhat.com>
 663
 664         PR 11170
 665         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 666         based post-indexed addressing.
 667
 668 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 669
 670         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 671         * i386-tbl.h: Regenerated.
 672
 673 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 674
 675         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 676         comments.
 677
 678 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 679
 680         * i386-dis.c (names_mm): New.
 681         (intel_names_mm): Likewise.
 682         (att_names_mm): Likewise.
 683         (names_xmm): Likewise.
 684         (intel_names_xmm): Likewise.
 685         (att_names_xmm): Likewise.
 686         (names_ymm): Likewise.
 687         (intel_names_ymm): Likewise.
 688         (att_names_ymm): Likewise.
 689         (print_insn): Set names_mm, names_xmm and names_ymm.
 690         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 691         (OP_XMM): Likewise.
 692         (OP_EM): Likewise.
 693         (OP_EMC): Likewise.
 694         (OP_MXC): Likewise.
 695         (OP_EX): Likewise.
 696         (XMM_Fixup): Likewise.
 697         (OP_VEX): Likewise.
 698         (OP_EX_VexReg): Likewise.
 699         (OP_Vex_2src): Likewise.
 700         (OP_Vex_2src_1): Likewise.
 701         (OP_Vex_2src_2): Likewise.
 702         (OP_REG_VexI4): Likewise.
 703
 704 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 705
 706         * i386-dis.c (print_insn): Update comments.
 707
 708 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 709
 710         * i386-dis.c (rex_original): Removed.
 711         (ckprefix): Remove rex_original.
 712         (print_insn): Update comments.
 713
 714 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 715
 716         * Makefile.in: Regenerate.
 717         * configure: Regenerate.
 718
 719 2010-01-07  Doug Evans  <dje@sebabeach.org>
 720
 721         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 722         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 723         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 724         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 725         * xstormy16-ibld.c: Regenerate.
 726
 727 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 728
 729         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 730         * i386-init.h: Regenerated.
 731
 732 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 733
 734         * arm-dis.c (print_insn): Fixed search for next symbol and data
 735         dumping condition, and the initial mapping symbol state.
 736
 737 2010-01-05  Doug Evans  <dje@sebabeach.org>
 738
 739         * cgen-ibld.in: #include "cgen/basic-modes.h".
 740         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 741         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 742         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 743         * xstormy16-ibld.c: Regenerate.
 744
 745 2010-01-04  Nick Clifton  <nickc@redhat.com>
 746
 747         PR 11123
 748         * arm-dis.c (print_insn_coprocessor): Initialise value.
 749
 750 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 751
 752         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 753
 754 2010-01-02  Doug Evans  <dje@sebabeach.org>
 755
 756         * cgen-asm.in: Update copyright year.
 757         * cgen-dis.in: Update copyright year.
 758         * cgen-ibld.in: Update copyright year.
 759         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 760         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 761         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 762         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 763         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 764         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 765         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 766         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 767         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 768         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 769         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 770         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 771         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 772         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 773         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 774         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 775         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 776         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 777         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 778         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 779         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 780
 781 For older changes see ChangeLog-2009
 782 \f
 783 Local Variables:
 784 mode: change-log
 785 left-margin: 8
 786 fill-column: 74
 787 version-control: never
 788 End: