opcodes/ChangeLog

   1 2008-11-28  Joshua Kinard  <kumba@gentoo.org>
   2
   3         * mips-dis.c (mips_arch_choices): Add r14000, r16000.
   4
   5 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
   6
   7         * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
   8         adjusted the mask for 32-bit branch instruction.
   9
  10 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
  11
  12         * ppc-opc.c (extract_sprg): Correct operand range check.
  13
  14 2008-11-26  Andreas Schwab  <schwab@suse.de>
  15
  16         * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
  17         (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
  18         (save_printer, save_print_address): Remove.
  19         (fetch_data): Don't use them.
  20         (match_insn_m68k): Always restore printing functions.
  21         (print_insn_m68k): Don't save/restore printing functions.
  22
  23 2008-11-25  Nick Clifton  <nickc@redhat.com>
  24
  25         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
  26
  27 2008-11-18  Catherine Moore  <clm@codesourcery.com>
  28
  29         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
  30         instructions.
  31         (neon_opcodes): Likewise.
  32         (print_insn_coprocessor): Print 't' or 'b' for vcvt
  33         instructions.
  34
  35 2008-11-14  Tristan Gingold  <gingold@adacore.com>
  36
  37         * makefile.vms (OBJS): Update list of objects.
  38         (DEFS): Update
  39         (CFLAGS): Update.
  40
  41 2008-11-06  Chao-ying Fu  <fu@mips.com>
  42
  43         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
  44         before sync.
  45         (sync): New instruction with 5-bit sync type.
  46         * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
  47
  48 2008-11-06  Nick Clifton  <nickc@redhat.com>
  49
  50         * avr-dis.c: Replace uses of sprintf without a format string with
  51         calls to strcpy.
  52
  53 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
  54
  55         * i386-opc.tbl: Add cmovpe and cmovpo.
  56         * i386-tbl.h: Regenerated.
  57
  58 2008-10-22  Nick Clifton  <nickc@redhat.com>
  59
  60         PR 6937
  61         * configure.in (SHARED_LIBADD): Revert previous change.
  62         Add a comment explaining why.
  63         (SHARED_DEPENDENCIES): Revert previous change.
  64         * configure: Regenerate.
  65
  66 2008-10-10  Nick Clifton  <nickc@redhat.com>
  67
  68         PR 6937
  69         * configure.in (SHARED_LIBADD): Add libiberty.a.
  70         (SHARED_DEPENDENCIES): Add libiberty.a.
  71
  72 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  73
  74         * i386-gen.c: Include "hashtab.h".
  75         (next_field): Take a new argument, last.  Check last.
  76         (process_i386_cpu_flag): Updated.
  77         (process_i386_opcode_modifier): Likewise.
  78         (process_i386_operand_type): Likewise.
  79         (process_i386_registers): Likewise.
  80         (output_i386_opcode): New.
  81         (opcode_hash_entry): Likewise.
  82         (opcode_hash_table): Likewise.
  83         (opcode_hash_hash): Likewise.
  84         (opcode_hash_eq): Likewise.
  85         (process_i386_opcodes): Use opcode hash table and opcode array.
  86
  87 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  88
  89         * s390-opc.txt (stdy, stey): Fix description
  90
  91 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
  92
  93         * Makefile.am: Run "make dep-am".
  94         * Makefile.in: Regenerate.
  95
  96 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * aclocal.m4: Regenerated.
  99         * configure: Likewise.
 100         * Makefile.in: Likewise.
 101
 102 2008-09-29  Nick Clifton  <nickc@redhat.com>
 103
 104         * po/vi.po: Updated Vietnamese translation.
 105         * po/fr.po: Updated French translation.
 106
 107 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
 108
 109         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
 110         (cfxr, cfdr, cfer, clclu): Add esa flag.
 111         (sqd): Instruction added.
 112         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
 113         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
 114
 115 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
 116
 117         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
 118         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
 119
 120 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
 121
 122         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 123         * i386-tbl.h: Regenerated.
 124
 125 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 126
 127         * i386-dis.c (dis386): Adjust far return mnemonics.
 128         * i386-opc.tbl: Add retf.
 129         * i386-tbl.h: Re-generate.
 130
 131 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 132
 133         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 134
 135 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 136
 137         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 138         * ia64-gen.c (lookup_specifier): Likewise.
 139
 140         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 141         * ia64-raw.tbl: Likewise.
 142         * ia64-waw.tbl: Likewise.
 143         * ia64-asmtab.c: Regenerated.
 144
 145 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 146
 147         * i386-opc.tbl: Correct fidivr operand size.
 148
 149         * i386-tbl.h: Regenerated.
 150
 151 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 152
 153         * configure.in: Update a number of obsolete autoconf macros.
 154         * aclocal.m4: Regenerate.
 155
 156 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 157
 158         AVX Programming Reference (August, 2008)
 159         * i386-dis.c (PREFIX_VEX_38DB): New.
 160         (PREFIX_VEX_38DC): Likewise.
 161         (PREFIX_VEX_38DD): Likewise.
 162         (PREFIX_VEX_38DE): Likewise.
 163         (PREFIX_VEX_38DF): Likewise.
 164         (PREFIX_VEX_3ADF): Likewise.
 165         (VEX_LEN_38DB_P_2): Likewise.
 166         (VEX_LEN_38DC_P_2): Likewise.
 167         (VEX_LEN_38DD_P_2): Likewise.
 168         (VEX_LEN_38DE_P_2): Likewise.
 169         (VEX_LEN_38DF_P_2): Likewise.
 170         (VEX_LEN_3ADF_P_2): Likewise.
 171         (PREFIX_VEX_3A04): Updated.
 172         (VEX_LEN_3A06_P_2): Likewise.
 173         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 174         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 175         (x86_64_table): Likewise.
 176         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 177         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 178         VEX_LEN_3ADF_P_2.
 179
 180         * i386-opc.tbl: Add AES + AVX instructions.
 181         * i386-init.h: Regenerated.
 182         * i386-tbl.h: Likewise.
 183
 184 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 185
 186         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 187         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 188
 189 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 190
 191         PR 6526
 192         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 193         * Makefile.in: Regenerate.
 194         * aclocal.m4: Regenerate.
 195         * config.in: Regenerate.
 196         * configure: Regenerate.
 197
 198 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 199
 200         PR 6825
 201         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 202
 203 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 204
 205         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 206
 207         * i386-tbl.h: Regenerated.
 208
 209 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 210
 211         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 212         * Makefile.in: Regenerate.
 213         * po/POTFILES.in: Regenerate.
 214
 215 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 216
 217         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 218         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 219         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 220         * ppc-opc.c (insert_xt6): New static function.
 221         (extract_xt6): Likewise.
 222         (insert_xa6): Likewise.
 223         (extract_xa6: Likewise.
 224         (insert_xb6): Likewise.
 225         (extract_xb6): Likewise.
 226         (insert_xb6s): Likewise.
 227         (extract_xb6s): Likewise.
 228         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 229         XX3DM_MASK, PPCVSX): New.
 230         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 231         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 232
 233 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 234
 235         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 236         * Makefile.in: Regenerate.
 237
 238 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 239
 240         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 241         * i386-tbl.h: Regenerated.
 242
 243 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 244
 245         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 246         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 247         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 248         (powerpc_opcodes): Add Xilinx APU related opcodes.
 249
 250 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 251
 252         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 253
 254 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 255
 256         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 257
 258 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 259
 260         * mips-opc.c (CP): New macro.
 261         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 262         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 263         dmtc2 Octeon instructions.
 264
 265 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 266
 267         * dis-init.c (init_disassemble_info): Init endian_code field.
 268         * arm-dis.c (print_insn): Disassemble code according to
 269         setting of endian_code.
 270         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 271
 272 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 273
 274         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 275         for ELF symbols.
 276
 277 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 278
 279         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 280         (print_ppc_disassembler_options): Likewise.
 281         * ppc-opc.c (PPC464): Define.
 282         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 283
 284 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 285
 286         * configure: Regenerate.
 287
 288 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 289
 290         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 291         ppc_cpu_t typedef.
 292         (struct dis_private): New.
 293         (POWERPC_DIALECT): New define.
 294         (powerpc_dialect): Renamed to...
 295         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 296         struct dis_private.
 297         (print_insn_big_powerpc): Update for using structure in
 298         info->private_data.
 299         (print_insn_little_powerpc): Likewise.
 300         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 301         (skip_optional_operands): Likewise.
 302         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 303         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 304         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 305         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 306         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 307         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 308         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 309         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 310         param to be of type ppc_cpu_t.  Update prototype.
 311
 312 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 313
 314         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 315         +s, +S.
 316         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 317         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 318         syncw, syncws, vm3mulu, vm0 and vmulu.
 319
 320         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 321         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 322         seqi, sne and snei.
 323
 324 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 325
 326         * i386-opc.tbl: Add vmovd with 64bit operand.
 327         * i386-tbl.h: Regenerated.
 328
 329 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 330
 331         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 332
 333 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 334
 335         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 336         * i386-tbl.h: Regenerated.
 337
 338 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 339
 340         PR gas/6517
 341         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 342         into 32bit and 64bit.  Remove Reg64|Qword and add
 343         IgnoreSize|No_qSuf on 32bit version.
 344         * i386-tbl.h: Regenerated.
 345
 346 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 347
 348         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 349         * i386-tbl.h: Regenerated.
 350
 351 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 352
 353         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 354
 355 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 356
 357         * Makefile.am: Run "make dep-am".
 358         * Makefile.in: Regenerate.
 359
 360 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 361
 362         * i386-dis.c (MOVBE_Fixup): New.
 363         (Mo): Likewise.
 364         (PREFIX_0F3880): Likewise.
 365         (PREFIX_0F3881): Likewise.
 366         (PREFIX_0F38F0): Updated.
 367         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 368         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 369         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 370
 371         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 372         CPU_EPT_FLAGS.
 373         (cpu_flags): Add CpuMovbe and CpuEPT.
 374
 375         * i386-opc.h (CpuMovbe): New.
 376         (CpuEPT): Likewise.
 377         (CpuLM): Updated.
 378         (i386_cpu_flags): Add cpumovbe and cpuept.
 379
 380         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 381         * i386-init.h: Regenerated.
 382         * i386-tbl.h: Likewise.
 383
 384 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 385
 386         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 387         the two drem and the two dremu macros.
 388
 389 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 390
 391         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 392         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 393         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 394         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 395
 396 2008-04-25  David S. Miller  <davem@davemloft.net>
 397
 398         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 399         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 400
 401 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 402
 403         * aclocal.m4: Regenerate.
 404         * configure: Regenerate.
 405
 406 2008-04-23  David S. Miller  <davem@davemloft.net>
 407
 408         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 409         extended values.
 410         (prefetch_table): Add missing values.
 411
 412 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 413
 414         * i386-gen.c (opcode_modifiers): Add NoAVX.
 415
 416         * i386-opc.h (NoAVX): New.
 417         (OldGcc): Updated.
 418         (i386_opcode_modifier): Add noavx.
 419
 420         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 421         instructions which don't have AVX equivalent.
 422         * i386-tbl.h: Regenerated.
 423
 424 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 425
 426         * i386-dis.c (OP_VEX_FMA): New.
 427         (OP_EX_VexImmW): Likewise.
 428         (VexFMA): Likewise.
 429         (Vex128FMA): Likewise.
 430         (EXVexImmW): Likewise.
 431         (get_vex_imm8): Likewise.
 432         (OP_EX_VexReg): Likewise.
 433         (vex_i4_done): Renamed to ...
 434         (vex_w_done): This.
 435         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 436         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 437         FMA instructions.
 438         (print_insn): Updated.
 439         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 440         (OP_REG_VexI4): Check invalid high registers.
 441
 442 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 443             Michael Meissner  <michael.meissner@amd.com>
 444
 445         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 446         * i386-tbl.h: Regenerate from i386-opc.tbl.
 447
 448 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 449
 450         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 451         accept Power E500MC instructions.
 452         (print_ppc_disassembler_options): Document -Me500mc.
 453         * ppc-opc.c (DUIS, DUI, T): New.
 454         (XRT, XRTRA): Likewise.
 455         (E500MC): Likewise.
 456         (powerpc_opcodes): Add new Power E500MC instructions.
 457
 458 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 459
 460         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 461         (print_s390_disassembler_options): New function.
 462         * disassemble.c (disassembler_usage): Invoke
 463         print_s390_disassembler_options.
 464
 465 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 466
 467         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 468         of local variables used for mnemonic parsing: prefix, suffix and
 469         number.
 470
 471 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 472
 473         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 474         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 475         (s390_crb_extensions): New extensions table.
 476         (insertExpandedMnemonic): Handle '$' tag.
 477         * s390-opc.txt: Remove conditional jump variants which can now
 478         be expanded automatically.
 479         Replace '*' tag with '$' in the compare and branch instructions.
 480
 481 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 482
 483         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 484         (PREFIX_VEX_3AXX): Likewis.
 485
 486 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 487
 488         * i386-opc.tbl: Remove 4 extra blank lines.
 489
 490 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 491
 492         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 493         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 494         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 495         * i386-opc.tbl: Likewise.
 496
 497         * i386-opc.h (CpuCLMUL): Renamed to ...
 498         (CpuPCLMUL): This.
 499         (CpuFMA): Updated.
 500         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 501
 502         * i386-init.h: Regenerated.
 503
 504 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 505
 506         * i386-dis.c (OP_E_register): New.
 507         (OP_E_memory): Likewise.
 508         (OP_VEX): Likewise.
 509         (OP_EX_Vex): Likewise.
 510         (OP_EX_VexW): Likewise.
 511         (OP_XMM_Vex): Likewise.
 512         (OP_XMM_VexW): Likewise.
 513         (OP_REG_VexI4): Likewise.
 514         (PCLMUL_Fixup): Likewise.
 515         (VEXI4_Fixup): Likewise.
 516         (VZERO_Fixup): Likewise.
 517         (VCMP_Fixup): Likewise.
 518         (VPERMIL2_Fixup): Likewise.
 519         (rex_original): Likewise.
 520         (rex_ignored): Likewise.
 521         (Mxmm): Likewise.
 522         (XMM): Likewise.
 523         (EXxmm): Likewise.
 524         (EXxmmq): Likewise.
 525         (EXymmq): Likewise.
 526         (Vex): Likewise.
 527         (Vex128): Likewise.
 528         (Vex256): Likewise.
 529         (VexI4): Likewise.
 530         (EXdVex): Likewise.
 531         (EXqVex): Likewise.
 532         (EXVexW): Likewise.
 533         (EXdVexW): Likewise.
 534         (EXqVexW): Likewise.
 535         (XMVex): Likewise.
 536         (XMVexW): Likewise.
 537         (XMVexI4): Likewise.
 538         (PCLMUL): Likewise.
 539         (VZERO): Likewise.
 540         (VCMP): Likewise.
 541         (VPERMIL2): Likewise.
 542         (xmm_mode): Likewise.
 543         (xmmq_mode): Likewise.
 544         (ymmq_mode): Likewise.
 545         (vex_mode): Likewise.
 546         (vex128_mode): Likewise.
 547         (vex256_mode): Likewise.
 548         (USE_VEX_C4_TABLE): Likewise.
 549         (USE_VEX_C5_TABLE): Likewise.
 550         (USE_VEX_LEN_TABLE): Likewise.
 551         (VEX_C4_TABLE): Likewise.
 552         (VEX_C5_TABLE): Likewise.
 553         (VEX_LEN_TABLE): Likewise.
 554         (REG_VEX_XX): Likewise.
 555         (MOD_VEX_XXX): Likewise.
 556         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 557         (PREFIX_0F3A44): Likewise.
 558         (PREFIX_0F3ADF): Likewise.
 559         (PREFIX_VEX_XXX): Likewise.
 560         (VEX_OF): Likewise.
 561         (VEX_OF38): Likewise.
 562         (VEX_OF3A): Likewise.
 563         (VEX_LEN_XXX): Likewise.
 564         (vex): Likewise.
 565         (need_vex): Likewise.
 566         (need_vex_reg): Likewise.
 567         (vex_i4_done): Likewise.
 568         (vex_table): Likewise.
 569         (vex_len_table): Likewise.
 570         (OP_REG_VexI4): Likewise.
 571         (vex_cmp_op): Likewise.
 572         (pclmul_op): Likewise.
 573         (vpermil2_op): Likewise.
 574         (m_mode): Updated.
 575         (es_reg): Likewise.
 576         (PREFIX_0F38F0): Likewise.
 577         (PREFIX_0F3A60): Likewise.
 578         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 579         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 580         and PREFIX_VEX_XXX entries.
 581         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 582         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 583         PREFIX_0F3ADF.
 584         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 585         Add MOD_VEX_XXX entries.
 586         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 587         REX byte in rex_original.
 588         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 589         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 590         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 591         calling get_valid_dis386.  Use rex_original and rex_ignored when
 592         printing out REX.
 593         (putop): Handle "XY".
 594         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 595         ymmq_mode.
 596         (OP_E_extended): Updated to use OP_E_register and
 597         OP_E_memory.
 598         (OP_XMM): Handle VEX.
 599         (OP_EX): Likewise.
 600         (XMM_Fixup): Likewise.
 601         (CMP_Fixup): Use ARRAY_SIZE.
 602
 603         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 604         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 605         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 606         OPERAND_TYPE_VEX_IMM4.
 607         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 608         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 609         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 610         VexImmExt and SSE2AVX.
 611         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 612
 613         * i386-opc.h (CpuAVX): New.
 614         (CpuAES): Likewise.
 615         (CpuCLMUL): Likewise.
 616         (CpuFMA): Likewise.
 617         (Vex): Likewise.
 618         (Vex256): Likewise.
 619         (VexNDS): Likewise.
 620         (VexNDD): Likewise.
 621         (VexW0): Likewise.
 622         (VexW1): Likewise.
 623         (Vex0F): Likewise.
 624         (Vex0F38): Likewise.
 625         (Vex0F3A): Likewise.
 626         (Vex3Sources): Likewise.
 627         (VexImmExt): Likewise.
 628         (SSE2AVX): Likewise.
 629         (RegYMM): Likewise.
 630         (Ymmword): Likewise.
 631         (Vex_Imm4): Likewise.
 632         (Implicit1stXmm0): Likewise.
 633         (CpuXsave): Updated.
 634         (CpuLM): Likewise.
 635         (ByteOkIntel): Likewise.
 636         (OldGcc): Likewise.
 637         (Control): Likewise.
 638         (Unspecified): Likewise.
 639         (OTMax): Likewise.
 640         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 641         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 642         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 643         vex3sources, veximmext and sse2avx.
 644         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 645
 646         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 647
 648         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 649
 650         * i386-init.h: Regenerated.
 651         * i386-tbl.h: Likewise.
 652
 653 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 654
 655         From  Robin Getz  <robin.getz@analog.com>
 656         * bfin-dis.c (bu32): Typedef.
 657         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 658         (constant_formats[]): Add uimm32 and huimm16.
 659         (fmtconst_val): New.
 660         (uimm32): Define.
 661         (huimm32): Define.
 662         (imm16_val): Define.
 663         (luimm16_val): Define.
 664         (struct saved_state): Define.
 665         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 666         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 667         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 668         (get_allreg): New.
 669         (decode_LDIMMhalf_0): Print out the whole register value.
 670
 671         From Jie Zhang  <jie.zhang@analog.com>
 672         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 673         multiply and multiply-accumulate to data register instruction.
 674
 675         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 676         c_imm32, c_huimm32e): Define.
 677         (constant_formats): Add flags for printing decimal, leading spaces, and
 678         exact symbols.
 679         (comment, parallel): Add global flags in all disassembly.
 680         (fmtconst): Take advantage of new flags, and print default in hex.
 681         (fmtconst_val): Likewise.
 682         (decode_macfunc): Be consistant with spaces, tabs, comments,
 683         capitalization in disassembly, fix minor coding style issues.
 684         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 685         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 686         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 687         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 688         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 689         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 690         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 691         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 692         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 693         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 694         _print_insn_bfin, print_insn_bfin): Likewise.
 695
 696 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 697
 698         * aclocal.m4: Regenerate.
 699         * configure: Likewise.
 700         * Makefile.in: Likewise.
 701
 702 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 703
 704         * Makefile.am: Run "make dep-am".
 705         * Makefile.in: Regenerate.
 706         * configure: Regenerate.
 707
 708 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 709
 710         * ppc-opc.c (powerpc_opcodes): Order and format.
 711
 712 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 713
 714         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 715         * i386-tbl.h: Regenerated.
 716
 717 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 718
 719         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 720         x86-64.
 721         * i386-tbl.h: Regenerated.
 722
 723 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 724
 725         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 726         and Fword for far indirect jmp. Allow Reg16 and Word for near
 727         indirect jmp on x86-64. Disallow Fword for lcall.
 728         * i386-tbl.h: Re-generate.
 729
 730 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 731
 732         * cr16-opc.c  (cr16_num_optab): Defined
 733
 734 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 735
 736         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 737         * i386-init.h: Regenerated.
 738
 739 2008-02-14  Nick Clifton  <nickc@redhat.com>
 740
 741         PR binutils/5524
 742         * configure.in (SHARED_LIBADD): Select the correct host specific
 743         file extension for shared libraries.
 744         * configure: Regenerate.
 745
 746 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 747
 748         * i386-opc.h (RegFlat): New.
 749         * i386-reg.tbl (flat): Add.
 750         * i386-tbl.h: Re-generate.
 751
 752 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 753
 754         * i386-dis.c (a_mode): New.
 755         (cond_jump_mode): Adjust.
 756         (Ma): Change to a_mode.
 757         (intel_operand_size): Handle a_mode.
 758         * i386-opc.tbl: Allow Dword and Qword for bound.
 759         * i386-tbl.h: Re-generate.
 760
 761 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 762
 763         * i386-gen.c (process_i386_registers): Process new fields.
 764         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 765         unsigned char. Add dw2_regnum and Dw2Inval.
 766         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 767         register names.
 768         * i386-tbl.h: Re-generate.
 769
 770 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 771
 772         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 773         * i386-init.h: Updated.
 774
 775 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 776
 777         * i386-gen.c (cpu_flags): Add CpuXsave.
 778
 779         * i386-opc.h (CpuXsave): New.
 780         (CpuLM): Updated.
 781         (i386_cpu_flags): Add cpuxsave.
 782
 783         * i386-dis.c (MOD_0FAE_REG_4): New.
 784         (RM_0F01_REG_2): Likewise.
 785         (MOD_0FAE_REG_5): Updated.
 786         (RM_0F01_REG_3): Likewise.
 787         (reg_table): Use MOD_0FAE_REG_4.
 788         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 789         for xrstor.
 790         (rm_table): Add RM_0F01_REG_2.
 791
 792         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 793         * i386-init.h: Regenerated.
 794         * i386-tbl.h: Likewise.
 795
 796 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 797
 798         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 799         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 800         * i386-tbl.h: Re-generate.
 801
 802 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 803
 804         PR 5715
 805         * configure: Regenerated.
 806
 807 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 808
 809         * mips-dis.c: Update copyright.
 810         (mips_arch_choices): Add Octeon.
 811         * mips-opc.c: Update copyright.
 812         (IOCT): New macro.
 813         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 814
 815 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 816
 817         * ppc-opc.c: Support optional L form mtmsr.
 818
 819 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 820
 821         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 822
 823 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 824
 825         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 826         * i386-init.h: Regenerated.
 827
 828 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 829
 830         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 831         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 832
 833 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 834
 835         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 836         (cpu_flags): Likewise.
 837
 838         * i386-opc.h (CpuMMX2): Removed.
 839         (CpuSSE): Updated.
 840
 841         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 842         * i386-init.h: Regenerated.
 843         * i386-tbl.h: Likewise.
 844
 845 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 846
 847         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 848         CPU_SMX_FLAGS.
 849         * i386-init.h: Regenerated.
 850
 851 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 852
 853         * i386-opc.tbl: Use Qword on movddup.
 854         * i386-tbl.h: Regenerated.
 855
 856 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 857
 858         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 859         * i386-tbl.h: Regenerated.
 860
 861 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         * i386-dis.c (Mx): New.
 864         (PREFIX_0FC3): Likewise.
 865         (PREFIX_0FC7_REG_6): Updated.
 866         (dis386_twobyte): Use PREFIX_0FC3.
 867         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 868         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 869         movntss.
 870
 871 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 872
 873         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 874         (operand_types): Add Mem.
 875
 876         * i386-opc.h (IntelSyntax): New.
 877         * i386-opc.h (Mem): New.
 878         (Byte): Updated.
 879         (Opcode_Modifier_Max): Updated.
 880         (i386_opcode_modifier): Add intelsyntax.
 881         (i386_operand_type): Add mem.
 882
 883         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 884         instructions.
 885
 886         * i386-reg.tbl: Add size for accumulator.
 887
 888         * i386-init.h: Regenerated.
 889         * i386-tbl.h: Likewise.
 890
 891 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 892
 893         * i386-opc.h (Byte): Fix a typo.
 894
 895 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 896
 897         PR gas/5534
 898         * i386-gen.c (operand_type_init): Add Dword to
 899         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 900         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 901         Qword and Xmmword.
 902         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 903         Xmmword, Unspecified and Anysize.
 904         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 905         an alias of Xmmword.
 906
 907         * i386-opc.h (CheckSize): Removed.
 908         (Byte): Updated.
 909         (Word): Likewise.
 910         (Dword): Likewise.
 911         (Qword): Likewise.
 912         (Xmmword): Likewise.
 913         (FWait): Updated.
 914         (OTMax): Likewise.
 915         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 916         qword and xmmword.
 917         (Fword): New.
 918         (TBYTE): Likewise.
 919         (Unspecified): Likewise.
 920         (Anysize): Likewise.
 921         (i386_operand_type): Add byte, word, dword, fword, qword,
 922         tbyte xmmword, unspecified and anysize.
 923
 924         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 925         Tbyte, Xmmword, Unspecified and Anysize.
 926
 927         * i386-reg.tbl: Add size for accumulator.
 928
 929         * i386-init.h: Regenerated.
 930         * i386-tbl.h: Likewise.
 931
 932 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 933
 934         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 935         (REG_0F18): Updated.
 936         (reg_table): Updated.
 937         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 938         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 939
 940 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 941
 942         * i386-gen.c (set_bitfield): Use fail () on error.
 943
 944 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 945
 946         * i386-gen.c (lineno): New.
 947         (filename): Likewise.
 948         (set_bitfield): Report filename and line numer on error.
 949         (process_i386_opcodes): Set filename and update lineno.
 950         (process_i386_registers): Likewise.
 951
 952 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 953
 954         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 955         ATTSyntax.
 956
 957         * i386-opc.h (IntelMnemonic): Renamed to ..
 958         (ATTSyntax): This
 959         (Opcode_Modifier_Max): Updated.
 960         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 961         and intelsyntax.
 962
 963         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 964         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 965         * i386-tbl.h: Regenerated.
 966
 967 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 968
 969         * i386-gen.c: Update copyright to 2008.
 970         * i386-opc.h: Likewise.
 971         * i386-opc.tbl: Likewise.
 972
 973         * i386-init.h: Regenerated.
 974         * i386-tbl.h: Likewise.
 975
 976 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 977
 978         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 979         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 980         * i386-tbl.h: Regenerated.
 981
 982 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 983
 984         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 985         CpuSSE4_2_Or_ABM.
 986         (cpu_flags): Likewise.
 987
 988         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 989         (CpuSSE4_2_Or_ABM): Likewise.
 990         (CpuLM): Updated.
 991         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 992
 993         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 994         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 995         and CpuPadLock, respectively.
 996         * i386-init.h: Regenerated.
 997         * i386-tbl.h: Likewise.
 998
 999 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1000
1001         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1002
1003         * i386-opc.h (No_xSuf): Removed.
1004         (CheckSize): Updated.
1005
1006         * i386-tbl.h: Regenerated.
1007
1008 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1009
1010         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1011         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1012         CPU_SSE5_FLAGS.
1013         (cpu_flags): Add CpuSSE4_2_Or_ABM.
1014
1015         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1016         (CpuLM): Updated.
1017         (i386_cpu_flags): Add cpusse4_2_or_abm.
1018
1019         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1020         CpuABM|CpuSSE4_2 on popcnt.
1021         * i386-init.h: Regenerated.
1022         * i386-tbl.h: Likewise.
1023
1024 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1025
1026         * i386-opc.h: Update comments.
1027
1028 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1029
1030         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1031         * i386-opc.h: Likewise.
1032         * i386-opc.tbl: Likewise.
1033
1034 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1035
1036         PR gas/5534
1037         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1038         Byte, Word, Dword, QWord and Xmmword.
1039
1040         * i386-opc.h (No_xSuf): New.
1041         (CheckSize): Likewise.
1042         (Byte): Likewise.
1043         (Word): Likewise.
1044         (Dword): Likewise.
1045         (QWord): Likewise.
1046         (Xmmword): Likewise.
1047         (FWait): Updated.
1048         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1049         Dword, QWord and Xmmword.
1050
1051         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1052         used.
1053         * i386-tbl.h: Regenerated.
1054
1055 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1056
1057         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1058         From Miod Vallat.
1059
1060 For older changes see ChangeLog-2007
1061 \f
1062 Local Variables:
1063 mode: change-log
1064 left-margin: 8
1065 fill-column: 74
1066 version-control: never
1067 End: