* rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
[binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-15 DJ Delorie <dj@redhat.com>
2
3 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
4 operands, so that data addresses can be corrected when not
5 ES-overridden.
6 * rl78-decode.c: Regenerate.
7 * rl78-dis.c (print_insn_rl78): Make order of modifiers
8 irrelevent. When the 'e' specifier is used on an operand and no
9 ES prefix is provided, adjust address to make it absolute.
10
11 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
12
13 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
14
15 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
16
17 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
18
19 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
20
21 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
22 macros, use local variables for info struct member accesses,
23 update the type of the variable used to hold the instruction
24 word.
25 (print_insn_mips, print_mips16_insn_arg): Likewise.
26 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
27 local variables for info struct member accesses.
28 (print_insn_micromips): Add GET_OP_S local macro.
29 (_print_insn_mips): Update the type of the variable used to hold
30 the instruction word.
31
32 2012-08-13 Ian Bolton <ian.bolton@arm.com>
33 Laurent Desnogues <laurent.desnogues@arm.com>
34 Jim MacArthur <jim.macarthur@arm.com>
35 Marcus Shawcroft <marcus.shawcroft@arm.com>
36 Nigel Stephens <nigel.stephens@arm.com>
37 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
38 Richard Earnshaw <rearnsha@arm.com>
39 Sofiane Naci <sofiane.naci@arm.com>
40 Tejas Belagod <tejas.belagod@arm.com>
41 Yufeng Zhang <yufeng.zhang@arm.com>
42
43 * Makefile.am: Add AArch64.
44 * Makefile.in: Regenerate.
45 * aarch64-asm.c: New file.
46 * aarch64-asm.h: New file.
47 * aarch64-dis.c: New file.
48 * aarch64-dis.h: New file.
49 * aarch64-gen.c: New file.
50 * aarch64-opc.c: New file.
51 * aarch64-opc.h: New file.
52 * aarch64-tbl.h: New file.
53 * configure.in: Add AArch64.
54 * configure: Regenerate.
55 * disassemble.c: Add AArch64.
56 * aarch64-asm-2.c: New file (automatically generated).
57 * aarch64-dis-2.c: New file (automatically generated).
58 * aarch64-opc-2.c: New file (automatically generated).
59 * po/POTFILES.in: Regenerate.
60
61 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
62
63 * micromips-opc.c (micromips_opcodes): Update comment.
64 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
65 instructions for IOCT as appropriate.
66 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
67 opcode_is_member.
68 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
69 the result of a check for the -Wno-missing-field-initializers
70 GCC option.
71 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
72 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
73 compilation.
74 (mips16-opc.lo): Likewise.
75 (micromips-opc.lo): Likewise.
76 * aclocal.m4: Regenerate.
77 * configure: Regenerate.
78 * Makefile.in: Regenerate.
79
80 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
81
82 PR gas/14423
83 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
84 * i386-init.h: Regenerated.
85
86 2012-08-09 Nick Clifton <nickc@redhat.com>
87
88 * po/vi.po: Updated Vietnamese translation.
89
90 2012-08-07 Roland McGrath <mcgrathr@google.com>
91
92 * i386-dis.c (reg_table): Fill out REG_0F0D table with
93 AMD-reserved cases as "prefetch".
94 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
95 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
96 (reg_table): Use those under REG_0F18.
97 (mod_table): Add those cases as "nop/reserved".
98
99 2012-08-07 Jan Beulich <jbeulich@suse.com>
100
101 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
102
103 2012-08-06 Roland McGrath <mcgrathr@google.com>
104
105 * i386-dis.c (print_insn): Print spaces between multiple excess
106 prefixes. Return actual number of excess prefixes consumed,
107 not always one.
108
109 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
110
111 2012-08-06 Roland McGrath <mcgrathr@google.com>
112 Victor Khimenko <khim@google.com>
113 H.J. Lu <hongjiu.lu@intel.com>
114
115 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
116 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
117 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
118 (OP_E_register): Likewise.
119 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
120
121 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
122
123 * configure.in: Formatting.
124 * configure: Regenerate.
125
126 2012-08-01 Alan Modra <amodra@gmail.com>
127
128 * h8300-dis.c: Fix printf arg warnings.
129 * i960-dis.c: Likewise.
130 * mips-dis.c: Likewise.
131 * pdp11-dis.c: Likewise.
132 * sh-dis.c: Likewise.
133 * v850-dis.c: Likewise.
134 * configure.in: Formatting.
135 * configure: Regenerate.
136 * rl78-decode.c: Regenerate.
137 * po/POTFILES.in: Regenerate.
138
139 2012-07-31 Chao-Ying Fu <fu@mips.com>
140 Catherine Moore <clm@codesourcery.com>
141 Maciej W. Rozycki <macro@codesourcery.com>
142
143 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
144 (DSP_VOLA): Likewise.
145 (D32, D33): Likewise.
146 (micromips_opcodes): Add DSP ASE instructions.
147 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
148 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
149
150 2012-07-31 Jan Beulich <jbeulich@suse.com>
151
152 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
153 instruction group. Mark as requiring AVX2.
154 * i386-tbl.h: Re-generate.
155
156 2012-07-30 Nick Clifton <nickc@redhat.com>
157
158 * po/opcodes.pot: Updated template.
159 * po/es.po: Updated Spanish translation.
160 * po/fi.po: Updated Finnish translation.
161
162 2012-07-27 Mike Frysinger <vapier@gentoo.org>
163
164 * configure.in (BFD_VERSION): Run bfd/configure --version and
165 parse the output of that.
166 * configure: Regenerate.
167
168 2012-07-25 James Lemke <jwlemke@codesourcery.com>
169
170 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
171
172 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
173 Dr David Alan Gilbert <dave@treblig.org>
174
175 PR binutils/13135
176 * arm-dis.c: Add necessary casts for printing integer values.
177 Use %s when printing string values.
178 * hppa-dis.c: Likewise.
179 * m68k-dis.c: Likewise.
180 * microblaze-dis.c: Likewise.
181 * mips-dis.c: Likewise.
182 * sparc-dis.c: Likewise.
183
184 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
185
186 PR binutils/14355
187 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
188 (VEX_LEN_0FXOP_08_CD): Likewise.
189 (VEX_LEN_0FXOP_08_CE): Likewise.
190 (VEX_LEN_0FXOP_08_CF): Likewise.
191 (VEX_LEN_0FXOP_08_EC): Likewise.
192 (VEX_LEN_0FXOP_08_ED): Likewise.
193 (VEX_LEN_0FXOP_08_EE): Likewise.
194 (VEX_LEN_0FXOP_08_EF): Likewise.
195 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
196 vpcomub, vpcomuw, vpcomud, vpcomuq.
197 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
198 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
199 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
200 VEX_LEN_0FXOP_08_EF.
201
202 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
203
204 * i386-dis.c (PREFIX_0F38F6): New.
205 (prefix_table): Add adcx, adox instructions.
206 (three_byte_table): Use PREFIX_0F38F6.
207 (mod_table): Add rdseed instruction.
208 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
209 (cpu_flags): Likewise.
210 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
211 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
212 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
213 prefetchw.
214 * i386-tbl.h: Regenerate.
215 * i386-init.h: Likewise.
216
217 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
218
219 * mips-dis.c: Remove gratuitous newline.
220
221 2012-07-05 Sean Keys <skeys@ipdatasys.com>
222
223 * xgate-dis.c: Removed an IF statement that will
224 always be false due to overlapping operand masks.
225 * xgate-opc.c: Corrected 'com' opcode entry and
226 fixed spacing.
227
228 2012-07-02 Roland McGrath <mcgrathr@google.com>
229
230 * i386-opc.tbl: Add RepPrefixOk to nop.
231 * i386-tbl.h: Regenerate.
232
233 2012-06-28 Nick Clifton <nickc@redhat.com>
234
235 * po/vi.po: Updated Vietnamese translation.
236
237 2012-06-22 Roland McGrath <mcgrathr@google.com>
238
239 * i386-opc.tbl: Add RepPrefixOk to ret.
240 * i386-tbl.h: Regenerate.
241
242 * i386-opc.h (RepPrefixOk): New enum constant.
243 (i386_opcode_modifier): New bitfield 'repprefixok'.
244 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
245 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
246 instructions that have IsString.
247 * i386-tbl.h: Regenerate.
248
249 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
250
251 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
252 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
253 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
254 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
255 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
256 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
257 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
258 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
259 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
260
261 2012-05-19 Alan Modra <amodra@gmail.com>
262
263 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
264 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
265
266 2012-05-18 Alan Modra <amodra@gmail.com>
267
268 * ia64-opc.c: Remove #include "ansidecl.h".
269 * z8kgen.c: Include sysdep.h first.
270
271 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
272 * bfin-dis.c: Likewise.
273 * i860-dis.c: Likewise.
274 * ia64-dis.c: Likewise.
275 * ia64-gen.c: Likewise.
276 * m68hc11-dis.c: Likewise.
277 * mmix-dis.c: Likewise.
278 * msp430-dis.c: Likewise.
279 * or32-dis.c: Likewise.
280 * rl78-dis.c: Likewise.
281 * rx-dis.c: Likewise.
282 * tic4x-dis.c: Likewise.
283 * tilegx-opc.c: Likewise.
284 * tilepro-opc.c: Likewise.
285 * rx-decode.c: Regenerate.
286
287 2012-05-17 James Lemke <jwlemke@codesourcery.com>
288
289 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
290
291 2012-05-17 James Lemke <jwlemke@codesourcery.com>
292
293 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
294
295 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
296 Nick Clifton <nickc@redhat.com>
297
298 PR 14072
299 * configure.in: Add check that sysdep.h has been included before
300 any system header files.
301 * configure: Regenerate.
302 * config.in: Regenerate.
303 * sysdep.h: Generate an error if included before config.h.
304 * alpha-opc.c: Include sysdep.h before any other header file.
305 * alpha-dis.c: Likewise.
306 * avr-dis.c: Likewise.
307 * cgen-opc.c: Likewise.
308 * cr16-dis.c: Likewise.
309 * cris-dis.c: Likewise.
310 * crx-dis.c: Likewise.
311 * d10v-dis.c: Likewise.
312 * d10v-opc.c: Likewise.
313 * d30v-dis.c: Likewise.
314 * d30v-opc.c: Likewise.
315 * h8500-dis.c: Likewise.
316 * i370-dis.c: Likewise.
317 * i370-opc.c: Likewise.
318 * m10200-dis.c: Likewise.
319 * m10300-dis.c: Likewise.
320 * micromips-opc.c: Likewise.
321 * mips-opc.c: Likewise.
322 * mips61-opc.c: Likewise.
323 * moxie-dis.c: Likewise.
324 * or32-opc.c: Likewise.
325 * pj-dis.c: Likewise.
326 * ppc-dis.c: Likewise.
327 * ppc-opc.c: Likewise.
328 * s390-dis.c: Likewise.
329 * sh-dis.c: Likewise.
330 * sh64-dis.c: Likewise.
331 * sparc-dis.c: Likewise.
332 * sparc-opc.c: Likewise.
333 * spu-dis.c: Likewise.
334 * tic30-dis.c: Likewise.
335 * tic54x-dis.c: Likewise.
336 * tic80-dis.c: Likewise.
337 * tic80-opc.c: Likewise.
338 * tilegx-dis.c: Likewise.
339 * tilepro-dis.c: Likewise.
340 * v850-dis.c: Likewise.
341 * v850-opc.c: Likewise.
342 * vax-dis.c: Likewise.
343 * w65-dis.c: Likewise.
344 * xgate-dis.c: Likewise.
345 * xtensa-dis.c: Likewise.
346 * rl78-decode.opc: Likewise.
347 * rl78-decode.c: Regenerate.
348 * rx-decode.opc: Likewise.
349 * rx-decode.c: Regenerate.
350
351 2012-05-17 Alan Modra <amodra@gmail.com>
352
353 * ppc_dis.c: Don't include elf/ppc.h.
354
355 2012-05-16 Meador Inge <meadori@codesourcery.com>
356
357 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
358 to PUSH/POP {reg}.
359
360 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
361 Stephane Carrez <stcarrez@nerim.fr>
362
363 * configure.in: Add S12X and XGATE co-processor support to m68hc11
364 target.
365 * disassemble.c: Likewise.
366 * configure: Regenerate.
367 * m68hc11-dis.c: Make objdump output more consistent, use hex
368 instead of decimal and use 0x prefix for hex.
369 * m68hc11-opc.c: Add S12X and XGATE opcodes.
370
371 2012-05-14 James Lemke <jwlemke@codesourcery.com>
372
373 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
374 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
375 (vle_opcd_indices): New array.
376 (lookup_vle): New function.
377 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
378 (print_insn_powerpc): Likewise.
379 * ppc-opc.c: Likewise.
380
381 2012-05-14 Catherine Moore <clm@codesourcery.com>
382 Maciej W. Rozycki <macro@codesourcery.com>
383 Rhonda Wittels <rhonda@codesourcery.com>
384 Nathan Froyd <froydnj@codesourcery.com>
385
386 * ppc-opc.c (insert_arx, extract_arx): New functions.
387 (insert_ary, extract_ary): New functions.
388 (insert_li20, extract_li20): New functions.
389 (insert_rx, extract_rx): New functions.
390 (insert_ry, extract_ry): New functions.
391 (insert_sci8, extract_sci8): New functions.
392 (insert_sci8n, extract_sci8n): New functions.
393 (insert_sd4h, extract_sd4h): New functions.
394 (insert_sd4w, extract_sd4w): New functions.
395 (insert_vlesi, extract_vlesi): New functions.
396 (insert_vlensi, extract_vlensi): New functions.
397 (insert_vleui, extract_vleui): New functions.
398 (insert_vleil, extract_vleil): New functions.
399 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
400 (BI16, BI32, BO32, B8): New.
401 (B15, B24, CRD32, CRS): New.
402 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
403 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
404 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
405 (SH6_MASK): Use PPC_OPSHIFT_INV.
406 (SI8, UI5, OIMM5, UI7, BO16): New.
407 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
408 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
409 (ALLOW8_SPRG): New.
410 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
411 (OPVUP, OPVUP_MASK OPVUP): New
412 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
413 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
414 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
415 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
416 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
417 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
418 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
419 (SE_IM5, SE_IM5_MASK): New.
420 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
421 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
422 (BO32DNZ, BO32DZ): New.
423 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
424 (PPCVLE): New.
425 (powerpc_opcodes): Add new VLE instructions. Update existing
426 instruction to include PPCVLE if supported.
427 * ppc-dis.c (ppc_opts): Add vle entry.
428 (get_powerpc_dialect): New function.
429 (powerpc_init_dialect): VLE support.
430 (print_insn_big_powerpc): Call get_powerpc_dialect.
431 (print_insn_little_powerpc): Likewise.
432 (operand_value_powerpc): Handle negative shift counts.
433 (print_insn_powerpc): Handle 2-byte instruction lengths.
434
435 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
436
437 PR binutils/14028
438 * configure.in: Invoke ACX_HEADER_STRING.
439 * configure: Regenerate.
440 * config.in: Regenerate.
441 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
442 string.h and strings.h.
443
444 2012-05-11 Nick Clifton <nickc@redhat.com>
445
446 PR binutils/14006
447 * arm-dis.c (print_insn): Fix detection of instruction mode in
448 files containing multiple executable sections.
449
450 2012-05-03 Sean Keys <skeys@ipdatasys.com>
451
452 * Makefile.in, configure: regenerate
453 * disassemble.c (disassembler): Recognize ARCH_XGATE.
454 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
455 New functions.
456 * configure.in: Recognize xgate.
457 * xgate-dis.c, xgate-opc.c: New files for support of xgate
458 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
459 and opcode generation for xgate.
460
461 2012-04-30 DJ Delorie <dj@redhat.com>
462
463 * rx-decode.opc (MOV): Do not sign-extend immediates which are
464 already the maximum bit size.
465 * rx-decode.c: Regenerate.
466
467 2012-04-27 David S. Miller <davem@davemloft.net>
468
469 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
470 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
471
472 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
473 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
474
475 * sparc-opc.c (CBCOND): New define.
476 (CBCOND_XCC): Likewise.
477 (cbcond): New helper macro.
478 (sparc_opcodes): Add compare-and-branch instructions.
479
480 * sparc-dis.c (print_insn_sparc): Handle ')'.
481 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
482
483 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
484 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
485
486 2012-04-12 David S. Miller <davem@davemloft.net>
487
488 * sparc-dis.c (X_DISP10): Define.
489 (print_insn_sparc): Handle '='.
490
491 2012-04-01 Mike Frysinger <vapier@gentoo.org>
492
493 * bfin-dis.c (fmtconst): Replace decimal handling with a single
494 sprintf call and the '*' field width.
495
496 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
497
498 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
499
500 2012-03-16 Alan Modra <amodra@gmail.com>
501
502 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
503 (powerpc_opcd_indices): Bump array size.
504 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
505 corresponding to unused opcodes to following entry.
506 (lookup_powerpc): New function, extracted and optimised from..
507 (print_insn_powerpc): ..here.
508
509 2012-03-15 Alan Modra <amodra@gmail.com>
510 James Lemke <jwlemke@codesourcery.com>
511
512 * disassemble.c (disassemble_init_for_target): Handle ppc init.
513 * ppc-dis.c (private): New var.
514 (powerpc_init_dialect): Don't return calloc failure, instead use
515 private.
516 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
517 (powerpc_opcd_indices): New array.
518 (disassemble_init_powerpc): New function.
519 (print_insn_big_powerpc): Don't init dialect here.
520 (print_insn_little_powerpc): Likewise.
521 (print_insn_powerpc): Start search using powerpc_opcd_indices.
522
523 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
524
525 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
526 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
527 (PPCVEC2, PPCTMR, E6500): New short names.
528 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
529 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
530 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
531 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
532 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
533 optional operands on sync instruction for E6500 target.
534
535 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
536
537 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
538
539 2012-02-27 Alan Modra <amodra@gmail.com>
540
541 * mt-dis.c: Regenerate.
542
543 2012-02-27 Alan Modra <amodra@gmail.com>
544
545 * v850-opc.c (extract_v8): Rearrange to make it obvious this
546 is the inverse of corresponding insert function.
547 (extract_d22, extract_u9, extract_r4): Likewise.
548 (extract_d9): Correct sign extension.
549 (extract_d16_15): Don't assume "long" is 32 bits, and don't
550 rely on implementation defined behaviour for shift right of
551 signed types.
552 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
553 (extract_d23): Likewise, and correct mask.
554
555 2012-02-27 Alan Modra <amodra@gmail.com>
556
557 * crx-dis.c (print_arg): Mask constant to 32 bits.
558 * crx-opc.c (cst4_map): Use int array.
559
560 2012-02-27 Alan Modra <amodra@gmail.com>
561
562 * arc-dis.c (BITS): Don't use shifts to mask off bits.
563 (FIELDD): Sign extend with xor,sub.
564
565 2012-02-25 Walter Lee <walt@tilera.com>
566
567 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
568 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
569 TILEPRO_OPC_LW_TLS_SN.
570
571 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
572
573 * i386-opc.h (HLEPrefixNone): New.
574 (HLEPrefixLock): Likewise.
575 (HLEPrefixAny): Likewise.
576 (HLEPrefixRelease): Likewise.
577
578 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
579
580 * i386-dis.c (HLE_Fixup1): New.
581 (HLE_Fixup2): Likewise.
582 (HLE_Fixup3): Likewise.
583 (Ebh1): Likewise.
584 (Evh1): Likewise.
585 (Ebh2): Likewise.
586 (Evh2): Likewise.
587 (Ebh3): Likewise.
588 (Evh3): Likewise.
589 (MOD_C6_REG_7): Likewise.
590 (MOD_C7_REG_7): Likewise.
591 (RM_C6_REG_7): Likewise.
592 (RM_C7_REG_7): Likewise.
593 (XACQUIRE_PREFIX): Likewise.
594 (XRELEASE_PREFIX): Likewise.
595 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
596 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
597 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
598 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
599 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
600 MOD_C6_REG_7 and MOD_C7_REG_7.
601 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
602 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
603 xtest.
604 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
605 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
606
607 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
608 CPU_RTM_FLAGS.
609 (cpu_flags): Add CpuHLE and CpuRTM.
610 (opcode_modifiers): Add HLEPrefixOk.
611
612 * i386-opc.h (CpuHLE): New.
613 (CpuRTM): Likewise.
614 (HLEPrefixOk): Likewise.
615 (i386_cpu_flags): Add cpuhle and cpurtm.
616 (i386_opcode_modifier): Add hleprefixok.
617
618 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
619 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
620 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
621 operand. Add xacquire, xrelease, xabort, xbegin, xend and
622 xtest.
623 * i386-init.h: Regenerated.
624 * i386-tbl.h: Likewise.
625
626 2012-01-24 DJ Delorie <dj@redhat.com>
627
628 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
629 * rl78-decode.c: Regenerate.
630
631 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
632
633 PR binutils/10173
634 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
635
636 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
637
638 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
639 register and move them after pmove with PSR/PCSR register.
640
641 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
642
643 * i386-dis.c (mod_table): Add vmfunc.
644
645 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
646 (cpu_flags): CpuVMFUNC.
647
648 * i386-opc.h (CpuVMFUNC): New.
649 (i386_cpu_flags): Add cpuvmfunc.
650
651 * i386-opc.tbl: Add vmfunc.
652 * i386-init.h: Regenerated.
653 * i386-tbl.h: Likewise.
654
655 For older changes see ChangeLog-2011
656 \f
657 Local Variables:
658 mode: change-log
659 left-margin: 8
660 fill-column: 74
661 version-control: never
662 End: