There were several cases where the registers in the REX encoded range
[binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-07 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
4
5 2012-08-06 Roland McGrath <mcgrathr@google.com>
6
7 * i386-dis.c (print_insn): Print spaces between multiple excess
8 prefixes. Return actual number of excess prefixes consumed,
9 not always one.
10
11 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
12
13 2012-08-06 Roland McGrath <mcgrathr@google.com>
14 Victor Khimenko <khim@google.com>
15 H.J. Lu <hongjiu.lu@intel.com>
16
17 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
18 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
19 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
20 (OP_E_register): Likewise.
21 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
22
23 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
24
25 * configure.in: Formatting.
26 * configure: Regenerate.
27
28 2012-08-01 Alan Modra <amodra@gmail.com>
29
30 * h8300-dis.c: Fix printf arg warnings.
31 * i960-dis.c: Likewise.
32 * mips-dis.c: Likewise.
33 * pdp11-dis.c: Likewise.
34 * sh-dis.c: Likewise.
35 * v850-dis.c: Likewise.
36 * configure.in: Formatting.
37 * configure: Regenerate.
38 * rl78-decode.c: Regenerate.
39 * po/POTFILES.in: Regenerate.
40
41 2012-07-31 Chao-Ying Fu <fu@mips.com>
42 Catherine Moore <clm@codesourcery.com>
43 Maciej W. Rozycki <macro@codesourcery.com>
44
45 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
46 (DSP_VOLA): Likewise.
47 (D32, D33): Likewise.
48 (micromips_opcodes): Add DSP ASE instructions.
49 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
50 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
51
52 2012-07-31 Jan Beulich <jbeulich@suse.com>
53
54 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
55 instruction group. Mark as requiring AVX2.
56 * i386-tbl.h: Re-generate.
57
58 2012-07-30 Nick Clifton <nickc@redhat.com>
59
60 * po/opcodes.pot: Updated template.
61 * po/es.po: Updated Spanish translation.
62 * po/fi.po: Updated Finnish translation.
63
64 2012-07-27 Mike Frysinger <vapier@gentoo.org>
65
66 * configure.in (BFD_VERSION): Run bfd/configure --version and
67 parse the output of that.
68 * configure: Regenerate.
69
70 2012-07-25 James Lemke <jwlemke@codesourcery.com>
71
72 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
73
74 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
75 Dr David Alan Gilbert <dave@treblig.org>
76
77 PR binutils/13135
78 * arm-dis.c: Add necessary casts for printing integer values.
79 Use %s when printing string values.
80 * hppa-dis.c: Likewise.
81 * m68k-dis.c: Likewise.
82 * microblaze-dis.c: Likewise.
83 * mips-dis.c: Likewise.
84 * sparc-dis.c: Likewise.
85
86 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
87
88 PR binutils/14355
89 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
90 (VEX_LEN_0FXOP_08_CD): Likewise.
91 (VEX_LEN_0FXOP_08_CE): Likewise.
92 (VEX_LEN_0FXOP_08_CF): Likewise.
93 (VEX_LEN_0FXOP_08_EC): Likewise.
94 (VEX_LEN_0FXOP_08_ED): Likewise.
95 (VEX_LEN_0FXOP_08_EE): Likewise.
96 (VEX_LEN_0FXOP_08_EF): Likewise.
97 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
98 vpcomub, vpcomuw, vpcomud, vpcomuq.
99 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
100 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
101 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
102 VEX_LEN_0FXOP_08_EF.
103
104 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
105
106 * i386-dis.c (PREFIX_0F38F6): New.
107 (prefix_table): Add adcx, adox instructions.
108 (three_byte_table): Use PREFIX_0F38F6.
109 (mod_table): Add rdseed instruction.
110 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
111 (cpu_flags): Likewise.
112 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
113 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
114 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
115 prefetchw.
116 * i386-tbl.h: Regenerate.
117 * i386-init.h: Likewise.
118
119 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
120
121 * mips-dis.c: Remove gratuitous newline.
122
123 2012-07-05 Sean Keys <skeys@ipdatasys.com>
124
125 * xgate-dis.c: Removed an IF statement that will
126 always be false due to overlapping operand masks.
127 * xgate-opc.c: Corrected 'com' opcode entry and
128 fixed spacing.
129
130 2012-07-02 Roland McGrath <mcgrathr@google.com>
131
132 * i386-opc.tbl: Add RepPrefixOk to nop.
133 * i386-tbl.h: Regenerate.
134
135 2012-06-28 Nick Clifton <nickc@redhat.com>
136
137 * po/vi.po: Updated Vietnamese translation.
138
139 2012-06-22 Roland McGrath <mcgrathr@google.com>
140
141 * i386-opc.tbl: Add RepPrefixOk to ret.
142 * i386-tbl.h: Regenerate.
143
144 * i386-opc.h (RepPrefixOk): New enum constant.
145 (i386_opcode_modifier): New bitfield 'repprefixok'.
146 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
147 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
148 instructions that have IsString.
149 * i386-tbl.h: Regenerate.
150
151 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
152
153 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
154 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
155 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
156 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
157 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
158 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
159 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
160 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
161 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
162
163 2012-05-19 Alan Modra <amodra@gmail.com>
164
165 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
166 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
167
168 2012-05-18 Alan Modra <amodra@gmail.com>
169
170 * ia64-opc.c: Remove #include "ansidecl.h".
171 * z8kgen.c: Include sysdep.h first.
172
173 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
174 * bfin-dis.c: Likewise.
175 * i860-dis.c: Likewise.
176 * ia64-dis.c: Likewise.
177 * ia64-gen.c: Likewise.
178 * m68hc11-dis.c: Likewise.
179 * mmix-dis.c: Likewise.
180 * msp430-dis.c: Likewise.
181 * or32-dis.c: Likewise.
182 * rl78-dis.c: Likewise.
183 * rx-dis.c: Likewise.
184 * tic4x-dis.c: Likewise.
185 * tilegx-opc.c: Likewise.
186 * tilepro-opc.c: Likewise.
187 * rx-decode.c: Regenerate.
188
189 2012-05-17 James Lemke <jwlemke@codesourcery.com>
190
191 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
192
193 2012-05-17 James Lemke <jwlemke@codesourcery.com>
194
195 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
196
197 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
198 Nick Clifton <nickc@redhat.com>
199
200 PR 14072
201 * configure.in: Add check that sysdep.h has been included before
202 any system header files.
203 * configure: Regenerate.
204 * config.in: Regenerate.
205 * sysdep.h: Generate an error if included before config.h.
206 * alpha-opc.c: Include sysdep.h before any other header file.
207 * alpha-dis.c: Likewise.
208 * avr-dis.c: Likewise.
209 * cgen-opc.c: Likewise.
210 * cr16-dis.c: Likewise.
211 * cris-dis.c: Likewise.
212 * crx-dis.c: Likewise.
213 * d10v-dis.c: Likewise.
214 * d10v-opc.c: Likewise.
215 * d30v-dis.c: Likewise.
216 * d30v-opc.c: Likewise.
217 * h8500-dis.c: Likewise.
218 * i370-dis.c: Likewise.
219 * i370-opc.c: Likewise.
220 * m10200-dis.c: Likewise.
221 * m10300-dis.c: Likewise.
222 * micromips-opc.c: Likewise.
223 * mips-opc.c: Likewise.
224 * mips61-opc.c: Likewise.
225 * moxie-dis.c: Likewise.
226 * or32-opc.c: Likewise.
227 * pj-dis.c: Likewise.
228 * ppc-dis.c: Likewise.
229 * ppc-opc.c: Likewise.
230 * s390-dis.c: Likewise.
231 * sh-dis.c: Likewise.
232 * sh64-dis.c: Likewise.
233 * sparc-dis.c: Likewise.
234 * sparc-opc.c: Likewise.
235 * spu-dis.c: Likewise.
236 * tic30-dis.c: Likewise.
237 * tic54x-dis.c: Likewise.
238 * tic80-dis.c: Likewise.
239 * tic80-opc.c: Likewise.
240 * tilegx-dis.c: Likewise.
241 * tilepro-dis.c: Likewise.
242 * v850-dis.c: Likewise.
243 * v850-opc.c: Likewise.
244 * vax-dis.c: Likewise.
245 * w65-dis.c: Likewise.
246 * xgate-dis.c: Likewise.
247 * xtensa-dis.c: Likewise.
248 * rl78-decode.opc: Likewise.
249 * rl78-decode.c: Regenerate.
250 * rx-decode.opc: Likewise.
251 * rx-decode.c: Regenerate.
252
253 2012-05-17 Alan Modra <amodra@gmail.com>
254
255 * ppc_dis.c: Don't include elf/ppc.h.
256
257 2012-05-16 Meador Inge <meadori@codesourcery.com>
258
259 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
260 to PUSH/POP {reg}.
261
262 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
263 Stephane Carrez <stcarrez@nerim.fr>
264
265 * configure.in: Add S12X and XGATE co-processor support to m68hc11
266 target.
267 * disassemble.c: Likewise.
268 * configure: Regenerate.
269 * m68hc11-dis.c: Make objdump output more consistent, use hex
270 instead of decimal and use 0x prefix for hex.
271 * m68hc11-opc.c: Add S12X and XGATE opcodes.
272
273 2012-05-14 James Lemke <jwlemke@codesourcery.com>
274
275 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
276 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
277 (vle_opcd_indices): New array.
278 (lookup_vle): New function.
279 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
280 (print_insn_powerpc): Likewise.
281 * ppc-opc.c: Likewise.
282
283 2012-05-14 Catherine Moore <clm@codesourcery.com>
284 Maciej W. Rozycki <macro@codesourcery.com>
285 Rhonda Wittels <rhonda@codesourcery.com>
286 Nathan Froyd <froydnj@codesourcery.com>
287
288 * ppc-opc.c (insert_arx, extract_arx): New functions.
289 (insert_ary, extract_ary): New functions.
290 (insert_li20, extract_li20): New functions.
291 (insert_rx, extract_rx): New functions.
292 (insert_ry, extract_ry): New functions.
293 (insert_sci8, extract_sci8): New functions.
294 (insert_sci8n, extract_sci8n): New functions.
295 (insert_sd4h, extract_sd4h): New functions.
296 (insert_sd4w, extract_sd4w): New functions.
297 (insert_vlesi, extract_vlesi): New functions.
298 (insert_vlensi, extract_vlensi): New functions.
299 (insert_vleui, extract_vleui): New functions.
300 (insert_vleil, extract_vleil): New functions.
301 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
302 (BI16, BI32, BO32, B8): New.
303 (B15, B24, CRD32, CRS): New.
304 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
305 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
306 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
307 (SH6_MASK): Use PPC_OPSHIFT_INV.
308 (SI8, UI5, OIMM5, UI7, BO16): New.
309 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
310 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
311 (ALLOW8_SPRG): New.
312 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
313 (OPVUP, OPVUP_MASK OPVUP): New
314 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
315 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
316 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
317 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
318 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
319 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
320 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
321 (SE_IM5, SE_IM5_MASK): New.
322 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
323 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
324 (BO32DNZ, BO32DZ): New.
325 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
326 (PPCVLE): New.
327 (powerpc_opcodes): Add new VLE instructions. Update existing
328 instruction to include PPCVLE if supported.
329 * ppc-dis.c (ppc_opts): Add vle entry.
330 (get_powerpc_dialect): New function.
331 (powerpc_init_dialect): VLE support.
332 (print_insn_big_powerpc): Call get_powerpc_dialect.
333 (print_insn_little_powerpc): Likewise.
334 (operand_value_powerpc): Handle negative shift counts.
335 (print_insn_powerpc): Handle 2-byte instruction lengths.
336
337 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
338
339 PR binutils/14028
340 * configure.in: Invoke ACX_HEADER_STRING.
341 * configure: Regenerate.
342 * config.in: Regenerate.
343 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
344 string.h and strings.h.
345
346 2012-05-11 Nick Clifton <nickc@redhat.com>
347
348 PR binutils/14006
349 * arm-dis.c (print_insn): Fix detection of instruction mode in
350 files containing multiple executable sections.
351
352 2012-05-03 Sean Keys <skeys@ipdatasys.com>
353
354 * Makefile.in, configure: regenerate
355 * disassemble.c (disassembler): Recognize ARCH_XGATE.
356 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
357 New functions.
358 * configure.in: Recognize xgate.
359 * xgate-dis.c, xgate-opc.c: New files for support of xgate
360 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
361 and opcode generation for xgate.
362
363 2012-04-30 DJ Delorie <dj@redhat.com>
364
365 * rx-decode.opc (MOV): Do not sign-extend immediates which are
366 already the maximum bit size.
367 * rx-decode.c: Regenerate.
368
369 2012-04-27 David S. Miller <davem@davemloft.net>
370
371 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
372 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
373
374 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
375 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
376
377 * sparc-opc.c (CBCOND): New define.
378 (CBCOND_XCC): Likewise.
379 (cbcond): New helper macro.
380 (sparc_opcodes): Add compare-and-branch instructions.
381
382 * sparc-dis.c (print_insn_sparc): Handle ')'.
383 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
384
385 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
386 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
387
388 2012-04-12 David S. Miller <davem@davemloft.net>
389
390 * sparc-dis.c (X_DISP10): Define.
391 (print_insn_sparc): Handle '='.
392
393 2012-04-01 Mike Frysinger <vapier@gentoo.org>
394
395 * bfin-dis.c (fmtconst): Replace decimal handling with a single
396 sprintf call and the '*' field width.
397
398 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
399
400 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
401
402 2012-03-16 Alan Modra <amodra@gmail.com>
403
404 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
405 (powerpc_opcd_indices): Bump array size.
406 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
407 corresponding to unused opcodes to following entry.
408 (lookup_powerpc): New function, extracted and optimised from..
409 (print_insn_powerpc): ..here.
410
411 2012-03-15 Alan Modra <amodra@gmail.com>
412 James Lemke <jwlemke@codesourcery.com>
413
414 * disassemble.c (disassemble_init_for_target): Handle ppc init.
415 * ppc-dis.c (private): New var.
416 (powerpc_init_dialect): Don't return calloc failure, instead use
417 private.
418 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
419 (powerpc_opcd_indices): New array.
420 (disassemble_init_powerpc): New function.
421 (print_insn_big_powerpc): Don't init dialect here.
422 (print_insn_little_powerpc): Likewise.
423 (print_insn_powerpc): Start search using powerpc_opcd_indices.
424
425 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
426
427 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
428 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
429 (PPCVEC2, PPCTMR, E6500): New short names.
430 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
431 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
432 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
433 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
434 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
435 optional operands on sync instruction for E6500 target.
436
437 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
438
439 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
440
441 2012-02-27 Alan Modra <amodra@gmail.com>
442
443 * mt-dis.c: Regenerate.
444
445 2012-02-27 Alan Modra <amodra@gmail.com>
446
447 * v850-opc.c (extract_v8): Rearrange to make it obvious this
448 is the inverse of corresponding insert function.
449 (extract_d22, extract_u9, extract_r4): Likewise.
450 (extract_d9): Correct sign extension.
451 (extract_d16_15): Don't assume "long" is 32 bits, and don't
452 rely on implementation defined behaviour for shift right of
453 signed types.
454 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
455 (extract_d23): Likewise, and correct mask.
456
457 2012-02-27 Alan Modra <amodra@gmail.com>
458
459 * crx-dis.c (print_arg): Mask constant to 32 bits.
460 * crx-opc.c (cst4_map): Use int array.
461
462 2012-02-27 Alan Modra <amodra@gmail.com>
463
464 * arc-dis.c (BITS): Don't use shifts to mask off bits.
465 (FIELDD): Sign extend with xor,sub.
466
467 2012-02-25 Walter Lee <walt@tilera.com>
468
469 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
470 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
471 TILEPRO_OPC_LW_TLS_SN.
472
473 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
474
475 * i386-opc.h (HLEPrefixNone): New.
476 (HLEPrefixLock): Likewise.
477 (HLEPrefixAny): Likewise.
478 (HLEPrefixRelease): Likewise.
479
480 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
481
482 * i386-dis.c (HLE_Fixup1): New.
483 (HLE_Fixup2): Likewise.
484 (HLE_Fixup3): Likewise.
485 (Ebh1): Likewise.
486 (Evh1): Likewise.
487 (Ebh2): Likewise.
488 (Evh2): Likewise.
489 (Ebh3): Likewise.
490 (Evh3): Likewise.
491 (MOD_C6_REG_7): Likewise.
492 (MOD_C7_REG_7): Likewise.
493 (RM_C6_REG_7): Likewise.
494 (RM_C7_REG_7): Likewise.
495 (XACQUIRE_PREFIX): Likewise.
496 (XRELEASE_PREFIX): Likewise.
497 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
498 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
499 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
500 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
501 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
502 MOD_C6_REG_7 and MOD_C7_REG_7.
503 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
504 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
505 xtest.
506 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
507 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
508
509 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
510 CPU_RTM_FLAGS.
511 (cpu_flags): Add CpuHLE and CpuRTM.
512 (opcode_modifiers): Add HLEPrefixOk.
513
514 * i386-opc.h (CpuHLE): New.
515 (CpuRTM): Likewise.
516 (HLEPrefixOk): Likewise.
517 (i386_cpu_flags): Add cpuhle and cpurtm.
518 (i386_opcode_modifier): Add hleprefixok.
519
520 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
521 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
522 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
523 operand. Add xacquire, xrelease, xabort, xbegin, xend and
524 xtest.
525 * i386-init.h: Regenerated.
526 * i386-tbl.h: Likewise.
527
528 2012-01-24 DJ Delorie <dj@redhat.com>
529
530 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
531 * rl78-decode.c: Regenerate.
532
533 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
534
535 PR binutils/10173
536 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
537
538 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
539
540 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
541 register and move them after pmove with PSR/PCSR register.
542
543 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
544
545 * i386-dis.c (mod_table): Add vmfunc.
546
547 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
548 (cpu_flags): CpuVMFUNC.
549
550 * i386-opc.h (CpuVMFUNC): New.
551 (i386_cpu_flags): Add cpuvmfunc.
552
553 * i386-opc.tbl: Add vmfunc.
554 * i386-init.h: Regenerated.
555 * i386-tbl.h: Likewise.
556
557 For older changes see ChangeLog-2011
558 \f
559 Local Variables:
560 mode: change-log
561 left-margin: 8
562 fill-column: 74
563 version-control: never
564 End: