opcodes/ChangeLog

   1 2009-01-02  Matthias Klose  <doko@ubuntu.com>
   2
   3         * or32-opc.c (or32_print_register, or32_print_immediate,
   4         disassemble_insn): Don't rely on undefined sprintf behaviour.
   5
   6 2008-12-30  Martin Schwidefsky  <schwidefskyy@de.ibm.com>
   7
   8         * s390-opc.txt: Add ptff instruction.
   9
  10 2008-12-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
  11
  12         * Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files.
  13         * Makefile.in: Regenerate.
  14
  15 2008-12-23  Jon Beniston <jon@beniston.com>
  16
  17         * Makefile.am: Add LM32 object files and dependencies.
  18         * Makefile.in: Regenerate.
  19         * configure.in: Add LM32 target.
  20         * configure: Regenerate.
  21         * disassemble.c: Add LM32 disassembler.
  22         * cgen-asm.in: Update copyright year.
  23         * cgen-dis.in: Update copyright year.
  24         * cgen-ibld.in: Update copyright year.
  25         * lm32-asm.c: New file.
  26         * lm32-desc.c: New file.
  27         * lm32-desc.h: New file.
  28         * lm32-dis.c: New file.
  29         * lm32-ibld.c: New file.
  30         * lm32-opc.c: New file.
  31         * lm32-opc.h: New file.
  32         * lm32-opinst.c: New file.
  33
  34 2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>
  35
  36         * i386-dis.c (EXdS): New.
  37         (EXdVexS): Likewise.
  38         (EXqVexS): Likewise.
  39         (d_swap_mode): Likewise.
  40         (q_mode): Updated.
  41         (prefix_table): Use EXdS on movss and EXqS on movsd.
  42         (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
  43         (intel_operand_size): Handle d_swap_mode.
  44         (OP_EX): Likewise.
  45
  46         * i386-opc.h (S): Update comments.
  47
  48         * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
  49         * i386-tbl.h: Regenerated.
  50
  51 2008-12-23  Nick Clifton  <nickc@redhat.com>
  52
  53         * po/ga.po: Updated Irish translation.
  54
  55 2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>
  56
  57         * i386-dis.c (EbS): New.
  58         (EvS): Likewise.
  59         (EMS): Likewise.
  60         (EXqS): Likewise.
  61         (EXxS): Likewise.
  62         (b_swap_mode): Likewise.
  63         (v_swap_mode): Likewise.
  64         (q_swap_mode): Likewise.
  65         (x_swap_mode): Likewise.
  66         (v_mode): Updated.
  67         (w_mode): Likewise.
  68         (t_mode): Likewise.
  69         (xmm_mode): Likewise.
  70         (swap_operand): Likewise.
  71         (dis386): Use EbS on movB.  Use EvS on moveS.
  72         (dis386_twobyte): Use EXxS on movapX.
  73         (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
  74         vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
  75         (vex_table): Use EXxS on vmovapX.
  76         (vex_len_table): Use EXqS on vmovq.
  77         (intel_operand_size): Handle b_swap_mode, v_swap_mode,
  78         q_swap_mode and x_swap_mode.
  79         (OP_E_register): Handle b_swap_mode and v_swap_mode.
  80         (OP_EM): Handle v_swap_mode.
  81         (OP_EX): x_swap_mode and q_swap_mode.
  82
  83         * i386-gen.c (opcode_modifiers): Add S.
  84
  85         * i386-opc.h (S): New.
  86         (Modrm): Updated.
  87         (i386_opcode_modifier): Add s.
  88
  89         * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
  90         movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
  91         * i386-tbl.h: Regenerated.
  92
  93 2008-12-18  H.J. Lu  <hongjiu.lu@intel.com>
  94
  95         * i386-dis.c (mnemonicendp): New.
  96         (op): Likewise.
  97         (print_insn): Use mnemonicendp.
  98         (OP_3DNowSuffix): Likewise.
  99         (CMP_Fixup): Likewise.
 100         (CMPXCHG8B_Fixup): Likewise.
 101         (CRC32_Fixup): Likewise.
 102         (OP_DREX_FCMP): Likewise.
 103         (OP_DREX_ICMP): Likewise.
 104         (VZERO_Fixup): Likewise.
 105         (VCMP_Fixup): Likewise.
 106         (PCLMUL_Fixup): Likewise.
 107         (VPERMIL2_Fixup): Likewise.
 108         (MOVBE_Fixup): Likewise.
 109         (putop): Update mnemonicendp.
 110         (oappend): Use stpcpy.
 111         (simd_cmp_op): Changed to struct op.
 112         (vex_cmp_op): Likewise.
 113         (pclmul_op): Likewise.
 114         (vpermil2_op): Likewise.
 115
 116 2008-12-18  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 117
 118         * configure: Regenerate.
 119
 120 2008-12-15  Richard Earnshaw  <rearnsha@arm.com>
 121
 122         * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
 123         unified syntax.
 124
 125 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
 126
 127         * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
 128
 129 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
 130
 131         * i386-dis.c (putop): Remove strayed comments.
 132
 133 2008-12-04  Ben Elliston  <bje@au.ibm.com>
 134
 135         * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
 136         for -Mbooke.
 137         (print_ppc_disassembler_options): Update usage.
 138         * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
 139         (BOOKE64): Remove.
 140         (PPCCHLK64): Likewise.
 141         (powerpc_opcodes): Remove all BOOKE64 instructions.
 142
 143 2008-11-28  Joshua Kinard  <kumba@gentoo.org>
 144
 145         * mips-dis.c (mips_arch_choices): Add r14000, r16000.
 146
 147 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 148
 149         * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
 150         adjusted the mask for 32-bit branch instruction.
 151
 152 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
 153
 154         * ppc-opc.c (extract_sprg): Correct operand range check.
 155
 156 2008-11-26  Andreas Schwab  <schwab@suse.de>
 157
 158         * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
 159         (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
 160         (save_printer, save_print_address): Remove.
 161         (fetch_data): Don't use them.
 162         (match_insn_m68k): Always restore printing functions.
 163         (print_insn_m68k): Don't save/restore printing functions.
 164
 165 2008-11-25  Nick Clifton  <nickc@redhat.com>
 166
 167         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
 168
 169 2008-11-18  Catherine Moore  <clm@codesourcery.com>
 170
 171         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
 172         instructions.
 173         (neon_opcodes): Likewise.
 174         (print_insn_coprocessor): Print 't' or 'b' for vcvt
 175         instructions.
 176
 177 2008-11-14  Tristan Gingold  <gingold@adacore.com>
 178
 179         * makefile.vms (OBJS): Update list of objects.
 180         (DEFS): Update
 181         (CFLAGS): Update.
 182
 183 2008-11-06  Chao-ying Fu  <fu@mips.com>
 184
 185         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
 186         before sync.
 187         (sync): New instruction with 5-bit sync type.
 188         * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
 189
 190 2008-11-06  Nick Clifton  <nickc@redhat.com>
 191
 192         * avr-dis.c: Replace uses of sprintf without a format string with
 193         calls to strcpy.
 194
 195 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
 196
 197         * i386-opc.tbl: Add cmovpe and cmovpo.
 198         * i386-tbl.h: Regenerated.
 199
 200 2008-10-22  Nick Clifton  <nickc@redhat.com>
 201
 202         PR 6937
 203         * configure.in (SHARED_LIBADD): Revert previous change.
 204         Add a comment explaining why.
 205         (SHARED_DEPENDENCIES): Revert previous change.
 206         * configure: Regenerate.
 207
 208 2008-10-10  Nick Clifton  <nickc@redhat.com>
 209
 210         PR 6937
 211         * configure.in (SHARED_LIBADD): Add libiberty.a.
 212         (SHARED_DEPENDENCIES): Add libiberty.a.
 213
 214 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 215
 216         * i386-gen.c: Include "hashtab.h".
 217         (next_field): Take a new argument, last.  Check last.
 218         (process_i386_cpu_flag): Updated.
 219         (process_i386_opcode_modifier): Likewise.
 220         (process_i386_operand_type): Likewise.
 221         (process_i386_registers): Likewise.
 222         (output_i386_opcode): New.
 223         (opcode_hash_entry): Likewise.
 224         (opcode_hash_table): Likewise.
 225         (opcode_hash_hash): Likewise.
 226         (opcode_hash_eq): Likewise.
 227         (process_i386_opcodes): Use opcode hash table and opcode array.
 228
 229 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 230
 231         * s390-opc.txt (stdy, stey): Fix description
 232
 233 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
 234
 235         * Makefile.am: Run "make dep-am".
 236         * Makefile.in: Regenerate.
 237
 238 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
 239
 240         * aclocal.m4: Regenerated.
 241         * configure: Likewise.
 242         * Makefile.in: Likewise.
 243
 244 2008-09-29  Nick Clifton  <nickc@redhat.com>
 245
 246         * po/vi.po: Updated Vietnamese translation.
 247         * po/fr.po: Updated French translation.
 248
 249 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
 250
 251         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
 252         (cfxr, cfdr, cfer, clclu): Add esa flag.
 253         (sqd): Instruction added.
 254         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
 255         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
 256
 257 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
 258
 259         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
 260         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
 261
 262 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
 263
 264         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 265         * i386-tbl.h: Regenerated.
 266
 267 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 268
 269         * i386-dis.c (dis386): Adjust far return mnemonics.
 270         * i386-opc.tbl: Add retf.
 271         * i386-tbl.h: Re-generate.
 272
 273 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 274
 275         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 276
 277 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 278
 279         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 280         * ia64-gen.c (lookup_specifier): Likewise.
 281
 282         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 283         * ia64-raw.tbl: Likewise.
 284         * ia64-waw.tbl: Likewise.
 285         * ia64-asmtab.c: Regenerated.
 286
 287 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 288
 289         * i386-opc.tbl: Correct fidivr operand size.
 290
 291         * i386-tbl.h: Regenerated.
 292
 293 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 294
 295         * configure.in: Update a number of obsolete autoconf macros.
 296         * aclocal.m4: Regenerate.
 297
 298 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 299
 300         AVX Programming Reference (August, 2008)
 301         * i386-dis.c (PREFIX_VEX_38DB): New.
 302         (PREFIX_VEX_38DC): Likewise.
 303         (PREFIX_VEX_38DD): Likewise.
 304         (PREFIX_VEX_38DE): Likewise.
 305         (PREFIX_VEX_38DF): Likewise.
 306         (PREFIX_VEX_3ADF): Likewise.
 307         (VEX_LEN_38DB_P_2): Likewise.
 308         (VEX_LEN_38DC_P_2): Likewise.
 309         (VEX_LEN_38DD_P_2): Likewise.
 310         (VEX_LEN_38DE_P_2): Likewise.
 311         (VEX_LEN_38DF_P_2): Likewise.
 312         (VEX_LEN_3ADF_P_2): Likewise.
 313         (PREFIX_VEX_3A04): Updated.
 314         (VEX_LEN_3A06_P_2): Likewise.
 315         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 316         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 317         (x86_64_table): Likewise.
 318         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 319         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 320         VEX_LEN_3ADF_P_2.
 321
 322         * i386-opc.tbl: Add AES + AVX instructions.
 323         * i386-init.h: Regenerated.
 324         * i386-tbl.h: Likewise.
 325
 326 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 327
 328         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 329         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 330
 331 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 332
 333         PR 6526
 334         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 335         * Makefile.in: Regenerate.
 336         * aclocal.m4: Regenerate.
 337         * config.in: Regenerate.
 338         * configure: Regenerate.
 339
 340 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 341
 342         PR 6825
 343         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 344
 345 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 346
 347         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 348
 349         * i386-tbl.h: Regenerated.
 350
 351 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 352
 353         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 354         * Makefile.in: Regenerate.
 355         * po/POTFILES.in: Regenerate.
 356
 357 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 358
 359         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 360         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 361         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 362         * ppc-opc.c (insert_xt6): New static function.
 363         (extract_xt6): Likewise.
 364         (insert_xa6): Likewise.
 365         (extract_xa6: Likewise.
 366         (insert_xb6): Likewise.
 367         (extract_xb6): Likewise.
 368         (insert_xb6s): Likewise.
 369         (extract_xb6s): Likewise.
 370         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 371         XX3DM_MASK, PPCVSX): New.
 372         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 373         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 374
 375 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 376
 377         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 378         * Makefile.in: Regenerate.
 379
 380 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 381
 382         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 383         * i386-tbl.h: Regenerated.
 384
 385 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 386
 387         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 388         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 389         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 390         (powerpc_opcodes): Add Xilinx APU related opcodes.
 391
 392 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 393
 394         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 395
 396 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 397
 398         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 399
 400 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 401
 402         * mips-opc.c (CP): New macro.
 403         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 404         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 405         dmtc2 Octeon instructions.
 406
 407 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 408
 409         * dis-init.c (init_disassemble_info): Init endian_code field.
 410         * arm-dis.c (print_insn): Disassemble code according to
 411         setting of endian_code.
 412         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 413
 414 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 415
 416         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 417         for ELF symbols.
 418
 419 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 420
 421         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 422         (print_ppc_disassembler_options): Likewise.
 423         * ppc-opc.c (PPC464): Define.
 424         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 425
 426 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 427
 428         * configure: Regenerate.
 429
 430 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 431
 432         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 433         ppc_cpu_t typedef.
 434         (struct dis_private): New.
 435         (POWERPC_DIALECT): New define.
 436         (powerpc_dialect): Renamed to...
 437         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 438         struct dis_private.
 439         (print_insn_big_powerpc): Update for using structure in
 440         info->private_data.
 441         (print_insn_little_powerpc): Likewise.
 442         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 443         (skip_optional_operands): Likewise.
 444         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 445         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 446         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 447         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 448         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 449         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 450         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 451         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 452         param to be of type ppc_cpu_t.  Update prototype.
 453
 454 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 455
 456         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 457         +s, +S.
 458         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 459         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 460         syncw, syncws, vm3mulu, vm0 and vmulu.
 461
 462         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 463         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 464         seqi, sne and snei.
 465
 466 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 467
 468         * i386-opc.tbl: Add vmovd with 64bit operand.
 469         * i386-tbl.h: Regenerated.
 470
 471 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 472
 473         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 474
 475 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 476
 477         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 478         * i386-tbl.h: Regenerated.
 479
 480 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 481
 482         PR gas/6517
 483         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 484         into 32bit and 64bit.  Remove Reg64|Qword and add
 485         IgnoreSize|No_qSuf on 32bit version.
 486         * i386-tbl.h: Regenerated.
 487
 488 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 489
 490         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 491         * i386-tbl.h: Regenerated.
 492
 493 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 494
 495         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 496
 497 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 498
 499         * Makefile.am: Run "make dep-am".
 500         * Makefile.in: Regenerate.
 501
 502 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 503
 504         * i386-dis.c (MOVBE_Fixup): New.
 505         (Mo): Likewise.
 506         (PREFIX_0F3880): Likewise.
 507         (PREFIX_0F3881): Likewise.
 508         (PREFIX_0F38F0): Updated.
 509         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 510         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 511         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 512
 513         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 514         CPU_EPT_FLAGS.
 515         (cpu_flags): Add CpuMovbe and CpuEPT.
 516
 517         * i386-opc.h (CpuMovbe): New.
 518         (CpuEPT): Likewise.
 519         (CpuLM): Updated.
 520         (i386_cpu_flags): Add cpumovbe and cpuept.
 521
 522         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 523         * i386-init.h: Regenerated.
 524         * i386-tbl.h: Likewise.
 525
 526 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 527
 528         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 529         the two drem and the two dremu macros.
 530
 531 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 532
 533         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 534         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 535         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 536         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 537
 538 2008-04-25  David S. Miller  <davem@davemloft.net>
 539
 540         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 541         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 542
 543 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 544
 545         * aclocal.m4: Regenerate.
 546         * configure: Regenerate.
 547
 548 2008-04-23  David S. Miller  <davem@davemloft.net>
 549
 550         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 551         extended values.
 552         (prefetch_table): Add missing values.
 553
 554 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 555
 556         * i386-gen.c (opcode_modifiers): Add NoAVX.
 557
 558         * i386-opc.h (NoAVX): New.
 559         (OldGcc): Updated.
 560         (i386_opcode_modifier): Add noavx.
 561
 562         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 563         instructions which don't have AVX equivalent.
 564         * i386-tbl.h: Regenerated.
 565
 566 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 567
 568         * i386-dis.c (OP_VEX_FMA): New.
 569         (OP_EX_VexImmW): Likewise.
 570         (VexFMA): Likewise.
 571         (Vex128FMA): Likewise.
 572         (EXVexImmW): Likewise.
 573         (get_vex_imm8): Likewise.
 574         (OP_EX_VexReg): Likewise.
 575         (vex_i4_done): Renamed to ...
 576         (vex_w_done): This.
 577         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 578         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 579         FMA instructions.
 580         (print_insn): Updated.
 581         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 582         (OP_REG_VexI4): Check invalid high registers.
 583
 584 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 585             Michael Meissner  <michael.meissner@amd.com>
 586
 587         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 588         * i386-tbl.h: Regenerate from i386-opc.tbl.
 589
 590 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 591
 592         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 593         accept Power E500MC instructions.
 594         (print_ppc_disassembler_options): Document -Me500mc.
 595         * ppc-opc.c (DUIS, DUI, T): New.
 596         (XRT, XRTRA): Likewise.
 597         (E500MC): Likewise.
 598         (powerpc_opcodes): Add new Power E500MC instructions.
 599
 600 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 601
 602         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 603         (print_s390_disassembler_options): New function.
 604         * disassemble.c (disassembler_usage): Invoke
 605         print_s390_disassembler_options.
 606
 607 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 608
 609         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 610         of local variables used for mnemonic parsing: prefix, suffix and
 611         number.
 612
 613 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 614
 615         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 616         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 617         (s390_crb_extensions): New extensions table.
 618         (insertExpandedMnemonic): Handle '$' tag.
 619         * s390-opc.txt: Remove conditional jump variants which can now
 620         be expanded automatically.
 621         Replace '*' tag with '$' in the compare and branch instructions.
 622
 623 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 624
 625         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 626         (PREFIX_VEX_3AXX): Likewis.
 627
 628 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 629
 630         * i386-opc.tbl: Remove 4 extra blank lines.
 631
 632 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 633
 634         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 635         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 636         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 637         * i386-opc.tbl: Likewise.
 638
 639         * i386-opc.h (CpuCLMUL): Renamed to ...
 640         (CpuPCLMUL): This.
 641         (CpuFMA): Updated.
 642         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 643
 644         * i386-init.h: Regenerated.
 645
 646 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 647
 648         * i386-dis.c (OP_E_register): New.
 649         (OP_E_memory): Likewise.
 650         (OP_VEX): Likewise.
 651         (OP_EX_Vex): Likewise.
 652         (OP_EX_VexW): Likewise.
 653         (OP_XMM_Vex): Likewise.
 654         (OP_XMM_VexW): Likewise.
 655         (OP_REG_VexI4): Likewise.
 656         (PCLMUL_Fixup): Likewise.
 657         (VEXI4_Fixup): Likewise.
 658         (VZERO_Fixup): Likewise.
 659         (VCMP_Fixup): Likewise.
 660         (VPERMIL2_Fixup): Likewise.
 661         (rex_original): Likewise.
 662         (rex_ignored): Likewise.
 663         (Mxmm): Likewise.
 664         (XMM): Likewise.
 665         (EXxmm): Likewise.
 666         (EXxmmq): Likewise.
 667         (EXymmq): Likewise.
 668         (Vex): Likewise.
 669         (Vex128): Likewise.
 670         (Vex256): Likewise.
 671         (VexI4): Likewise.
 672         (EXdVex): Likewise.
 673         (EXqVex): Likewise.
 674         (EXVexW): Likewise.
 675         (EXdVexW): Likewise.
 676         (EXqVexW): Likewise.
 677         (XMVex): Likewise.
 678         (XMVexW): Likewise.
 679         (XMVexI4): Likewise.
 680         (PCLMUL): Likewise.
 681         (VZERO): Likewise.
 682         (VCMP): Likewise.
 683         (VPERMIL2): Likewise.
 684         (xmm_mode): Likewise.
 685         (xmmq_mode): Likewise.
 686         (ymmq_mode): Likewise.
 687         (vex_mode): Likewise.
 688         (vex128_mode): Likewise.
 689         (vex256_mode): Likewise.
 690         (USE_VEX_C4_TABLE): Likewise.
 691         (USE_VEX_C5_TABLE): Likewise.
 692         (USE_VEX_LEN_TABLE): Likewise.
 693         (VEX_C4_TABLE): Likewise.
 694         (VEX_C5_TABLE): Likewise.
 695         (VEX_LEN_TABLE): Likewise.
 696         (REG_VEX_XX): Likewise.
 697         (MOD_VEX_XXX): Likewise.
 698         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 699         (PREFIX_0F3A44): Likewise.
 700         (PREFIX_0F3ADF): Likewise.
 701         (PREFIX_VEX_XXX): Likewise.
 702         (VEX_OF): Likewise.
 703         (VEX_OF38): Likewise.
 704         (VEX_OF3A): Likewise.
 705         (VEX_LEN_XXX): Likewise.
 706         (vex): Likewise.
 707         (need_vex): Likewise.
 708         (need_vex_reg): Likewise.
 709         (vex_i4_done): Likewise.
 710         (vex_table): Likewise.
 711         (vex_len_table): Likewise.
 712         (OP_REG_VexI4): Likewise.
 713         (vex_cmp_op): Likewise.
 714         (pclmul_op): Likewise.
 715         (vpermil2_op): Likewise.
 716         (m_mode): Updated.
 717         (es_reg): Likewise.
 718         (PREFIX_0F38F0): Likewise.
 719         (PREFIX_0F3A60): Likewise.
 720         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 721         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 722         and PREFIX_VEX_XXX entries.
 723         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 724         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 725         PREFIX_0F3ADF.
 726         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 727         Add MOD_VEX_XXX entries.
 728         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 729         REX byte in rex_original.
 730         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 731         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 732         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 733         calling get_valid_dis386.  Use rex_original and rex_ignored when
 734         printing out REX.
 735         (putop): Handle "XY".
 736         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 737         ymmq_mode.
 738         (OP_E_extended): Updated to use OP_E_register and
 739         OP_E_memory.
 740         (OP_XMM): Handle VEX.
 741         (OP_EX): Likewise.
 742         (XMM_Fixup): Likewise.
 743         (CMP_Fixup): Use ARRAY_SIZE.
 744
 745         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 746         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 747         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 748         OPERAND_TYPE_VEX_IMM4.
 749         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 750         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 751         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 752         VexImmExt and SSE2AVX.
 753         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 754
 755         * i386-opc.h (CpuAVX): New.
 756         (CpuAES): Likewise.
 757         (CpuCLMUL): Likewise.
 758         (CpuFMA): Likewise.
 759         (Vex): Likewise.
 760         (Vex256): Likewise.
 761         (VexNDS): Likewise.
 762         (VexNDD): Likewise.
 763         (VexW0): Likewise.
 764         (VexW1): Likewise.
 765         (Vex0F): Likewise.
 766         (Vex0F38): Likewise.
 767         (Vex0F3A): Likewise.
 768         (Vex3Sources): Likewise.
 769         (VexImmExt): Likewise.
 770         (SSE2AVX): Likewise.
 771         (RegYMM): Likewise.
 772         (Ymmword): Likewise.
 773         (Vex_Imm4): Likewise.
 774         (Implicit1stXmm0): Likewise.
 775         (CpuXsave): Updated.
 776         (CpuLM): Likewise.
 777         (ByteOkIntel): Likewise.
 778         (OldGcc): Likewise.
 779         (Control): Likewise.
 780         (Unspecified): Likewise.
 781         (OTMax): Likewise.
 782         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 783         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 784         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 785         vex3sources, veximmext and sse2avx.
 786         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 787
 788         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 789
 790         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 791
 792         * i386-init.h: Regenerated.
 793         * i386-tbl.h: Likewise.
 794
 795 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 796
 797         From  Robin Getz  <robin.getz@analog.com>
 798         * bfin-dis.c (bu32): Typedef.
 799         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 800         (constant_formats[]): Add uimm32 and huimm16.
 801         (fmtconst_val): New.
 802         (uimm32): Define.
 803         (huimm32): Define.
 804         (imm16_val): Define.
 805         (luimm16_val): Define.
 806         (struct saved_state): Define.
 807         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 808         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 809         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 810         (get_allreg): New.
 811         (decode_LDIMMhalf_0): Print out the whole register value.
 812
 813         From Jie Zhang  <jie.zhang@analog.com>
 814         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 815         multiply and multiply-accumulate to data register instruction.
 816
 817         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 818         c_imm32, c_huimm32e): Define.
 819         (constant_formats): Add flags for printing decimal, leading spaces, and
 820         exact symbols.
 821         (comment, parallel): Add global flags in all disassembly.
 822         (fmtconst): Take advantage of new flags, and print default in hex.
 823         (fmtconst_val): Likewise.
 824         (decode_macfunc): Be consistant with spaces, tabs, comments,
 825         capitalization in disassembly, fix minor coding style issues.
 826         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 827         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 828         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 829         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 830         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 831         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 832         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 833         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 834         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 835         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 836         _print_insn_bfin, print_insn_bfin): Likewise.
 837
 838 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 839
 840         * aclocal.m4: Regenerate.
 841         * configure: Likewise.
 842         * Makefile.in: Likewise.
 843
 844 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 845
 846         * Makefile.am: Run "make dep-am".
 847         * Makefile.in: Regenerate.
 848         * configure: Regenerate.
 849
 850 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 851
 852         * ppc-opc.c (powerpc_opcodes): Order and format.
 853
 854 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 855
 856         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 857         * i386-tbl.h: Regenerated.
 858
 859 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 860
 861         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 862         x86-64.
 863         * i386-tbl.h: Regenerated.
 864
 865 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 866
 867         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 868         and Fword for far indirect jmp. Allow Reg16 and Word for near
 869         indirect jmp on x86-64. Disallow Fword for lcall.
 870         * i386-tbl.h: Re-generate.
 871
 872 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 873
 874         * cr16-opc.c  (cr16_num_optab): Defined
 875
 876 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 877
 878         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 879         * i386-init.h: Regenerated.
 880
 881 2008-02-14  Nick Clifton  <nickc@redhat.com>
 882
 883         PR binutils/5524
 884         * configure.in (SHARED_LIBADD): Select the correct host specific
 885         file extension for shared libraries.
 886         * configure: Regenerate.
 887
 888 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 889
 890         * i386-opc.h (RegFlat): New.
 891         * i386-reg.tbl (flat): Add.
 892         * i386-tbl.h: Re-generate.
 893
 894 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 895
 896         * i386-dis.c (a_mode): New.
 897         (cond_jump_mode): Adjust.
 898         (Ma): Change to a_mode.
 899         (intel_operand_size): Handle a_mode.
 900         * i386-opc.tbl: Allow Dword and Qword for bound.
 901         * i386-tbl.h: Re-generate.
 902
 903 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 904
 905         * i386-gen.c (process_i386_registers): Process new fields.
 906         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 907         unsigned char. Add dw2_regnum and Dw2Inval.
 908         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 909         register names.
 910         * i386-tbl.h: Re-generate.
 911
 912 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 913
 914         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 915         * i386-init.h: Updated.
 916
 917 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 918
 919         * i386-gen.c (cpu_flags): Add CpuXsave.
 920
 921         * i386-opc.h (CpuXsave): New.
 922         (CpuLM): Updated.
 923         (i386_cpu_flags): Add cpuxsave.
 924
 925         * i386-dis.c (MOD_0FAE_REG_4): New.
 926         (RM_0F01_REG_2): Likewise.
 927         (MOD_0FAE_REG_5): Updated.
 928         (RM_0F01_REG_3): Likewise.
 929         (reg_table): Use MOD_0FAE_REG_4.
 930         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 931         for xrstor.
 932         (rm_table): Add RM_0F01_REG_2.
 933
 934         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 935         * i386-init.h: Regenerated.
 936         * i386-tbl.h: Likewise.
 937
 938 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 939
 940         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 941         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 942         * i386-tbl.h: Re-generate.
 943
 944 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 945
 946         PR 5715
 947         * configure: Regenerated.
 948
 949 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 950
 951         * mips-dis.c: Update copyright.
 952         (mips_arch_choices): Add Octeon.
 953         * mips-opc.c: Update copyright.
 954         (IOCT): New macro.
 955         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 956
 957 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 958
 959         * ppc-opc.c: Support optional L form mtmsr.
 960
 961 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 962
 963         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 964
 965 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 966
 967         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 968         * i386-init.h: Regenerated.
 969
 970 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 971
 972         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 973         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 974
 975 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 976
 977         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 978         (cpu_flags): Likewise.
 979
 980         * i386-opc.h (CpuMMX2): Removed.
 981         (CpuSSE): Updated.
 982
 983         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 984         * i386-init.h: Regenerated.
 985         * i386-tbl.h: Likewise.
 986
 987 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 988
 989         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 990         CPU_SMX_FLAGS.
 991         * i386-init.h: Regenerated.
 992
 993 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 994
 995         * i386-opc.tbl: Use Qword on movddup.
 996         * i386-tbl.h: Regenerated.
 997
 998 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 999
1000         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
1001         * i386-tbl.h: Regenerated.
1002
1003 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1004
1005         * i386-dis.c (Mx): New.
1006         (PREFIX_0FC3): Likewise.
1007         (PREFIX_0FC7_REG_6): Updated.
1008         (dis386_twobyte): Use PREFIX_0FC3.
1009         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
1010         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
1011         movntss.
1012
1013 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
1014
1015         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
1016         (operand_types): Add Mem.
1017
1018         * i386-opc.h (IntelSyntax): New.
1019         * i386-opc.h (Mem): New.
1020         (Byte): Updated.
1021         (Opcode_Modifier_Max): Updated.
1022         (i386_opcode_modifier): Add intelsyntax.
1023         (i386_operand_type): Add mem.
1024
1025         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
1026         instructions.
1027
1028         * i386-reg.tbl: Add size for accumulator.
1029
1030         * i386-init.h: Regenerated.
1031         * i386-tbl.h: Likewise.
1032
1033 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
1034
1035         * i386-opc.h (Byte): Fix a typo.
1036
1037 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1038
1039         PR gas/5534
1040         * i386-gen.c (operand_type_init): Add Dword to
1041         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
1042         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
1043         Qword and Xmmword.
1044         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
1045         Xmmword, Unspecified and Anysize.
1046         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
1047         an alias of Xmmword.
1048
1049         * i386-opc.h (CheckSize): Removed.
1050         (Byte): Updated.
1051         (Word): Likewise.
1052         (Dword): Likewise.
1053         (Qword): Likewise.
1054         (Xmmword): Likewise.
1055         (FWait): Updated.
1056         (OTMax): Likewise.
1057         (i386_opcode_modifier): Remove checksize, byte, word, dword,
1058         qword and xmmword.
1059         (Fword): New.
1060         (TBYTE): Likewise.
1061         (Unspecified): Likewise.
1062         (Anysize): Likewise.
1063         (i386_operand_type): Add byte, word, dword, fword, qword,
1064         tbyte xmmword, unspecified and anysize.
1065
1066         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1067         Tbyte, Xmmword, Unspecified and Anysize.
1068
1069         * i386-reg.tbl: Add size for accumulator.
1070
1071         * i386-init.h: Regenerated.
1072         * i386-tbl.h: Likewise.
1073
1074 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1075
1076         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1077         (REG_0F18): Updated.
1078         (reg_table): Updated.
1079         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
1080         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1081
1082 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1083
1084         * i386-gen.c (set_bitfield): Use fail () on error.
1085
1086 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1087
1088         * i386-gen.c (lineno): New.
1089         (filename): Likewise.
1090         (set_bitfield): Report filename and line numer on error.
1091         (process_i386_opcodes): Set filename and update lineno.
1092         (process_i386_registers): Likewise.
1093
1094 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
1095
1096         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1097         ATTSyntax.
1098
1099         * i386-opc.h (IntelMnemonic): Renamed to ..
1100         (ATTSyntax): This
1101         (Opcode_Modifier_Max): Updated.
1102         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1103         and intelsyntax.
1104
1105         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1106         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1107         * i386-tbl.h: Regenerated.
1108
1109 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1110
1111         * i386-gen.c: Update copyright to 2008.
1112         * i386-opc.h: Likewise.
1113         * i386-opc.tbl: Likewise.
1114
1115         * i386-init.h: Regenerated.
1116         * i386-tbl.h: Likewise.
1117
1118 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1119
1120         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1121         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1122         * i386-tbl.h: Regenerated.
1123
1124 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1125
1126         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1127         CpuSSE4_2_Or_ABM.
1128         (cpu_flags): Likewise.
1129
1130         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1131         (CpuSSE4_2_Or_ABM): Likewise.
1132         (CpuLM): Updated.
1133         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1134
1135         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1136         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1137         and CpuPadLock, respectively.
1138         * i386-init.h: Regenerated.
1139         * i386-tbl.h: Likewise.
1140
1141 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1142
1143         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1144
1145         * i386-opc.h (No_xSuf): Removed.
1146         (CheckSize): Updated.
1147
1148         * i386-tbl.h: Regenerated.
1149
1150 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1151
1152         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1153         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1154         CPU_SSE5_FLAGS.
1155         (cpu_flags): Add CpuSSE4_2_Or_ABM.
1156
1157         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1158         (CpuLM): Updated.
1159         (i386_cpu_flags): Add cpusse4_2_or_abm.
1160
1161         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1162         CpuABM|CpuSSE4_2 on popcnt.
1163         * i386-init.h: Regenerated.
1164         * i386-tbl.h: Likewise.
1165
1166 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1167
1168         * i386-opc.h: Update comments.
1169
1170 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1171
1172         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1173         * i386-opc.h: Likewise.
1174         * i386-opc.tbl: Likewise.
1175
1176 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1177
1178         PR gas/5534
1179         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1180         Byte, Word, Dword, QWord and Xmmword.
1181
1182         * i386-opc.h (No_xSuf): New.
1183         (CheckSize): Likewise.
1184         (Byte): Likewise.
1185         (Word): Likewise.
1186         (Dword): Likewise.
1187         (QWord): Likewise.
1188         (Xmmword): Likewise.
1189         (FWait): Updated.
1190         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1191         Dword, QWord and Xmmword.
1192
1193         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1194         used.
1195         * i386-tbl.h: Regenerated.
1196
1197 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1198
1199         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1200         From Miod Vallat.
1201
1202 For older changes see ChangeLog-2007
1203 \f
1204 Local Variables:
1205 mode: change-log
1206 left-margin: 8
1207 fill-column: 74
1208 version-control: never
1209 End: