1 2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (PREFIX_MANDATORY_REPZ): Removed.
4 (PREFIX_MANDATORY_REPNZ): Likewise.
5 (PREFIX_MANDATORY_DATA): Likewise.
6 (PREFIX_MANDATORY_ADDR): Likewise.
7 (PREFIX_MANDATORY_LOCK): Likewise.
8 (PREFIX_MANDATORY): Likewise.
9 (PREFIX_UD_SHIFT): Set to 8
10 (PREFIX_UD_REPZ): Updated.
11 (PREFIX_UD_REPNZ): Likewise.
12 (PREFIX_UD_DATA): Likewise.
13 (PREFIX_UD_ADDR): Likewise.
14 (PREFIX_UD_LOCK): Likewise.
15 (PREFIX_IGNORED_SHIFT): New.
16 (PREFIX_IGNORED_REPZ): Likewise.
17 (PREFIX_IGNORED_REPNZ): Likewise.
18 (PREFIX_IGNORED_DATA): Likewise.
19 (PREFIX_IGNORED_ADDR): Likewise.
20 (PREFIX_IGNORED_LOCK): Likewise.
21 (PREFIX_OPCODE): Likewise.
22 (PREFIX_IGNORED): Likewise.
23 (Bad_Opcode): Replace PREFIX_MANDATORY with 0.
24 (dis386_twobyte): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
25 (three_byte_table): Likewise.
26 (mod_table): Likewise.
27 (mandatory_prefix): Renamed to ...
28 (prefix_requirement): This.
29 (prefix_table): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
30 Update PREFIX_90 entry.
31 (get_valid_dis386): Check prefix_requirement to see if a prefix
33 (print_insn): Replace mandatory_prefix with prefix_requirement.
35 2015-04-15 Renlin Li <renlin.li@arm.com>
37 * arm-dis.c (thumb32_opcodes): Define 'D' format control code,
38 use it for ssat and ssat16.
39 (print_insn_thumb32): Add handle case for 'D' control code.
41 2015-04-06 Ilya Tocar <ilya.tocar@intel.com>
42 H.J. Lu <hongjiu.lu@intel.com>
44 * i386-dis-evex.h (evex_table): Fill prefix_requirement field.
45 * i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
46 PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
47 PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
48 PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
49 (Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
50 Fill prefix_requirement field.
51 (struct dis386): Add prefix_requirement field.
52 (dis386): Fill prefix_requirement field.
53 (dis386_twobyte): Ditto.
54 (twobyte_has_mandatory_prefix_: Remove.
55 (reg_table): Fill prefix_requirement field.
56 (prefix_table): Ditto.
57 (x86_64_table): Ditto.
58 (three_byte_table): Ditto.
61 (vex_len_table): Ditto.
65 (print_insn): Use prefix_requirement.
66 (FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
67 FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
70 2015-03-30 Mike Frysinger <vapier@gentoo.org>
72 * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
74 2015-03-29 H.J. Lu <hongjiu.lu@intel.com>
76 * Makefile.in: Regenerated.
78 2015-03-25 Anton Blanchard <anton@samba.org>
80 * ppc-dis.c (disassemble_init_powerpc): Only initialise
81 powerpc_opcd_indices and vle_opcd_indices once.
83 2015-03-25 Anton Blanchard <anton@samba.org>
85 * ppc-opc.c (powerpc_opcodes): Add slbfee.
87 2015-03-24 Terry Guo <terry.guo@arm.com>
89 * arm-dis.c (opcode32): Updated to use new arm feature struct.
91 (coprocessor_opcodes): Replace bit with feature struct.
92 (neon_opcodes): Likewise.
93 (arm_opcodes): Likewise.
94 (thumb_opcodes): Likewise.
95 (thumb32_opcodes): Likewise.
96 (print_insn_coprocessor): Likewise.
97 (print_insn_arm): Likewise.
98 (select_arm_features): Follow new feature struct.
100 2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
102 * i386-dis.c (rm_table): Add clzero.
103 * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
104 Add CPU_CLZERO_FLAGS.
105 (cpu_flags): Add CpuCLZERO.
106 * i386-opc.h: Add CpuCLZERO.
107 * i386-opc.tbl: Add clzero.
108 * i386-init.h: Re-generated.
109 * i386-tbl.h: Re-generated.
111 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
113 * mips-opc.c (decode_mips_operand): Fix constraint issues
114 with u and y operands.
116 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
118 * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
120 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
122 * s390-opc.c: Add new IBM z13 instructions.
123 * s390-opc.txt: Likewise.
125 2015-03-10 Renlin Li <renlin.li@arm.com>
127 * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
128 stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
130 * aarch64-asm-2.c: Regenerate.
131 * aarch64-dis-2.c: Likewise.
132 * aarch64-opc-2.c: Likewise.
134 2015-03-03 Jiong Wang <jiong.wang@arm.com>
136 * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
138 2015-02-25 Oleg Endo <olegendo@gcc.gnu.org>
140 * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
142 (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
143 arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
145 2015-02-23 Vinay <Vinay.G@kpit.com>
147 * rl78-decode.opc (MOV): Added space between two operands for
148 'mov' instruction in index addressing mode.
149 * rl78-decode.c: Regenerate.
151 2015-02-19 Pedro Alves <palves@redhat.com>
153 * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
155 2015-02-10 Pedro Alves <palves@redhat.com>
156 Tom Tromey <tromey@redhat.com>
158 * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
159 microblaze_and, microblaze_xor.
160 * microblaze-opc.h (opcodes): Adjust.
162 2015-01-28 James Bowman <james.bowman@ftdichip.com>
164 * Makefile.am: Add FT32 files.
165 * configure.ac: Handle FT32.
166 * disassemble.c (disassembler): Call print_insn_ft32.
167 * ft32-dis.c: New file.
168 * ft32-opc.c: New file.
169 * Makefile.in: Regenerate.
170 * configure: Regenerate.
171 * po/POTFILES.in: Regenerate.
173 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
175 * nds32-asm.c (keyword_sr): Add new system registers.
177 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
179 * s390-dis.c (s390_extract_operand): Support vector register
181 (s390_print_insn_with_opcode): Support new operands types and add
182 new handling of optional operands.
183 * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
184 and include opcode/s390.h instead.
185 (struct op_struct): New field `flags'.
186 (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
187 (dumpTable): Dump flags.
188 (main): Parse flags from the s390-opc.txt file. Add z13 as cpu
190 * s390-opc.c: Add new operands types, instruction formats, and
192 (s390_opformats): Add new formats for .insn.
193 * s390-opc.txt: Add new instructions.
195 2015-01-01 Alan Modra <amodra@gmail.com>
197 Update year range in copyright notice of all files.
199 For older changes see ChangeLog-2014
201 Copyright (C) 2015 Free Software Foundation, Inc.
203 Copying and distribution of this file, with or without modification,
204 are permitted in any medium without royalty provided the copyright
205 notice and this notice are preserved.
211 version-control: never