opcodes/ChangeLog

   1 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-opc.tbl: Correct fidivr operand size.
   4
   5         * i386-tbl.h: Regenerated.
   6
   7 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
   8
   9         * configure.in: Update a number of obsolete autoconf macros.
  10         * aclocal.m4: Regenerate.
  11
  12 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
  13
  14         AVX Programming Reference (August, 2008)
  15         * i386-dis.c (PREFIX_VEX_38DB): New.
  16         (PREFIX_VEX_38DC): Likewise.
  17         (PREFIX_VEX_38DD): Likewise.
  18         (PREFIX_VEX_38DE): Likewise.
  19         (PREFIX_VEX_38DF): Likewise.
  20         (PREFIX_VEX_3ADF): Likewise.
  21         (VEX_LEN_38DB_P_2): Likewise.
  22         (VEX_LEN_38DC_P_2): Likewise.
  23         (VEX_LEN_38DD_P_2): Likewise.
  24         (VEX_LEN_38DE_P_2): Likewise.
  25         (VEX_LEN_38DF_P_2): Likewise.
  26         (VEX_LEN_3ADF_P_2): Likewise.
  27         (PREFIX_VEX_3A04): Updated.
  28         (VEX_LEN_3A06_P_2): Likewise.
  29         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  30         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  31         (x86_64_table): Likewise.
  32         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  33         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  34         VEX_LEN_3ADF_P_2.
  35
  36         * i386-opc.tbl: Add AES + AVX instructions.
  37         * i386-init.h: Regenerated.
  38         * i386-tbl.h: Likewise.
  39
  40 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  41
  42         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  43         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  44
  45 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
  46
  47         PR 6526
  48         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  49         * Makefile.in: Regenerate.
  50         * aclocal.m4: Regenerate.
  51         * config.in: Regenerate.
  52         * configure: Regenerate.
  53
  54 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  55
  56         PR 6825
  57         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  58
  59 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
  60
  61         * i386-opc.tbl: Add syscall and sysret for Cpu64.
  62
  63         * i386-tbl.h: Regenerated.
  64
  65 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  66
  67         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  68         * Makefile.in: Regenerate.
  69         * po/POTFILES.in: Regenerate.
  70
  71 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  72
  73         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  74         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  75         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  76         * ppc-opc.c (insert_xt6): New static function.
  77         (extract_xt6): Likewise.
  78         (insert_xa6): Likewise.
  79         (extract_xa6: Likewise.
  80         (insert_xb6): Likewise.
  81         (extract_xb6): Likewise.
  82         (insert_xb6s): Likewise.
  83         (extract_xb6s): Likewise.
  84         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  85         XX3DM_MASK, PPCVSX): New.
  86         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  87         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  88
  89 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
  90
  91         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
  92         * Makefile.in: Regenerate.
  93
  94 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
  95
  96         * i386-reg.tbl: Use Dw2Inval on AVX registers.
  97         * i386-tbl.h: Regenerated.
  98
  99 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 100
 101         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 102         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 103         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 104         (powerpc_opcodes): Add Xilinx APU related opcodes.
 105
 106 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 107
 108         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 109
 110 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 111
 112         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 113
 114 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 115
 116         * mips-opc.c (CP): New macro.
 117         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 118         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 119         dmtc2 Octeon instructions.
 120
 121 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 122
 123         * dis-init.c (init_disassemble_info): Init endian_code field.
 124         * arm-dis.c (print_insn): Disassemble code according to
 125         setting of endian_code.
 126         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 127
 128 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 129
 130         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 131         for ELF symbols.
 132
 133 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 134
 135         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 136         (print_ppc_disassembler_options): Likewise.
 137         * ppc-opc.c (PPC464): Define.
 138         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 139
 140 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 141
 142         * configure: Regenerate.
 143
 144 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 145
 146         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 147         ppc_cpu_t typedef.
 148         (struct dis_private): New.
 149         (POWERPC_DIALECT): New define.
 150         (powerpc_dialect): Renamed to...
 151         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 152         struct dis_private.
 153         (print_insn_big_powerpc): Update for using structure in
 154         info->private_data.
 155         (print_insn_little_powerpc): Likewise.
 156         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 157         (skip_optional_operands): Likewise.
 158         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 159         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 160         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 161         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 162         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 163         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 164         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 165         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 166         param to be of type ppc_cpu_t.  Update prototype.
 167
 168 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 169
 170         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 171         +s, +S.
 172         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 173         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 174         syncw, syncws, vm3mulu, vm0 and vmulu.
 175
 176         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 177         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 178         seqi, sne and snei.
 179
 180 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 181
 182         * i386-opc.tbl: Add vmovd with 64bit operand.
 183         * i386-tbl.h: Regenerated.
 184
 185 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 186
 187         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 188
 189 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 190
 191         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 192         * i386-tbl.h: Regenerated.
 193
 194 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 195
 196         PR gas/6517
 197         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 198         into 32bit and 64bit.  Remove Reg64|Qword and add
 199         IgnoreSize|No_qSuf on 32bit version.
 200         * i386-tbl.h: Regenerated.
 201
 202 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 203
 204         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 205         * i386-tbl.h: Regenerated.
 206
 207 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 208
 209         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 210
 211 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 212
 213         * Makefile.am: Run "make dep-am".
 214         * Makefile.in: Regenerate.
 215
 216 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 217
 218         * i386-dis.c (MOVBE_Fixup): New.
 219         (Mo): Likewise.
 220         (PREFIX_0F3880): Likewise.
 221         (PREFIX_0F3881): Likewise.
 222         (PREFIX_0F38F0): Updated.
 223         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 224         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 225         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 226
 227         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 228         CPU_EPT_FLAGS.
 229         (cpu_flags): Add CpuMovbe and CpuEPT.
 230
 231         * i386-opc.h (CpuMovbe): New.
 232         (CpuEPT): Likewise.
 233         (CpuLM): Updated.
 234         (i386_cpu_flags): Add cpumovbe and cpuept.
 235
 236         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 237         * i386-init.h: Regenerated.
 238         * i386-tbl.h: Likewise.
 239
 240 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 241
 242         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 243         the two drem and the two dremu macros.
 244
 245 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 246
 247         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 248         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 249         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 250         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 251
 252 2008-04-25  David S. Miller  <davem@davemloft.net>
 253
 254         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 255         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 256
 257 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 258
 259         * aclocal.m4: Regenerate.
 260         * configure: Regenerate.
 261
 262 2008-04-23  David S. Miller  <davem@davemloft.net>
 263
 264         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 265         extended values.
 266         (prefetch_table): Add missing values.
 267
 268 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 269
 270         * i386-gen.c (opcode_modifiers): Add NoAVX.
 271
 272         * i386-opc.h (NoAVX): New.
 273         (OldGcc): Updated.
 274         (i386_opcode_modifier): Add noavx.
 275
 276         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 277         instructions which don't have AVX equivalent.
 278         * i386-tbl.h: Regenerated.
 279
 280 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 281
 282         * i386-dis.c (OP_VEX_FMA): New.
 283         (OP_EX_VexImmW): Likewise.
 284         (VexFMA): Likewise.
 285         (Vex128FMA): Likewise.
 286         (EXVexImmW): Likewise.
 287         (get_vex_imm8): Likewise.
 288         (OP_EX_VexReg): Likewise.
 289         (vex_i4_done): Renamed to ...
 290         (vex_w_done): This.
 291         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 292         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 293         FMA instructions.
 294         (print_insn): Updated.
 295         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 296         (OP_REG_VexI4): Check invalid high registers.
 297
 298 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 299             Michael Meissner  <michael.meissner@amd.com>
 300
 301         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 302         * i386-tbl.h: Regenerate from i386-opc.tbl.
 303
 304 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 305
 306         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 307         accept Power E500MC instructions.
 308         (print_ppc_disassembler_options): Document -Me500mc.
 309         * ppc-opc.c (DUIS, DUI, T): New.
 310         (XRT, XRTRA): Likewise.
 311         (E500MC): Likewise.
 312         (powerpc_opcodes): Add new Power E500MC instructions.
 313
 314 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 315
 316         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 317         (print_s390_disassembler_options): New function.
 318         * disassemble.c (disassembler_usage): Invoke
 319         print_s390_disassembler_options.
 320
 321 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 322
 323         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 324         of local variables used for mnemonic parsing: prefix, suffix and
 325         number.
 326
 327 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 328
 329         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 330         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 331         (s390_crb_extensions): New extensions table.
 332         (insertExpandedMnemonic): Handle '$' tag.
 333         * s390-opc.txt: Remove conditional jump variants which can now
 334         be expanded automatically.
 335         Replace '*' tag with '$' in the compare and branch instructions.
 336
 337 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 338
 339         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 340         (PREFIX_VEX_3AXX): Likewis.
 341
 342 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 343
 344         * i386-opc.tbl: Remove 4 extra blank lines.
 345
 346 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 347
 348         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 349         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 350         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 351         * i386-opc.tbl: Likewise.
 352
 353         * i386-opc.h (CpuCLMUL): Renamed to ...
 354         (CpuPCLMUL): This.
 355         (CpuFMA): Updated.
 356         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 357
 358         * i386-init.h: Regenerated.
 359
 360 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 361
 362         * i386-dis.c (OP_E_register): New.
 363         (OP_E_memory): Likewise.
 364         (OP_VEX): Likewise.
 365         (OP_EX_Vex): Likewise.
 366         (OP_EX_VexW): Likewise.
 367         (OP_XMM_Vex): Likewise.
 368         (OP_XMM_VexW): Likewise.
 369         (OP_REG_VexI4): Likewise.
 370         (PCLMUL_Fixup): Likewise.
 371         (VEXI4_Fixup): Likewise.
 372         (VZERO_Fixup): Likewise.
 373         (VCMP_Fixup): Likewise.
 374         (VPERMIL2_Fixup): Likewise.
 375         (rex_original): Likewise.
 376         (rex_ignored): Likewise.
 377         (Mxmm): Likewise.
 378         (XMM): Likewise.
 379         (EXxmm): Likewise.
 380         (EXxmmq): Likewise.
 381         (EXymmq): Likewise.
 382         (Vex): Likewise.
 383         (Vex128): Likewise.
 384         (Vex256): Likewise.
 385         (VexI4): Likewise.
 386         (EXdVex): Likewise.
 387         (EXqVex): Likewise.
 388         (EXVexW): Likewise.
 389         (EXdVexW): Likewise.
 390         (EXqVexW): Likewise.
 391         (XMVex): Likewise.
 392         (XMVexW): Likewise.
 393         (XMVexI4): Likewise.
 394         (PCLMUL): Likewise.
 395         (VZERO): Likewise.
 396         (VCMP): Likewise.
 397         (VPERMIL2): Likewise.
 398         (xmm_mode): Likewise.
 399         (xmmq_mode): Likewise.
 400         (ymmq_mode): Likewise.
 401         (vex_mode): Likewise.
 402         (vex128_mode): Likewise.
 403         (vex256_mode): Likewise.
 404         (USE_VEX_C4_TABLE): Likewise.
 405         (USE_VEX_C5_TABLE): Likewise.
 406         (USE_VEX_LEN_TABLE): Likewise.
 407         (VEX_C4_TABLE): Likewise.
 408         (VEX_C5_TABLE): Likewise.
 409         (VEX_LEN_TABLE): Likewise.
 410         (REG_VEX_XX): Likewise.
 411         (MOD_VEX_XXX): Likewise.
 412         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 413         (PREFIX_0F3A44): Likewise.
 414         (PREFIX_0F3ADF): Likewise.
 415         (PREFIX_VEX_XXX): Likewise.
 416         (VEX_OF): Likewise.
 417         (VEX_OF38): Likewise.
 418         (VEX_OF3A): Likewise.
 419         (VEX_LEN_XXX): Likewise.
 420         (vex): Likewise.
 421         (need_vex): Likewise.
 422         (need_vex_reg): Likewise.
 423         (vex_i4_done): Likewise.
 424         (vex_table): Likewise.
 425         (vex_len_table): Likewise.
 426         (OP_REG_VexI4): Likewise.
 427         (vex_cmp_op): Likewise.
 428         (pclmul_op): Likewise.
 429         (vpermil2_op): Likewise.
 430         (m_mode): Updated.
 431         (es_reg): Likewise.
 432         (PREFIX_0F38F0): Likewise.
 433         (PREFIX_0F3A60): Likewise.
 434         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 435         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 436         and PREFIX_VEX_XXX entries.
 437         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 438         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 439         PREFIX_0F3ADF.
 440         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 441         Add MOD_VEX_XXX entries.
 442         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 443         REX byte in rex_original.
 444         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 445         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 446         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 447         calling get_valid_dis386.  Use rex_original and rex_ignored when
 448         printing out REX.
 449         (putop): Handle "XY".
 450         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 451         ymmq_mode.
 452         (OP_E_extended): Updated to use OP_E_register and
 453         OP_E_memory.
 454         (OP_XMM): Handle VEX.
 455         (OP_EX): Likewise.
 456         (XMM_Fixup): Likewise.
 457         (CMP_Fixup): Use ARRAY_SIZE.
 458
 459         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 460         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 461         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 462         OPERAND_TYPE_VEX_IMM4.
 463         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 464         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 465         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 466         VexImmExt and SSE2AVX.
 467         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 468
 469         * i386-opc.h (CpuAVX): New.
 470         (CpuAES): Likewise.
 471         (CpuCLMUL): Likewise.
 472         (CpuFMA): Likewise.
 473         (Vex): Likewise.
 474         (Vex256): Likewise.
 475         (VexNDS): Likewise.
 476         (VexNDD): Likewise.
 477         (VexW0): Likewise.
 478         (VexW1): Likewise.
 479         (Vex0F): Likewise.
 480         (Vex0F38): Likewise.
 481         (Vex0F3A): Likewise.
 482         (Vex3Sources): Likewise.
 483         (VexImmExt): Likewise.
 484         (SSE2AVX): Likewise.
 485         (RegYMM): Likewise.
 486         (Ymmword): Likewise.
 487         (Vex_Imm4): Likewise.
 488         (Implicit1stXmm0): Likewise.
 489         (CpuXsave): Updated.
 490         (CpuLM): Likewise.
 491         (ByteOkIntel): Likewise.
 492         (OldGcc): Likewise.
 493         (Control): Likewise.
 494         (Unspecified): Likewise.
 495         (OTMax): Likewise.
 496         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 497         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 498         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 499         vex3sources, veximmext and sse2avx.
 500         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 501
 502         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 503
 504         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 505
 506         * i386-init.h: Regenerated.
 507         * i386-tbl.h: Likewise.
 508
 509 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 510
 511         From  Robin Getz  <robin.getz@analog.com>
 512         * bfin-dis.c (bu32): Typedef.
 513         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 514         (constant_formats[]): Add uimm32 and huimm16.
 515         (fmtconst_val): New.
 516         (uimm32): Define.
 517         (huimm32): Define.
 518         (imm16_val): Define.
 519         (luimm16_val): Define.
 520         (struct saved_state): Define.
 521         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 522         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 523         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 524         (get_allreg): New.
 525         (decode_LDIMMhalf_0): Print out the whole register value.
 526
 527         From Jie Zhang  <jie.zhang@analog.com>
 528         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 529         multiply and multiply-accumulate to data register instruction.
 530
 531         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 532         c_imm32, c_huimm32e): Define.
 533         (constant_formats): Add flags for printing decimal, leading spaces, and
 534         exact symbols.
 535         (comment, parallel): Add global flags in all disassembly.
 536         (fmtconst): Take advantage of new flags, and print default in hex.
 537         (fmtconst_val): Likewise.
 538         (decode_macfunc): Be consistant with spaces, tabs, comments,
 539         capitalization in disassembly, fix minor coding style issues.
 540         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 541         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 542         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 543         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 544         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 545         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 546         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 547         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 548         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 549         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 550         _print_insn_bfin, print_insn_bfin): Likewise.
 551
 552 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 553
 554         * aclocal.m4: Regenerate.
 555         * configure: Likewise.
 556         * Makefile.in: Likewise.
 557
 558 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 559
 560         * Makefile.am: Run "make dep-am".
 561         * Makefile.in: Regenerate.
 562         * configure: Regenerate.
 563
 564 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 565
 566         * ppc-opc.c (powerpc_opcodes): Order and format.
 567
 568 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 569
 570         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 571         * i386-tbl.h: Regenerated.
 572
 573 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 574
 575         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 576         x86-64.
 577         * i386-tbl.h: Regenerated.
 578
 579 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 580
 581         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 582         and Fword for far indirect jmp. Allow Reg16 and Word for near
 583         indirect jmp on x86-64. Disallow Fword for lcall.
 584         * i386-tbl.h: Re-generate.
 585
 586 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 587
 588         * cr16-opc.c  (cr16_num_optab): Defined
 589
 590 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 591
 592         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 593         * i386-init.h: Regenerated.
 594
 595 2008-02-14  Nick Clifton  <nickc@redhat.com>
 596
 597         PR binutils/5524
 598         * configure.in (SHARED_LIBADD): Select the correct host specific
 599         file extension for shared libraries.
 600         * configure: Regenerate.
 601
 602 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 603
 604         * i386-opc.h (RegFlat): New.
 605         * i386-reg.tbl (flat): Add.
 606         * i386-tbl.h: Re-generate.
 607
 608 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 609
 610         * i386-dis.c (a_mode): New.
 611         (cond_jump_mode): Adjust.
 612         (Ma): Change to a_mode.
 613         (intel_operand_size): Handle a_mode.
 614         * i386-opc.tbl: Allow Dword and Qword for bound.
 615         * i386-tbl.h: Re-generate.
 616
 617 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 618
 619         * i386-gen.c (process_i386_registers): Process new fields.
 620         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 621         unsigned char. Add dw2_regnum and Dw2Inval.
 622         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 623         register names.
 624         * i386-tbl.h: Re-generate.
 625
 626 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 627
 628         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 629         * i386-init.h: Updated.
 630
 631 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 632
 633         * i386-gen.c (cpu_flags): Add CpuXsave.
 634
 635         * i386-opc.h (CpuXsave): New.
 636         (CpuLM): Updated.
 637         (i386_cpu_flags): Add cpuxsave.
 638
 639         * i386-dis.c (MOD_0FAE_REG_4): New.
 640         (RM_0F01_REG_2): Likewise.
 641         (MOD_0FAE_REG_5): Updated.
 642         (RM_0F01_REG_3): Likewise.
 643         (reg_table): Use MOD_0FAE_REG_4.
 644         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 645         for xrstor.
 646         (rm_table): Add RM_0F01_REG_2.
 647
 648         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 649         * i386-init.h: Regenerated.
 650         * i386-tbl.h: Likewise.
 651
 652 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 653
 654         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 655         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 656         * i386-tbl.h: Re-generate.
 657
 658 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 659
 660         PR 5715
 661         * configure: Regenerated.
 662
 663 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 664
 665         * mips-dis.c: Update copyright.
 666         (mips_arch_choices): Add Octeon.
 667         * mips-opc.c: Update copyright.
 668         (IOCT): New macro.
 669         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 670
 671 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 672
 673         * ppc-opc.c: Support optional L form mtmsr.
 674
 675 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 676
 677         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 678
 679 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 680
 681         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 682         * i386-init.h: Regenerated.
 683
 684 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 685
 686         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 687         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 688
 689 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 690
 691         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 692         (cpu_flags): Likewise.
 693
 694         * i386-opc.h (CpuMMX2): Removed.
 695         (CpuSSE): Updated.
 696
 697         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 698         * i386-init.h: Regenerated.
 699         * i386-tbl.h: Likewise.
 700
 701 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 702
 703         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 704         CPU_SMX_FLAGS.
 705         * i386-init.h: Regenerated.
 706
 707 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 708
 709         * i386-opc.tbl: Use Qword on movddup.
 710         * i386-tbl.h: Regenerated.
 711
 712 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 713
 714         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 715         * i386-tbl.h: Regenerated.
 716
 717 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 718
 719         * i386-dis.c (Mx): New.
 720         (PREFIX_0FC3): Likewise.
 721         (PREFIX_0FC7_REG_6): Updated.
 722         (dis386_twobyte): Use PREFIX_0FC3.
 723         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 724         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 725         movntss.
 726
 727 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 728
 729         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 730         (operand_types): Add Mem.
 731
 732         * i386-opc.h (IntelSyntax): New.
 733         * i386-opc.h (Mem): New.
 734         (Byte): Updated.
 735         (Opcode_Modifier_Max): Updated.
 736         (i386_opcode_modifier): Add intelsyntax.
 737         (i386_operand_type): Add mem.
 738
 739         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 740         instructions.
 741
 742         * i386-reg.tbl: Add size for accumulator.
 743
 744         * i386-init.h: Regenerated.
 745         * i386-tbl.h: Likewise.
 746
 747 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 748
 749         * i386-opc.h (Byte): Fix a typo.
 750
 751 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 752
 753         PR gas/5534
 754         * i386-gen.c (operand_type_init): Add Dword to
 755         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 756         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 757         Qword and Xmmword.
 758         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 759         Xmmword, Unspecified and Anysize.
 760         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 761         an alias of Xmmword.
 762
 763         * i386-opc.h (CheckSize): Removed.
 764         (Byte): Updated.
 765         (Word): Likewise.
 766         (Dword): Likewise.
 767         (Qword): Likewise.
 768         (Xmmword): Likewise.
 769         (FWait): Updated.
 770         (OTMax): Likewise.
 771         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 772         qword and xmmword.
 773         (Fword): New.
 774         (TBYTE): Likewise.
 775         (Unspecified): Likewise.
 776         (Anysize): Likewise.
 777         (i386_operand_type): Add byte, word, dword, fword, qword,
 778         tbyte xmmword, unspecified and anysize.
 779
 780         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 781         Tbyte, Xmmword, Unspecified and Anysize.
 782
 783         * i386-reg.tbl: Add size for accumulator.
 784
 785         * i386-init.h: Regenerated.
 786         * i386-tbl.h: Likewise.
 787
 788 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 789
 790         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 791         (REG_0F18): Updated.
 792         (reg_table): Updated.
 793         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 794         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 795
 796 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 797
 798         * i386-gen.c (set_bitfield): Use fail () on error.
 799
 800 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 801
 802         * i386-gen.c (lineno): New.
 803         (filename): Likewise.
 804         (set_bitfield): Report filename and line numer on error.
 805         (process_i386_opcodes): Set filename and update lineno.
 806         (process_i386_registers): Likewise.
 807
 808 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 809
 810         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 811         ATTSyntax.
 812
 813         * i386-opc.h (IntelMnemonic): Renamed to ..
 814         (ATTSyntax): This
 815         (Opcode_Modifier_Max): Updated.
 816         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 817         and intelsyntax.
 818
 819         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 820         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 821         * i386-tbl.h: Regenerated.
 822
 823 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 824
 825         * i386-gen.c: Update copyright to 2008.
 826         * i386-opc.h: Likewise.
 827         * i386-opc.tbl: Likewise.
 828
 829         * i386-init.h: Regenerated.
 830         * i386-tbl.h: Likewise.
 831
 832 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 833
 834         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 835         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 836         * i386-tbl.h: Regenerated.
 837
 838 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 839
 840         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 841         CpuSSE4_2_Or_ABM.
 842         (cpu_flags): Likewise.
 843
 844         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 845         (CpuSSE4_2_Or_ABM): Likewise.
 846         (CpuLM): Updated.
 847         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 848
 849         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 850         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 851         and CpuPadLock, respectively.
 852         * i386-init.h: Regenerated.
 853         * i386-tbl.h: Likewise.
 854
 855 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 856
 857         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 858
 859         * i386-opc.h (No_xSuf): Removed.
 860         (CheckSize): Updated.
 861
 862         * i386-tbl.h: Regenerated.
 863
 864 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 865
 866         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 867         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 868         CPU_SSE5_FLAGS.
 869         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 870
 871         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 872         (CpuLM): Updated.
 873         (i386_cpu_flags): Add cpusse4_2_or_abm.
 874
 875         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 876         CpuABM|CpuSSE4_2 on popcnt.
 877         * i386-init.h: Regenerated.
 878         * i386-tbl.h: Likewise.
 879
 880 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 881
 882         * i386-opc.h: Update comments.
 883
 884 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 885
 886         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 887         * i386-opc.h: Likewise.
 888         * i386-opc.tbl: Likewise.
 889
 890 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 891
 892         PR gas/5534
 893         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 894         Byte, Word, Dword, QWord and Xmmword.
 895
 896         * i386-opc.h (No_xSuf): New.
 897         (CheckSize): Likewise.
 898         (Byte): Likewise.
 899         (Word): Likewise.
 900         (Dword): Likewise.
 901         (QWord): Likewise.
 902         (Xmmword): Likewise.
 903         (FWait): Updated.
 904         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 905         Dword, QWord and Xmmword.
 906
 907         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 908         used.
 909         * i386-tbl.h: Regenerated.
 910
 911 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 912
 913         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 914         From Miod Vallat.
 915
 916 For older changes see ChangeLog-2007
 917 \f
 918 Local Variables:
 919 mode: change-log
 920 left-margin: 8
 921 fill-column: 74
 922 version-control: never
 923 End: