Allow VL=1 on AVX scalar instructions.
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (XMScalar): New.
4 (EXdScalar): Likewise.
5 (EXqScalar): Likewise.
6 (EXqScalarS): Likewise.
7 (VexScalar): Likewise.
8 (EXdVexScalarS): Likewise.
9 (EXqVexScalarS): Likewise.
10 (XMVexScalar): Likewise.
11 (scalar_mode): Likewise.
12 (d_scalar_mode): Likewise.
13 (d_scalar_swap_mode): Likewise.
14 (q_scalar_mode): Likewise.
15 (q_scalar_swap_mode): Likewise.
16 (vex_scalar_mode): Likewise.
17 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
18 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
19 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
20 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
21 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
22 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
23 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
24 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
25 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
26 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
27 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
28 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
29 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
30 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
31 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
32 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
33 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
34 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
35 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
36 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
37 q_scalar_mode, q_scalar_swap_mode.
38 (OP_XMM): Handle scalar_mode.
39 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
40 and q_scalar_swap_mode.
41 (OP_VEX): Handle vex_scalar_mode.
42
43 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
44
45 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
46
47 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
48
49 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
50
51 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
52
53 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
54
55 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
56
57 * i386-dis.c (Bad_Opcode): New.
58 (bad_opcode): Likewise.
59 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
60 (dis386_twobyte): Likewise.
61 (reg_table): Likewise.
62 (prefix_table): Likewise.
63 (x86_64_table): Likewise.
64 (vex_len_table): Likewise.
65 (vex_w_table): Likewise.
66 (mod_table): Likewise.
67 (rm_table): Likewise.
68 (float_reg): Likewise.
69 (reg_table): Remove trailing "(bad)" entries.
70 (prefix_table): Likewise.
71 (x86_64_table): Likewise.
72 (vex_len_table): Likewise.
73 (vex_w_table): Likewise.
74 (mod_table): Likewise.
75 (rm_table): Likewise.
76 (get_valid_dis386): Handle bytemode 0.
77
78 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
79
80 * i386-opc.h (VEXScalar): New.
81
82 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
83 instructions.
84 * i386-tbl.h: Regenerated.
85
86 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
87
88 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
89
90 * i386-opc.tbl: Add xsave64 and xrstor64.
91 * i386-tbl.h: Regenerated.
92
93 2010-01-20 Nick Clifton <nickc@redhat.com>
94
95 PR 11170
96 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
97 based post-indexed addressing.
98
99 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
100
101 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
102 * i386-tbl.h: Regenerated.
103
104 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
105
106 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
107 comments.
108
109 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
110
111 * i386-dis.c (names_mm): New.
112 (intel_names_mm): Likewise.
113 (att_names_mm): Likewise.
114 (names_xmm): Likewise.
115 (intel_names_xmm): Likewise.
116 (att_names_xmm): Likewise.
117 (names_ymm): Likewise.
118 (intel_names_ymm): Likewise.
119 (att_names_ymm): Likewise.
120 (print_insn): Set names_mm, names_xmm and names_ymm.
121 (OP_MMX): Use names_mm, names_xmm and names_ymm.
122 (OP_XMM): Likewise.
123 (OP_EM): Likewise.
124 (OP_EMC): Likewise.
125 (OP_MXC): Likewise.
126 (OP_EX): Likewise.
127 (XMM_Fixup): Likewise.
128 (OP_VEX): Likewise.
129 (OP_EX_VexReg): Likewise.
130 (OP_Vex_2src): Likewise.
131 (OP_Vex_2src_1): Likewise.
132 (OP_Vex_2src_2): Likewise.
133 (OP_REG_VexI4): Likewise.
134
135 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
136
137 * i386-dis.c (print_insn): Update comments.
138
139 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
140
141 * i386-dis.c (rex_original): Removed.
142 (ckprefix): Remove rex_original.
143 (print_insn): Update comments.
144
145 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
146
147 * Makefile.in: Regenerate.
148 * configure: Regenerate.
149
150 2010-01-07 Doug Evans <dje@sebabeach.org>
151
152 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
153 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
154 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
155 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
156 * xstormy16-ibld.c: Regenerate.
157
158 2010-01-06 Quentin Neill <quentin.neill@amd.com>
159
160 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
161 * i386-init.h: Regenerated.
162
163 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
164
165 * arm-dis.c (print_insn): Fixed search for next symbol and data
166 dumping condition, and the initial mapping symbol state.
167
168 2010-01-05 Doug Evans <dje@sebabeach.org>
169
170 * cgen-ibld.in: #include "cgen/basic-modes.h".
171 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
172 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
173 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
174 * xstormy16-ibld.c: Regenerate.
175
176 2010-01-04 Nick Clifton <nickc@redhat.com>
177
178 PR 11123
179 * arm-dis.c (print_insn_coprocessor): Initialise value.
180
181 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
182
183 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
184
185 2010-01-02 Doug Evans <dje@sebabeach.org>
186
187 * cgen-asm.in: Update copyright year.
188 * cgen-dis.in: Update copyright year.
189 * cgen-ibld.in: Update copyright year.
190 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
191 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
192 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
193 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
194 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
195 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
196 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
197 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
198 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
199 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
200 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
201 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
202 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
203 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
204 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
205 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
206 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
207 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
208 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
209 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
210 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
211
212 For older changes see ChangeLog-2009
213 \f
214 Local Variables:
215 mode: change-log
216 left-margin: 8
217 fill-column: 74
218 version-control: never
219 End: