opcodes/
[binutils-gdb.git] / opcodes / ChangeLog
1 2008-02-11 Jan Beulich <jbeulich@novell.com>
2 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
3 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
4 * i386-tbl.h: Re-generate.
5
6 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
7
8 PR 5715
9 * configure: Regenerated.
10
11 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
12
13 * mips-dis.c: Update copyright.
14 (mips_arch_choices): Add Octeon.
15 * mips-opc.c: Update copyright.
16 (IOCT): New macro.
17 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
18
19 2008-01-29 Alan Modra <amodra@bigpond.net.au>
20
21 * ppc-opc.c: Support optional L form mtmsr.
22
23 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
24
25 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
26
27 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
28
29 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
30 * i386-init.h: Regenerated.
31
32 2008-01-23 Tristan Gingold <gingold@adacore.com>
33
34 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
35 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
36
37 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
38
39 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
40 (cpu_flags): Likewise.
41
42 * i386-opc.h (CpuMMX2): Removed.
43 (CpuSSE): Updated.
44
45 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
46 * i386-init.h: Regenerated.
47 * i386-tbl.h: Likewise.
48
49 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
50
51 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
52 CPU_SMX_FLAGS.
53 * i386-init.h: Regenerated.
54
55 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
56
57 * i386-opc.tbl: Use Qword on movddup.
58 * i386-tbl.h: Regenerated.
59
60 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
61
62 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
63 * i386-tbl.h: Regenerated.
64
65 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
66
67 * i386-dis.c (Mx): New.
68 (PREFIX_0FC3): Likewise.
69 (PREFIX_0FC7_REG_6): Updated.
70 (dis386_twobyte): Use PREFIX_0FC3.
71 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
72 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
73 movntss.
74
75 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
76
77 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
78 (operand_types): Add Mem.
79
80 * i386-opc.h (IntelSyntax): New.
81 * i386-opc.h (Mem): New.
82 (Byte): Updated.
83 (Opcode_Modifier_Max): Updated.
84 (i386_opcode_modifier): Add intelsyntax.
85 (i386_operand_type): Add mem.
86
87 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
88 instructions.
89
90 * i386-reg.tbl: Add size for accumulator.
91
92 * i386-init.h: Regenerated.
93 * i386-tbl.h: Likewise.
94
95 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
96
97 * i386-opc.h (Byte): Fix a typo.
98
99 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
100
101 PR gas/5534
102 * i386-gen.c (operand_type_init): Add Dword to
103 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
104 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
105 Qword and Xmmword.
106 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
107 Xmmword, Unspecified and Anysize.
108 (set_bitfield): Make Mmword an alias of Qword. Make Oword
109 an alias of Xmmword.
110
111 * i386-opc.h (CheckSize): Removed.
112 (Byte): Updated.
113 (Word): Likewise.
114 (Dword): Likewise.
115 (Qword): Likewise.
116 (Xmmword): Likewise.
117 (FWait): Updated.
118 (OTMax): Likewise.
119 (i386_opcode_modifier): Remove checksize, byte, word, dword,
120 qword and xmmword.
121 (Fword): New.
122 (TBYTE): Likewise.
123 (Unspecified): Likewise.
124 (Anysize): Likewise.
125 (i386_operand_type): Add byte, word, dword, fword, qword,
126 tbyte xmmword, unspecified and anysize.
127
128 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
129 Tbyte, Xmmword, Unspecified and Anysize.
130
131 * i386-reg.tbl: Add size for accumulator.
132
133 * i386-init.h: Regenerated.
134 * i386-tbl.h: Likewise.
135
136 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
137
138 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
139 (REG_0F18): Updated.
140 (reg_table): Updated.
141 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
142 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
143
144 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
145
146 * i386-gen.c (set_bitfield): Use fail () on error.
147
148 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
149
150 * i386-gen.c (lineno): New.
151 (filename): Likewise.
152 (set_bitfield): Report filename and line numer on error.
153 (process_i386_opcodes): Set filename and update lineno.
154 (process_i386_registers): Likewise.
155
156 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
157
158 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
159 ATTSyntax.
160
161 * i386-opc.h (IntelMnemonic): Renamed to ..
162 (ATTSyntax): This
163 (Opcode_Modifier_Max): Updated.
164 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
165 and intelsyntax.
166
167 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
168 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
169 * i386-tbl.h: Regenerated.
170
171 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
172
173 * i386-gen.c: Update copyright to 2008.
174 * i386-opc.h: Likewise.
175 * i386-opc.tbl: Likewise.
176
177 * i386-init.h: Regenerated.
178 * i386-tbl.h: Likewise.
179
180 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
181
182 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
183 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
184 * i386-tbl.h: Regenerated.
185
186 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
187
188 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
189 CpuSSE4_2_Or_ABM.
190 (cpu_flags): Likewise.
191
192 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
193 (CpuSSE4_2_Or_ABM): Likewise.
194 (CpuLM): Updated.
195 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
196
197 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
198 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
199 and CpuPadLock, respectively.
200 * i386-init.h: Regenerated.
201 * i386-tbl.h: Likewise.
202
203 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
204
205 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
206
207 * i386-opc.h (No_xSuf): Removed.
208 (CheckSize): Updated.
209
210 * i386-tbl.h: Regenerated.
211
212 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
213
214 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
215 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
216 CPU_SSE5_FLAGS.
217 (cpu_flags): Add CpuSSE4_2_Or_ABM.
218
219 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
220 (CpuLM): Updated.
221 (i386_cpu_flags): Add cpusse4_2_or_abm.
222
223 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
224 CpuABM|CpuSSE4_2 on popcnt.
225 * i386-init.h: Regenerated.
226 * i386-tbl.h: Likewise.
227
228 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
229
230 * i386-opc.h: Update comments.
231
232 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
233
234 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
235 * i386-opc.h: Likewise.
236 * i386-opc.tbl: Likewise.
237
238 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
239
240 PR gas/5534
241 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
242 Byte, Word, Dword, QWord and Xmmword.
243
244 * i386-opc.h (No_xSuf): New.
245 (CheckSize): Likewise.
246 (Byte): Likewise.
247 (Word): Likewise.
248 (Dword): Likewise.
249 (QWord): Likewise.
250 (Xmmword): Likewise.
251 (FWait): Updated.
252 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
253 Dword, QWord and Xmmword.
254
255 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
256 used.
257 * i386-tbl.h: Regenerated.
258
259 2008-01-02 Mark Kettenis <kettenis@gnu.org>
260
261 * m88k-dis.c (instructions): Fix fcvt.* instructions.
262 From Miod Vallat.
263
264 For older changes see ChangeLog-2007
265 \f
266 Local Variables:
267 mode: change-log
268 left-margin: 8
269 fill-column: 74
270 version-control: never
271 End: