1 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
3 * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
4 adjusted the mask for 32-bit branch instruction.
6 2008-11-27 Alan Modra <amodra@bigpond.net.au>
8 * ppc-opc.c (extract_sprg): Correct operand range check.
10 2008-11-26 Andreas Schwab <schwab@suse.de>
12 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
13 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
14 (save_printer, save_print_address): Remove.
15 (fetch_data): Don't use them.
16 (match_insn_m68k): Always restore printing functions.
17 (print_insn_m68k): Don't save/restore printing functions.
19 2008-11-25 Nick Clifton <nickc@redhat.com>
21 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
23 2008-11-18 Catherine Moore <clm@codesourcery.com>
25 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
27 (neon_opcodes): Likewise.
28 (print_insn_coprocessor): Print 't' or 'b' for vcvt
31 2008-11-14 Tristan Gingold <gingold@adacore.com>
33 * makefile.vms (OBJS): Update list of objects.
37 2008-11-06 Chao-ying Fu <fu@mips.com>
39 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
41 (sync): New instruction with 5-bit sync type.
42 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
44 2008-11-06 Nick Clifton <nickc@redhat.com>
46 * avr-dis.c: Replace uses of sprintf without a format string with
49 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
51 * i386-opc.tbl: Add cmovpe and cmovpo.
52 * i386-tbl.h: Regenerated.
54 2008-10-22 Nick Clifton <nickc@redhat.com>
57 * configure.in (SHARED_LIBADD): Revert previous change.
58 Add a comment explaining why.
59 (SHARED_DEPENDENCIES): Revert previous change.
60 * configure: Regenerate.
62 2008-10-10 Nick Clifton <nickc@redhat.com>
65 * configure.in (SHARED_LIBADD): Add libiberty.a.
66 (SHARED_DEPENDENCIES): Add libiberty.a.
68 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
70 * i386-gen.c: Include "hashtab.h".
71 (next_field): Take a new argument, last. Check last.
72 (process_i386_cpu_flag): Updated.
73 (process_i386_opcode_modifier): Likewise.
74 (process_i386_operand_type): Likewise.
75 (process_i386_registers): Likewise.
76 (output_i386_opcode): New.
77 (opcode_hash_entry): Likewise.
78 (opcode_hash_table): Likewise.
79 (opcode_hash_hash): Likewise.
80 (opcode_hash_eq): Likewise.
81 (process_i386_opcodes): Use opcode hash table and opcode array.
83 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
85 * s390-opc.txt (stdy, stey): Fix description
87 2008-09-30 Alan Modra <amodra@bigpond.net.au>
89 * Makefile.am: Run "make dep-am".
90 * Makefile.in: Regenerate.
92 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
94 * aclocal.m4: Regenerated.
95 * configure: Likewise.
96 * Makefile.in: Likewise.
98 2008-09-29 Nick Clifton <nickc@redhat.com>
100 * po/vi.po: Updated Vietnamese translation.
101 * po/fr.po: Updated French translation.
103 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
105 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
106 (cfxr, cfdr, cfer, clclu): Add esa flag.
107 (sqd): Instruction added.
108 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
109 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
111 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
113 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
114 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
116 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
118 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
119 * i386-tbl.h: Regenerated.
121 2008-08-28 Jan Beulich <jbeulich@novell.com>
123 * i386-dis.c (dis386): Adjust far return mnemonics.
124 * i386-opc.tbl: Add retf.
125 * i386-tbl.h: Re-generate.
127 2008-08-28 Jan Beulich <jbeulich@novell.com>
129 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
131 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
133 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
134 * ia64-gen.c (lookup_specifier): Likewise.
136 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
137 * ia64-raw.tbl: Likewise.
138 * ia64-waw.tbl: Likewise.
139 * ia64-asmtab.c: Regenerated.
141 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
143 * i386-opc.tbl: Correct fidivr operand size.
145 * i386-tbl.h: Regenerated.
147 2008-08-24 Alan Modra <amodra@bigpond.net.au>
149 * configure.in: Update a number of obsolete autoconf macros.
150 * aclocal.m4: Regenerate.
152 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
154 AVX Programming Reference (August, 2008)
155 * i386-dis.c (PREFIX_VEX_38DB): New.
156 (PREFIX_VEX_38DC): Likewise.
157 (PREFIX_VEX_38DD): Likewise.
158 (PREFIX_VEX_38DE): Likewise.
159 (PREFIX_VEX_38DF): Likewise.
160 (PREFIX_VEX_3ADF): Likewise.
161 (VEX_LEN_38DB_P_2): Likewise.
162 (VEX_LEN_38DC_P_2): Likewise.
163 (VEX_LEN_38DD_P_2): Likewise.
164 (VEX_LEN_38DE_P_2): Likewise.
165 (VEX_LEN_38DF_P_2): Likewise.
166 (VEX_LEN_3ADF_P_2): Likewise.
167 (PREFIX_VEX_3A04): Updated.
168 (VEX_LEN_3A06_P_2): Likewise.
169 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
170 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
171 (x86_64_table): Likewise.
172 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
173 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
176 * i386-opc.tbl: Add AES + AVX instructions.
177 * i386-init.h: Regenerated.
178 * i386-tbl.h: Likewise.
180 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
182 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
183 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
185 2008-08-15 Alan Modra <amodra@bigpond.net.au>
188 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
189 * Makefile.in: Regenerate.
190 * aclocal.m4: Regenerate.
191 * config.in: Regenerate.
192 * configure: Regenerate.
194 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
197 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
199 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
201 * i386-opc.tbl: Add syscall and sysret for Cpu64.
203 * i386-tbl.h: Regenerated.
205 2008-08-04 Alan Modra <amodra@bigpond.net.au>
207 * Makefile.am (POTFILES.in): Set LC_ALL=C.
208 * Makefile.in: Regenerate.
209 * po/POTFILES.in: Regenerate.
211 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
213 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
214 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
215 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
216 * ppc-opc.c (insert_xt6): New static function.
217 (extract_xt6): Likewise.
218 (insert_xa6): Likewise.
219 (extract_xa6: Likewise.
220 (insert_xb6): Likewise.
221 (extract_xb6): Likewise.
222 (insert_xb6s): Likewise.
223 (extract_xb6s): Likewise.
224 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
225 XX3DM_MASK, PPCVSX): New.
226 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
227 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
229 2008-08-01 Pedro Alves <pedro@codesourcery.com>
231 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
232 * Makefile.in: Regenerate.
234 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
236 * i386-reg.tbl: Use Dw2Inval on AVX registers.
237 * i386-tbl.h: Regenerated.
239 2008-07-30 Michael J. Eager <eager@eagercon.com>
241 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
242 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
243 (insert_sprg, PPC405): Use PPC_OPCODE_405.
244 (powerpc_opcodes): Add Xilinx APU related opcodes.
246 2008-07-30 Alan Modra <amodra@bigpond.net.au>
248 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
250 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
252 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
254 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
256 * mips-opc.c (CP): New macro.
257 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
258 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
259 dmtc2 Octeon instructions.
261 2008-07-07 Stan Shebs <stan@codesourcery.com>
263 * dis-init.c (init_disassemble_info): Init endian_code field.
264 * arm-dis.c (print_insn): Disassemble code according to
265 setting of endian_code.
266 (print_insn_big_arm): Detect when BE8 extension flag has been set.
268 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
270 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
273 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
275 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
276 (print_ppc_disassembler_options): Likewise.
277 * ppc-opc.c (PPC464): Define.
278 (powerpc_opcodes): Add mfdcrux and mtdcrux.
280 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
282 * configure: Regenerate.
284 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
286 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
288 (struct dis_private): New.
289 (POWERPC_DIALECT): New define.
290 (powerpc_dialect): Renamed to...
291 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
293 (print_insn_big_powerpc): Update for using structure in
295 (print_insn_little_powerpc): Likewise.
296 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
297 (skip_optional_operands): Likewise.
298 (print_insn_powerpc): Likewise. Remove initialization of dialect.
299 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
300 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
301 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
302 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
303 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
304 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
305 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
306 param to be of type ppc_cpu_t. Update prototype.
308 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
310 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
312 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
313 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
314 syncw, syncws, vm3mulu, vm0 and vmulu.
316 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
317 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
320 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
322 * i386-opc.tbl: Add vmovd with 64bit operand.
323 * i386-tbl.h: Regenerated.
325 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
327 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
329 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
331 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
332 * i386-tbl.h: Regenerated.
334 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
337 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
338 into 32bit and 64bit. Remove Reg64|Qword and add
339 IgnoreSize|No_qSuf on 32bit version.
340 * i386-tbl.h: Regenerated.
342 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
344 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
345 * i386-tbl.h: Regenerated.
347 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
349 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
351 2008-05-14 Alan Modra <amodra@bigpond.net.au>
353 * Makefile.am: Run "make dep-am".
354 * Makefile.in: Regenerate.
356 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
358 * i386-dis.c (MOVBE_Fixup): New.
360 (PREFIX_0F3880): Likewise.
361 (PREFIX_0F3881): Likewise.
362 (PREFIX_0F38F0): Updated.
363 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
364 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
365 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
367 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
369 (cpu_flags): Add CpuMovbe and CpuEPT.
371 * i386-opc.h (CpuMovbe): New.
374 (i386_cpu_flags): Add cpumovbe and cpuept.
376 * i386-opc.tbl: Add entries for movbe and EPT instructions.
377 * i386-init.h: Regenerated.
378 * i386-tbl.h: Likewise.
380 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
382 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
383 the two drem and the two dremu macros.
385 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
387 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
388 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
389 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
390 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
392 2008-04-25 David S. Miller <davem@davemloft.net>
394 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
395 instead of %sys_tick_cmpr, as suggested in architecture manuals.
397 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
399 * aclocal.m4: Regenerate.
400 * configure: Regenerate.
402 2008-04-23 David S. Miller <davem@davemloft.net>
404 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
406 (prefetch_table): Add missing values.
408 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
410 * i386-gen.c (opcode_modifiers): Add NoAVX.
412 * i386-opc.h (NoAVX): New.
414 (i386_opcode_modifier): Add noavx.
416 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
417 instructions which don't have AVX equivalent.
418 * i386-tbl.h: Regenerated.
420 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
422 * i386-dis.c (OP_VEX_FMA): New.
423 (OP_EX_VexImmW): Likewise.
425 (Vex128FMA): Likewise.
426 (EXVexImmW): Likewise.
427 (get_vex_imm8): Likewise.
428 (OP_EX_VexReg): Likewise.
429 (vex_i4_done): Renamed to ...
431 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
432 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
434 (print_insn): Updated.
435 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
436 (OP_REG_VexI4): Check invalid high registers.
438 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
439 Michael Meissner <michael.meissner@amd.com>
441 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
442 * i386-tbl.h: Regenerate from i386-opc.tbl.
444 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
446 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
447 accept Power E500MC instructions.
448 (print_ppc_disassembler_options): Document -Me500mc.
449 * ppc-opc.c (DUIS, DUI, T): New.
450 (XRT, XRTRA): Likewise.
452 (powerpc_opcodes): Add new Power E500MC instructions.
454 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
456 * s390-dis.c (init_disasm): Evaluate disassembler_options.
457 (print_s390_disassembler_options): New function.
458 * disassemble.c (disassembler_usage): Invoke
459 print_s390_disassembler_options.
461 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
463 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
464 of local variables used for mnemonic parsing: prefix, suffix and
467 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
469 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
470 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
471 (s390_crb_extensions): New extensions table.
472 (insertExpandedMnemonic): Handle '$' tag.
473 * s390-opc.txt: Remove conditional jump variants which can now
474 be expanded automatically.
475 Replace '*' tag with '$' in the compare and branch instructions.
477 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
479 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
480 (PREFIX_VEX_3AXX): Likewis.
482 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
484 * i386-opc.tbl: Remove 4 extra blank lines.
486 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
488 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
489 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
490 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
491 * i386-opc.tbl: Likewise.
493 * i386-opc.h (CpuCLMUL): Renamed to ...
496 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
498 * i386-init.h: Regenerated.
500 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
502 * i386-dis.c (OP_E_register): New.
503 (OP_E_memory): Likewise.
505 (OP_EX_Vex): Likewise.
506 (OP_EX_VexW): Likewise.
507 (OP_XMM_Vex): Likewise.
508 (OP_XMM_VexW): Likewise.
509 (OP_REG_VexI4): Likewise.
510 (PCLMUL_Fixup): Likewise.
511 (VEXI4_Fixup): Likewise.
512 (VZERO_Fixup): Likewise.
513 (VCMP_Fixup): Likewise.
514 (VPERMIL2_Fixup): Likewise.
515 (rex_original): Likewise.
516 (rex_ignored): Likewise.
537 (VPERMIL2): Likewise.
538 (xmm_mode): Likewise.
539 (xmmq_mode): Likewise.
540 (ymmq_mode): Likewise.
541 (vex_mode): Likewise.
542 (vex128_mode): Likewise.
543 (vex256_mode): Likewise.
544 (USE_VEX_C4_TABLE): Likewise.
545 (USE_VEX_C5_TABLE): Likewise.
546 (USE_VEX_LEN_TABLE): Likewise.
547 (VEX_C4_TABLE): Likewise.
548 (VEX_C5_TABLE): Likewise.
549 (VEX_LEN_TABLE): Likewise.
550 (REG_VEX_XX): Likewise.
551 (MOD_VEX_XXX): Likewise.
552 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
553 (PREFIX_0F3A44): Likewise.
554 (PREFIX_0F3ADF): Likewise.
555 (PREFIX_VEX_XXX): Likewise.
557 (VEX_OF38): Likewise.
558 (VEX_OF3A): Likewise.
559 (VEX_LEN_XXX): Likewise.
561 (need_vex): Likewise.
562 (need_vex_reg): Likewise.
563 (vex_i4_done): Likewise.
564 (vex_table): Likewise.
565 (vex_len_table): Likewise.
566 (OP_REG_VexI4): Likewise.
567 (vex_cmp_op): Likewise.
568 (pclmul_op): Likewise.
569 (vpermil2_op): Likewise.
572 (PREFIX_0F38F0): Likewise.
573 (PREFIX_0F3A60): Likewise.
574 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
575 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
576 and PREFIX_VEX_XXX entries.
577 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
578 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
580 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
581 Add MOD_VEX_XXX entries.
582 (ckprefix): Initialize rex_original and rex_ignored. Store the
583 REX byte in rex_original.
584 (get_valid_dis386): Handle the implicit prefix in VEX prefix
585 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
586 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
587 calling get_valid_dis386. Use rex_original and rex_ignored when
589 (putop): Handle "XY".
590 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
592 (OP_E_extended): Updated to use OP_E_register and
594 (OP_XMM): Handle VEX.
596 (XMM_Fixup): Likewise.
597 (CMP_Fixup): Use ARRAY_SIZE.
599 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
600 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
601 (operand_type_init): Add OPERAND_TYPE_REGYMM and
602 OPERAND_TYPE_VEX_IMM4.
603 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
604 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
605 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
606 VexImmExt and SSE2AVX.
607 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
609 * i386-opc.h (CpuAVX): New.
611 (CpuCLMUL): Likewise.
622 (Vex3Sources): Likewise.
623 (VexImmExt): Likewise.
627 (Vex_Imm4): Likewise.
628 (Implicit1stXmm0): Likewise.
631 (ByteOkIntel): Likewise.
634 (Unspecified): Likewise.
636 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
637 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
638 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
639 vex3sources, veximmext and sse2avx.
640 (i386_operand_type): Add regymm, ymmword and vex_imm4.
642 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
644 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
646 * i386-init.h: Regenerated.
647 * i386-tbl.h: Likewise.
649 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
651 From Robin Getz <robin.getz@analog.com>
652 * bfin-dis.c (bu32): Typedef.
653 (enum const_forms_t): Add c_uimm32 and c_huimm32.
654 (constant_formats[]): Add uimm32 and huimm16.
659 (luimm16_val): Define.
660 (struct saved_state): Define.
661 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
662 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
663 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
665 (decode_LDIMMhalf_0): Print out the whole register value.
667 From Jie Zhang <jie.zhang@analog.com>
668 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
669 multiply and multiply-accumulate to data register instruction.
671 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
672 c_imm32, c_huimm32e): Define.
673 (constant_formats): Add flags for printing decimal, leading spaces, and
675 (comment, parallel): Add global flags in all disassembly.
676 (fmtconst): Take advantage of new flags, and print default in hex.
677 (fmtconst_val): Likewise.
678 (decode_macfunc): Be consistant with spaces, tabs, comments,
679 capitalization in disassembly, fix minor coding style issues.
680 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
681 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
682 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
683 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
684 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
685 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
686 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
687 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
688 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
689 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
690 _print_insn_bfin, print_insn_bfin): Likewise.
692 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
694 * aclocal.m4: Regenerate.
695 * configure: Likewise.
696 * Makefile.in: Likewise.
698 2008-03-13 Alan Modra <amodra@bigpond.net.au>
700 * Makefile.am: Run "make dep-am".
701 * Makefile.in: Regenerate.
702 * configure: Regenerate.
704 2008-03-07 Alan Modra <amodra@bigpond.net.au>
706 * ppc-opc.c (powerpc_opcodes): Order and format.
708 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
710 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
711 * i386-tbl.h: Regenerated.
713 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
715 * i386-opc.tbl: Disallow 16-bit near indirect branches for
717 * i386-tbl.h: Regenerated.
719 2008-02-21 Jan Beulich <jbeulich@novell.com>
721 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
722 and Fword for far indirect jmp. Allow Reg16 and Word for near
723 indirect jmp on x86-64. Disallow Fword for lcall.
724 * i386-tbl.h: Re-generate.
726 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
728 * cr16-opc.c (cr16_num_optab): Defined
730 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
732 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
733 * i386-init.h: Regenerated.
735 2008-02-14 Nick Clifton <nickc@redhat.com>
738 * configure.in (SHARED_LIBADD): Select the correct host specific
739 file extension for shared libraries.
740 * configure: Regenerate.
742 2008-02-13 Jan Beulich <jbeulich@novell.com>
744 * i386-opc.h (RegFlat): New.
745 * i386-reg.tbl (flat): Add.
746 * i386-tbl.h: Re-generate.
748 2008-02-13 Jan Beulich <jbeulich@novell.com>
750 * i386-dis.c (a_mode): New.
751 (cond_jump_mode): Adjust.
752 (Ma): Change to a_mode.
753 (intel_operand_size): Handle a_mode.
754 * i386-opc.tbl: Allow Dword and Qword for bound.
755 * i386-tbl.h: Re-generate.
757 2008-02-13 Jan Beulich <jbeulich@novell.com>
759 * i386-gen.c (process_i386_registers): Process new fields.
760 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
761 unsigned char. Add dw2_regnum and Dw2Inval.
762 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
764 * i386-tbl.h: Re-generate.
766 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
768 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
769 * i386-init.h: Updated.
771 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
773 * i386-gen.c (cpu_flags): Add CpuXsave.
775 * i386-opc.h (CpuXsave): New.
777 (i386_cpu_flags): Add cpuxsave.
779 * i386-dis.c (MOD_0FAE_REG_4): New.
780 (RM_0F01_REG_2): Likewise.
781 (MOD_0FAE_REG_5): Updated.
782 (RM_0F01_REG_3): Likewise.
783 (reg_table): Use MOD_0FAE_REG_4.
784 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
786 (rm_table): Add RM_0F01_REG_2.
788 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
789 * i386-init.h: Regenerated.
790 * i386-tbl.h: Likewise.
792 2008-02-11 Jan Beulich <jbeulich@novell.com>
794 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
795 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
796 * i386-tbl.h: Re-generate.
798 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
801 * configure: Regenerated.
803 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
805 * mips-dis.c: Update copyright.
806 (mips_arch_choices): Add Octeon.
807 * mips-opc.c: Update copyright.
809 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
811 2008-01-29 Alan Modra <amodra@bigpond.net.au>
813 * ppc-opc.c: Support optional L form mtmsr.
815 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
817 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
819 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
821 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
822 * i386-init.h: Regenerated.
824 2008-01-23 Tristan Gingold <gingold@adacore.com>
826 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
827 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
829 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
831 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
832 (cpu_flags): Likewise.
834 * i386-opc.h (CpuMMX2): Removed.
837 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
838 * i386-init.h: Regenerated.
839 * i386-tbl.h: Likewise.
841 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
843 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
845 * i386-init.h: Regenerated.
847 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
849 * i386-opc.tbl: Use Qword on movddup.
850 * i386-tbl.h: Regenerated.
852 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
854 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
855 * i386-tbl.h: Regenerated.
857 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
859 * i386-dis.c (Mx): New.
860 (PREFIX_0FC3): Likewise.
861 (PREFIX_0FC7_REG_6): Updated.
862 (dis386_twobyte): Use PREFIX_0FC3.
863 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
864 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
867 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
869 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
870 (operand_types): Add Mem.
872 * i386-opc.h (IntelSyntax): New.
873 * i386-opc.h (Mem): New.
875 (Opcode_Modifier_Max): Updated.
876 (i386_opcode_modifier): Add intelsyntax.
877 (i386_operand_type): Add mem.
879 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
882 * i386-reg.tbl: Add size for accumulator.
884 * i386-init.h: Regenerated.
885 * i386-tbl.h: Likewise.
887 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
889 * i386-opc.h (Byte): Fix a typo.
891 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
894 * i386-gen.c (operand_type_init): Add Dword to
895 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
896 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
898 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
899 Xmmword, Unspecified and Anysize.
900 (set_bitfield): Make Mmword an alias of Qword. Make Oword
903 * i386-opc.h (CheckSize): Removed.
911 (i386_opcode_modifier): Remove checksize, byte, word, dword,
915 (Unspecified): Likewise.
917 (i386_operand_type): Add byte, word, dword, fword, qword,
918 tbyte xmmword, unspecified and anysize.
920 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
921 Tbyte, Xmmword, Unspecified and Anysize.
923 * i386-reg.tbl: Add size for accumulator.
925 * i386-init.h: Regenerated.
926 * i386-tbl.h: Likewise.
928 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
930 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
932 (reg_table): Updated.
933 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
934 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
936 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
938 * i386-gen.c (set_bitfield): Use fail () on error.
940 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
942 * i386-gen.c (lineno): New.
943 (filename): Likewise.
944 (set_bitfield): Report filename and line numer on error.
945 (process_i386_opcodes): Set filename and update lineno.
946 (process_i386_registers): Likewise.
948 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
950 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
953 * i386-opc.h (IntelMnemonic): Renamed to ..
955 (Opcode_Modifier_Max): Updated.
956 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
959 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
960 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
961 * i386-tbl.h: Regenerated.
963 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
965 * i386-gen.c: Update copyright to 2008.
966 * i386-opc.h: Likewise.
967 * i386-opc.tbl: Likewise.
969 * i386-init.h: Regenerated.
970 * i386-tbl.h: Likewise.
972 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
974 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
975 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
976 * i386-tbl.h: Regenerated.
978 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
980 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
982 (cpu_flags): Likewise.
984 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
985 (CpuSSE4_2_Or_ABM): Likewise.
987 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
989 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
990 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
991 and CpuPadLock, respectively.
992 * i386-init.h: Regenerated.
993 * i386-tbl.h: Likewise.
995 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
997 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
999 * i386-opc.h (No_xSuf): Removed.
1000 (CheckSize): Updated.
1002 * i386-tbl.h: Regenerated.
1004 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1006 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1007 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1009 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1011 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1013 (i386_cpu_flags): Add cpusse4_2_or_abm.
1015 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1016 CpuABM|CpuSSE4_2 on popcnt.
1017 * i386-init.h: Regenerated.
1018 * i386-tbl.h: Likewise.
1020 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1022 * i386-opc.h: Update comments.
1024 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1026 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1027 * i386-opc.h: Likewise.
1028 * i386-opc.tbl: Likewise.
1030 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1033 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1034 Byte, Word, Dword, QWord and Xmmword.
1036 * i386-opc.h (No_xSuf): New.
1037 (CheckSize): Likewise.
1042 (Xmmword): Likewise.
1044 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1045 Dword, QWord and Xmmword.
1047 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1049 * i386-tbl.h: Regenerated.
1051 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1053 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1056 For older changes see ChangeLog-2007
1062 version-control: never