opcodes/ChangeLog

   1 2008-11-25  Nick Clifton  <nickc@redhat.com>
   2
   3         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
   4
   5 2008-11-18  Catherine Moore  <clm@codesourcery.com>
   6
   7         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
   8         instructions.
   9         (neon_opcodes): Likewise.
  10         (print_insn_coprocessor): Print 't' or 'b' for vcvt
  11         instructions.
  12
  13 2008-11-14  Tristan Gingold  <gingold@adacore.com>
  14
  15         * makefile.vms (OBJS): Update list of objects.
  16         (DEFS): Update
  17         (CFLAGS): Update.
  18
  19 2008-11-06  Chao-ying Fu  <fu@mips.com>
  20
  21         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
  22         before sync.
  23         (sync): New instruction with 5-bit sync type.
  24         * mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.
  25
  26 2008-11-06  Nick Clifton  <nickc@redhat.com>
  27
  28         * avr-dis.c: Replace uses of sprintf without a format string with
  29         calls to strcpy.
  30
  31 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * i386-opc.tbl: Add cmovpe and cmovpo.
  34         * i386-tbl.h: Regenerated.
  35
  36 2008-10-22  Nick Clifton  <nickc@redhat.com>
  37
  38         PR 6937
  39         * configure.in (SHARED_LIBADD): Revert previous change.
  40         Add a comment explaining why.
  41         (SHARED_DEPENDENCIES): Revert previous change.
  42         * configure: Regenerate.
  43
  44 2008-10-10  Nick Clifton  <nickc@redhat.com>
  45
  46         PR 6937
  47         * configure.in (SHARED_LIBADD): Add libiberty.a.
  48         (SHARED_DEPENDENCIES): Add libiberty.a.
  49
  50 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  51
  52         * i386-gen.c: Include "hashtab.h".
  53         (next_field): Take a new argument, last.  Check last.
  54         (process_i386_cpu_flag): Updated.
  55         (process_i386_opcode_modifier): Likewise.
  56         (process_i386_operand_type): Likewise.
  57         (process_i386_registers): Likewise.
  58         (output_i386_opcode): New.
  59         (opcode_hash_entry): Likewise.
  60         (opcode_hash_table): Likewise.
  61         (opcode_hash_hash): Likewise.
  62         (opcode_hash_eq): Likewise.
  63         (process_i386_opcodes): Use opcode hash table and opcode array.
  64
  65 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  66
  67         * s390-opc.txt (stdy, stey): Fix description
  68
  69 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
  70
  71         * Makefile.am: Run "make dep-am".
  72         * Makefile.in: Regenerate.
  73
  74 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         * aclocal.m4: Regenerated.
  77         * configure: Likewise.
  78         * Makefile.in: Likewise.
  79
  80 2008-09-29  Nick Clifton  <nickc@redhat.com>
  81
  82         * po/vi.po: Updated Vietnamese translation.
  83         * po/fr.po: Updated French translation.
  84
  85 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
  86
  87         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
  88         (cfxr, cfdr, cfer, clclu): Add esa flag.
  89         (sqd): Instruction added.
  90         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
  91         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
  92
  93 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
  94
  95         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
  96         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
  97
  98 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
  99
 100         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 101         * i386-tbl.h: Regenerated.
 102
 103 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 104
 105         * i386-dis.c (dis386): Adjust far return mnemonics.
 106         * i386-opc.tbl: Add retf.
 107         * i386-tbl.h: Re-generate.
 108
 109 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 110
 111         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 112
 113 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 114
 115         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 116         * ia64-gen.c (lookup_specifier): Likewise.
 117
 118         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 119         * ia64-raw.tbl: Likewise.
 120         * ia64-waw.tbl: Likewise.
 121         * ia64-asmtab.c: Regenerated.
 122
 123 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 124
 125         * i386-opc.tbl: Correct fidivr operand size.
 126
 127         * i386-tbl.h: Regenerated.
 128
 129 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 130
 131         * configure.in: Update a number of obsolete autoconf macros.
 132         * aclocal.m4: Regenerate.
 133
 134 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 135
 136         AVX Programming Reference (August, 2008)
 137         * i386-dis.c (PREFIX_VEX_38DB): New.
 138         (PREFIX_VEX_38DC): Likewise.
 139         (PREFIX_VEX_38DD): Likewise.
 140         (PREFIX_VEX_38DE): Likewise.
 141         (PREFIX_VEX_38DF): Likewise.
 142         (PREFIX_VEX_3ADF): Likewise.
 143         (VEX_LEN_38DB_P_2): Likewise.
 144         (VEX_LEN_38DC_P_2): Likewise.
 145         (VEX_LEN_38DD_P_2): Likewise.
 146         (VEX_LEN_38DE_P_2): Likewise.
 147         (VEX_LEN_38DF_P_2): Likewise.
 148         (VEX_LEN_3ADF_P_2): Likewise.
 149         (PREFIX_VEX_3A04): Updated.
 150         (VEX_LEN_3A06_P_2): Likewise.
 151         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 152         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 153         (x86_64_table): Likewise.
 154         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 155         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 156         VEX_LEN_3ADF_P_2.
 157
 158         * i386-opc.tbl: Add AES + AVX instructions.
 159         * i386-init.h: Regenerated.
 160         * i386-tbl.h: Likewise.
 161
 162 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 163
 164         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 165         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 166
 167 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 168
 169         PR 6526
 170         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 171         * Makefile.in: Regenerate.
 172         * aclocal.m4: Regenerate.
 173         * config.in: Regenerate.
 174         * configure: Regenerate.
 175
 176 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 177
 178         PR 6825
 179         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 180
 181 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 182
 183         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 184
 185         * i386-tbl.h: Regenerated.
 186
 187 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 188
 189         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 190         * Makefile.in: Regenerate.
 191         * po/POTFILES.in: Regenerate.
 192
 193 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 194
 195         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 196         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 197         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 198         * ppc-opc.c (insert_xt6): New static function.
 199         (extract_xt6): Likewise.
 200         (insert_xa6): Likewise.
 201         (extract_xa6: Likewise.
 202         (insert_xb6): Likewise.
 203         (extract_xb6): Likewise.
 204         (insert_xb6s): Likewise.
 205         (extract_xb6s): Likewise.
 206         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 207         XX3DM_MASK, PPCVSX): New.
 208         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 209         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 210
 211 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 212
 213         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 214         * Makefile.in: Regenerate.
 215
 216 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 217
 218         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 219         * i386-tbl.h: Regenerated.
 220
 221 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 222
 223         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 224         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 225         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 226         (powerpc_opcodes): Add Xilinx APU related opcodes.
 227
 228 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 229
 230         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 231
 232 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 233
 234         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 235
 236 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 237
 238         * mips-opc.c (CP): New macro.
 239         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 240         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 241         dmtc2 Octeon instructions.
 242
 243 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 244
 245         * dis-init.c (init_disassemble_info): Init endian_code field.
 246         * arm-dis.c (print_insn): Disassemble code according to
 247         setting of endian_code.
 248         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 249
 250 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 251
 252         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 253         for ELF symbols.
 254
 255 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 256
 257         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 258         (print_ppc_disassembler_options): Likewise.
 259         * ppc-opc.c (PPC464): Define.
 260         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 261
 262 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 263
 264         * configure: Regenerate.
 265
 266 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 267
 268         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 269         ppc_cpu_t typedef.
 270         (struct dis_private): New.
 271         (POWERPC_DIALECT): New define.
 272         (powerpc_dialect): Renamed to...
 273         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 274         struct dis_private.
 275         (print_insn_big_powerpc): Update for using structure in
 276         info->private_data.
 277         (print_insn_little_powerpc): Likewise.
 278         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 279         (skip_optional_operands): Likewise.
 280         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 281         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 282         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 283         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 284         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 285         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 286         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 287         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 288         param to be of type ppc_cpu_t.  Update prototype.
 289
 290 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 291
 292         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 293         +s, +S.
 294         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 295         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 296         syncw, syncws, vm3mulu, vm0 and vmulu.
 297
 298         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 299         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 300         seqi, sne and snei.
 301
 302 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 303
 304         * i386-opc.tbl: Add vmovd with 64bit operand.
 305         * i386-tbl.h: Regenerated.
 306
 307 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 308
 309         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 310
 311 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 312
 313         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 314         * i386-tbl.h: Regenerated.
 315
 316 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 317
 318         PR gas/6517
 319         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 320         into 32bit and 64bit.  Remove Reg64|Qword and add
 321         IgnoreSize|No_qSuf on 32bit version.
 322         * i386-tbl.h: Regenerated.
 323
 324 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 325
 326         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 327         * i386-tbl.h: Regenerated.
 328
 329 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 330
 331         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 332
 333 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 334
 335         * Makefile.am: Run "make dep-am".
 336         * Makefile.in: Regenerate.
 337
 338 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 339
 340         * i386-dis.c (MOVBE_Fixup): New.
 341         (Mo): Likewise.
 342         (PREFIX_0F3880): Likewise.
 343         (PREFIX_0F3881): Likewise.
 344         (PREFIX_0F38F0): Updated.
 345         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 346         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 347         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 348
 349         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 350         CPU_EPT_FLAGS.
 351         (cpu_flags): Add CpuMovbe and CpuEPT.
 352
 353         * i386-opc.h (CpuMovbe): New.
 354         (CpuEPT): Likewise.
 355         (CpuLM): Updated.
 356         (i386_cpu_flags): Add cpumovbe and cpuept.
 357
 358         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 359         * i386-init.h: Regenerated.
 360         * i386-tbl.h: Likewise.
 361
 362 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 363
 364         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 365         the two drem and the two dremu macros.
 366
 367 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 368
 369         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 370         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 371         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 372         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 373
 374 2008-04-25  David S. Miller  <davem@davemloft.net>
 375
 376         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 377         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 378
 379 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 380
 381         * aclocal.m4: Regenerate.
 382         * configure: Regenerate.
 383
 384 2008-04-23  David S. Miller  <davem@davemloft.net>
 385
 386         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 387         extended values.
 388         (prefetch_table): Add missing values.
 389
 390 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 391
 392         * i386-gen.c (opcode_modifiers): Add NoAVX.
 393
 394         * i386-opc.h (NoAVX): New.
 395         (OldGcc): Updated.
 396         (i386_opcode_modifier): Add noavx.
 397
 398         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 399         instructions which don't have AVX equivalent.
 400         * i386-tbl.h: Regenerated.
 401
 402 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 403
 404         * i386-dis.c (OP_VEX_FMA): New.
 405         (OP_EX_VexImmW): Likewise.
 406         (VexFMA): Likewise.
 407         (Vex128FMA): Likewise.
 408         (EXVexImmW): Likewise.
 409         (get_vex_imm8): Likewise.
 410         (OP_EX_VexReg): Likewise.
 411         (vex_i4_done): Renamed to ...
 412         (vex_w_done): This.
 413         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 414         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 415         FMA instructions.
 416         (print_insn): Updated.
 417         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 418         (OP_REG_VexI4): Check invalid high registers.
 419
 420 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 421             Michael Meissner  <michael.meissner@amd.com>
 422
 423         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 424         * i386-tbl.h: Regenerate from i386-opc.tbl.
 425
 426 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 427
 428         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 429         accept Power E500MC instructions.
 430         (print_ppc_disassembler_options): Document -Me500mc.
 431         * ppc-opc.c (DUIS, DUI, T): New.
 432         (XRT, XRTRA): Likewise.
 433         (E500MC): Likewise.
 434         (powerpc_opcodes): Add new Power E500MC instructions.
 435
 436 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 437
 438         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 439         (print_s390_disassembler_options): New function.
 440         * disassemble.c (disassembler_usage): Invoke
 441         print_s390_disassembler_options.
 442
 443 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 444
 445         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 446         of local variables used for mnemonic parsing: prefix, suffix and
 447         number.
 448
 449 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 450
 451         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 452         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 453         (s390_crb_extensions): New extensions table.
 454         (insertExpandedMnemonic): Handle '$' tag.
 455         * s390-opc.txt: Remove conditional jump variants which can now
 456         be expanded automatically.
 457         Replace '*' tag with '$' in the compare and branch instructions.
 458
 459 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 460
 461         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 462         (PREFIX_VEX_3AXX): Likewis.
 463
 464 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 465
 466         * i386-opc.tbl: Remove 4 extra blank lines.
 467
 468 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 469
 470         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 471         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 472         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 473         * i386-opc.tbl: Likewise.
 474
 475         * i386-opc.h (CpuCLMUL): Renamed to ...
 476         (CpuPCLMUL): This.
 477         (CpuFMA): Updated.
 478         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 479
 480         * i386-init.h: Regenerated.
 481
 482 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 483
 484         * i386-dis.c (OP_E_register): New.
 485         (OP_E_memory): Likewise.
 486         (OP_VEX): Likewise.
 487         (OP_EX_Vex): Likewise.
 488         (OP_EX_VexW): Likewise.
 489         (OP_XMM_Vex): Likewise.
 490         (OP_XMM_VexW): Likewise.
 491         (OP_REG_VexI4): Likewise.
 492         (PCLMUL_Fixup): Likewise.
 493         (VEXI4_Fixup): Likewise.
 494         (VZERO_Fixup): Likewise.
 495         (VCMP_Fixup): Likewise.
 496         (VPERMIL2_Fixup): Likewise.
 497         (rex_original): Likewise.
 498         (rex_ignored): Likewise.
 499         (Mxmm): Likewise.
 500         (XMM): Likewise.
 501         (EXxmm): Likewise.
 502         (EXxmmq): Likewise.
 503         (EXymmq): Likewise.
 504         (Vex): Likewise.
 505         (Vex128): Likewise.
 506         (Vex256): Likewise.
 507         (VexI4): Likewise.
 508         (EXdVex): Likewise.
 509         (EXqVex): Likewise.
 510         (EXVexW): Likewise.
 511         (EXdVexW): Likewise.
 512         (EXqVexW): Likewise.
 513         (XMVex): Likewise.
 514         (XMVexW): Likewise.
 515         (XMVexI4): Likewise.
 516         (PCLMUL): Likewise.
 517         (VZERO): Likewise.
 518         (VCMP): Likewise.
 519         (VPERMIL2): Likewise.
 520         (xmm_mode): Likewise.
 521         (xmmq_mode): Likewise.
 522         (ymmq_mode): Likewise.
 523         (vex_mode): Likewise.
 524         (vex128_mode): Likewise.
 525         (vex256_mode): Likewise.
 526         (USE_VEX_C4_TABLE): Likewise.
 527         (USE_VEX_C5_TABLE): Likewise.
 528         (USE_VEX_LEN_TABLE): Likewise.
 529         (VEX_C4_TABLE): Likewise.
 530         (VEX_C5_TABLE): Likewise.
 531         (VEX_LEN_TABLE): Likewise.
 532         (REG_VEX_XX): Likewise.
 533         (MOD_VEX_XXX): Likewise.
 534         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 535         (PREFIX_0F3A44): Likewise.
 536         (PREFIX_0F3ADF): Likewise.
 537         (PREFIX_VEX_XXX): Likewise.
 538         (VEX_OF): Likewise.
 539         (VEX_OF38): Likewise.
 540         (VEX_OF3A): Likewise.
 541         (VEX_LEN_XXX): Likewise.
 542         (vex): Likewise.
 543         (need_vex): Likewise.
 544         (need_vex_reg): Likewise.
 545         (vex_i4_done): Likewise.
 546         (vex_table): Likewise.
 547         (vex_len_table): Likewise.
 548         (OP_REG_VexI4): Likewise.
 549         (vex_cmp_op): Likewise.
 550         (pclmul_op): Likewise.
 551         (vpermil2_op): Likewise.
 552         (m_mode): Updated.
 553         (es_reg): Likewise.
 554         (PREFIX_0F38F0): Likewise.
 555         (PREFIX_0F3A60): Likewise.
 556         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 557         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 558         and PREFIX_VEX_XXX entries.
 559         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 560         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 561         PREFIX_0F3ADF.
 562         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 563         Add MOD_VEX_XXX entries.
 564         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 565         REX byte in rex_original.
 566         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 567         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 568         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 569         calling get_valid_dis386.  Use rex_original and rex_ignored when
 570         printing out REX.
 571         (putop): Handle "XY".
 572         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 573         ymmq_mode.
 574         (OP_E_extended): Updated to use OP_E_register and
 575         OP_E_memory.
 576         (OP_XMM): Handle VEX.
 577         (OP_EX): Likewise.
 578         (XMM_Fixup): Likewise.
 579         (CMP_Fixup): Use ARRAY_SIZE.
 580
 581         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 582         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 583         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 584         OPERAND_TYPE_VEX_IMM4.
 585         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 586         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 587         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 588         VexImmExt and SSE2AVX.
 589         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 590
 591         * i386-opc.h (CpuAVX): New.
 592         (CpuAES): Likewise.
 593         (CpuCLMUL): Likewise.
 594         (CpuFMA): Likewise.
 595         (Vex): Likewise.
 596         (Vex256): Likewise.
 597         (VexNDS): Likewise.
 598         (VexNDD): Likewise.
 599         (VexW0): Likewise.
 600         (VexW1): Likewise.
 601         (Vex0F): Likewise.
 602         (Vex0F38): Likewise.
 603         (Vex0F3A): Likewise.
 604         (Vex3Sources): Likewise.
 605         (VexImmExt): Likewise.
 606         (SSE2AVX): Likewise.
 607         (RegYMM): Likewise.
 608         (Ymmword): Likewise.
 609         (Vex_Imm4): Likewise.
 610         (Implicit1stXmm0): Likewise.
 611         (CpuXsave): Updated.
 612         (CpuLM): Likewise.
 613         (ByteOkIntel): Likewise.
 614         (OldGcc): Likewise.
 615         (Control): Likewise.
 616         (Unspecified): Likewise.
 617         (OTMax): Likewise.
 618         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 619         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 620         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 621         vex3sources, veximmext and sse2avx.
 622         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 623
 624         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 625
 626         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 627
 628         * i386-init.h: Regenerated.
 629         * i386-tbl.h: Likewise.
 630
 631 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 632
 633         From  Robin Getz  <robin.getz@analog.com>
 634         * bfin-dis.c (bu32): Typedef.
 635         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 636         (constant_formats[]): Add uimm32 and huimm16.
 637         (fmtconst_val): New.
 638         (uimm32): Define.
 639         (huimm32): Define.
 640         (imm16_val): Define.
 641         (luimm16_val): Define.
 642         (struct saved_state): Define.
 643         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 644         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 645         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 646         (get_allreg): New.
 647         (decode_LDIMMhalf_0): Print out the whole register value.
 648
 649         From Jie Zhang  <jie.zhang@analog.com>
 650         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 651         multiply and multiply-accumulate to data register instruction.
 652
 653         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 654         c_imm32, c_huimm32e): Define.
 655         (constant_formats): Add flags for printing decimal, leading spaces, and
 656         exact symbols.
 657         (comment, parallel): Add global flags in all disassembly.
 658         (fmtconst): Take advantage of new flags, and print default in hex.
 659         (fmtconst_val): Likewise.
 660         (decode_macfunc): Be consistant with spaces, tabs, comments,
 661         capitalization in disassembly, fix minor coding style issues.
 662         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 663         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 664         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 665         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 666         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 667         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 668         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 669         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 670         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 671         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 672         _print_insn_bfin, print_insn_bfin): Likewise.
 673
 674 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 675
 676         * aclocal.m4: Regenerate.
 677         * configure: Likewise.
 678         * Makefile.in: Likewise.
 679
 680 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 681
 682         * Makefile.am: Run "make dep-am".
 683         * Makefile.in: Regenerate.
 684         * configure: Regenerate.
 685
 686 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 687
 688         * ppc-opc.c (powerpc_opcodes): Order and format.
 689
 690 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 691
 692         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 693         * i386-tbl.h: Regenerated.
 694
 695 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 696
 697         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 698         x86-64.
 699         * i386-tbl.h: Regenerated.
 700
 701 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 702
 703         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 704         and Fword for far indirect jmp. Allow Reg16 and Word for near
 705         indirect jmp on x86-64. Disallow Fword for lcall.
 706         * i386-tbl.h: Re-generate.
 707
 708 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 709
 710         * cr16-opc.c  (cr16_num_optab): Defined
 711
 712 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 713
 714         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 715         * i386-init.h: Regenerated.
 716
 717 2008-02-14  Nick Clifton  <nickc@redhat.com>
 718
 719         PR binutils/5524
 720         * configure.in (SHARED_LIBADD): Select the correct host specific
 721         file extension for shared libraries.
 722         * configure: Regenerate.
 723
 724 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 725
 726         * i386-opc.h (RegFlat): New.
 727         * i386-reg.tbl (flat): Add.
 728         * i386-tbl.h: Re-generate.
 729
 730 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 731
 732         * i386-dis.c (a_mode): New.
 733         (cond_jump_mode): Adjust.
 734         (Ma): Change to a_mode.
 735         (intel_operand_size): Handle a_mode.
 736         * i386-opc.tbl: Allow Dword and Qword for bound.
 737         * i386-tbl.h: Re-generate.
 738
 739 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 740
 741         * i386-gen.c (process_i386_registers): Process new fields.
 742         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 743         unsigned char. Add dw2_regnum and Dw2Inval.
 744         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 745         register names.
 746         * i386-tbl.h: Re-generate.
 747
 748 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 749
 750         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 751         * i386-init.h: Updated.
 752
 753 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 754
 755         * i386-gen.c (cpu_flags): Add CpuXsave.
 756
 757         * i386-opc.h (CpuXsave): New.
 758         (CpuLM): Updated.
 759         (i386_cpu_flags): Add cpuxsave.
 760
 761         * i386-dis.c (MOD_0FAE_REG_4): New.
 762         (RM_0F01_REG_2): Likewise.
 763         (MOD_0FAE_REG_5): Updated.
 764         (RM_0F01_REG_3): Likewise.
 765         (reg_table): Use MOD_0FAE_REG_4.
 766         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 767         for xrstor.
 768         (rm_table): Add RM_0F01_REG_2.
 769
 770         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 771         * i386-init.h: Regenerated.
 772         * i386-tbl.h: Likewise.
 773
 774 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 775
 776         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 777         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 778         * i386-tbl.h: Re-generate.
 779
 780 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 781
 782         PR 5715
 783         * configure: Regenerated.
 784
 785 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 786
 787         * mips-dis.c: Update copyright.
 788         (mips_arch_choices): Add Octeon.
 789         * mips-opc.c: Update copyright.
 790         (IOCT): New macro.
 791         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 792
 793 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 794
 795         * ppc-opc.c: Support optional L form mtmsr.
 796
 797 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 798
 799         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 800
 801 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 802
 803         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 804         * i386-init.h: Regenerated.
 805
 806 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 807
 808         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 809         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 810
 811 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 812
 813         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 814         (cpu_flags): Likewise.
 815
 816         * i386-opc.h (CpuMMX2): Removed.
 817         (CpuSSE): Updated.
 818
 819         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 820         * i386-init.h: Regenerated.
 821         * i386-tbl.h: Likewise.
 822
 823 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 824
 825         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 826         CPU_SMX_FLAGS.
 827         * i386-init.h: Regenerated.
 828
 829 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 830
 831         * i386-opc.tbl: Use Qword on movddup.
 832         * i386-tbl.h: Regenerated.
 833
 834 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 835
 836         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 837         * i386-tbl.h: Regenerated.
 838
 839 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 840
 841         * i386-dis.c (Mx): New.
 842         (PREFIX_0FC3): Likewise.
 843         (PREFIX_0FC7_REG_6): Updated.
 844         (dis386_twobyte): Use PREFIX_0FC3.
 845         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 846         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 847         movntss.
 848
 849 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 850
 851         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 852         (operand_types): Add Mem.
 853
 854         * i386-opc.h (IntelSyntax): New.
 855         * i386-opc.h (Mem): New.
 856         (Byte): Updated.
 857         (Opcode_Modifier_Max): Updated.
 858         (i386_opcode_modifier): Add intelsyntax.
 859         (i386_operand_type): Add mem.
 860
 861         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 862         instructions.
 863
 864         * i386-reg.tbl: Add size for accumulator.
 865
 866         * i386-init.h: Regenerated.
 867         * i386-tbl.h: Likewise.
 868
 869 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 870
 871         * i386-opc.h (Byte): Fix a typo.
 872
 873 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 874
 875         PR gas/5534
 876         * i386-gen.c (operand_type_init): Add Dword to
 877         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 878         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 879         Qword and Xmmword.
 880         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 881         Xmmword, Unspecified and Anysize.
 882         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 883         an alias of Xmmword.
 884
 885         * i386-opc.h (CheckSize): Removed.
 886         (Byte): Updated.
 887         (Word): Likewise.
 888         (Dword): Likewise.
 889         (Qword): Likewise.
 890         (Xmmword): Likewise.
 891         (FWait): Updated.
 892         (OTMax): Likewise.
 893         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 894         qword and xmmword.
 895         (Fword): New.
 896         (TBYTE): Likewise.
 897         (Unspecified): Likewise.
 898         (Anysize): Likewise.
 899         (i386_operand_type): Add byte, word, dword, fword, qword,
 900         tbyte xmmword, unspecified and anysize.
 901
 902         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 903         Tbyte, Xmmword, Unspecified and Anysize.
 904
 905         * i386-reg.tbl: Add size for accumulator.
 906
 907         * i386-init.h: Regenerated.
 908         * i386-tbl.h: Likewise.
 909
 910 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 911
 912         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 913         (REG_0F18): Updated.
 914         (reg_table): Updated.
 915         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 916         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 917
 918 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 919
 920         * i386-gen.c (set_bitfield): Use fail () on error.
 921
 922 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 923
 924         * i386-gen.c (lineno): New.
 925         (filename): Likewise.
 926         (set_bitfield): Report filename and line numer on error.
 927         (process_i386_opcodes): Set filename and update lineno.
 928         (process_i386_registers): Likewise.
 929
 930 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 931
 932         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 933         ATTSyntax.
 934
 935         * i386-opc.h (IntelMnemonic): Renamed to ..
 936         (ATTSyntax): This
 937         (Opcode_Modifier_Max): Updated.
 938         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 939         and intelsyntax.
 940
 941         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 942         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 943         * i386-tbl.h: Regenerated.
 944
 945 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 946
 947         * i386-gen.c: Update copyright to 2008.
 948         * i386-opc.h: Likewise.
 949         * i386-opc.tbl: Likewise.
 950
 951         * i386-init.h: Regenerated.
 952         * i386-tbl.h: Likewise.
 953
 954 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 955
 956         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 957         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 958         * i386-tbl.h: Regenerated.
 959
 960 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 961
 962         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 963         CpuSSE4_2_Or_ABM.
 964         (cpu_flags): Likewise.
 965
 966         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 967         (CpuSSE4_2_Or_ABM): Likewise.
 968         (CpuLM): Updated.
 969         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 970
 971         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 972         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 973         and CpuPadLock, respectively.
 974         * i386-init.h: Regenerated.
 975         * i386-tbl.h: Likewise.
 976
 977 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 978
 979         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 980
 981         * i386-opc.h (No_xSuf): Removed.
 982         (CheckSize): Updated.
 983
 984         * i386-tbl.h: Regenerated.
 985
 986 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 987
 988         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 989         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 990         CPU_SSE5_FLAGS.
 991         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 992
 993         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 994         (CpuLM): Updated.
 995         (i386_cpu_flags): Add cpusse4_2_or_abm.
 996
 997         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 998         CpuABM|CpuSSE4_2 on popcnt.
 999         * i386-init.h: Regenerated.
1000         * i386-tbl.h: Likewise.
1001
1002 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1003
1004         * i386-opc.h: Update comments.
1005
1006 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1007
1008         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1009         * i386-opc.h: Likewise.
1010         * i386-opc.tbl: Likewise.
1011
1012 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1013
1014         PR gas/5534
1015         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1016         Byte, Word, Dword, QWord and Xmmword.
1017
1018         * i386-opc.h (No_xSuf): New.
1019         (CheckSize): Likewise.
1020         (Byte): Likewise.
1021         (Word): Likewise.
1022         (Dword): Likewise.
1023         (QWord): Likewise.
1024         (Xmmword): Likewise.
1025         (FWait): Updated.
1026         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1027         Dword, QWord and Xmmword.
1028
1029         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1030         used.
1031         * i386-tbl.h: Regenerated.
1032
1033 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1034
1035         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1036         From Miod Vallat.
1037
1038 For older changes see ChangeLog-2007
1039 \f
1040 Local Variables:
1041 mode: change-log
1042 left-margin: 8
1043 fill-column: 74
1044 version-control: never
1045 End: