opcodes/ChangeLog

   1 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
   2
   3         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
   4
   5 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
   8         * i386-tbl.h: Regenerated.
   9
  10 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  11
  12         PR gas/6517
  13         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
  14         into 32bit and 64bit.  Remove Reg64|Qword and add
  15         IgnoreSize|No_qSuf on 32bit version.
  16         * i386-tbl.h: Regenerated.
  17
  18 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
  19
  20         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
  21         * i386-tbl.h: Regenerated.
  22
  23 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  24
  25         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
  26
  27 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
  28
  29         * Makefile.am: Run "make dep-am".
  30         * Makefile.in: Regenerate.
  31
  32 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  33
  34         * i386-dis.c (MOVBE_Fixup): New.
  35         (Mo): Likewise.
  36         (PREFIX_0F3880): Likewise.
  37         (PREFIX_0F3881): Likewise.
  38         (PREFIX_0F38F0): Updated.
  39         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
  40         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
  41         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
  42
  43         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
  44         CPU_EPT_FLAGS.
  45         (cpu_flags): Add CpuMovbe and CpuEPT.
  46
  47         * i386-opc.h (CpuMovbe): New.
  48         (CpuEPT): Likewise.
  49         (CpuLM): Updated.
  50         (i386_cpu_flags): Add cpumovbe and cpuept.
  51
  52         * i386-opc.tbl: Add entries for movbe and EPT instructions.
  53         * i386-init.h: Regenerated.
  54         * i386-tbl.h: Likewise.
  55
  56 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
  57
  58         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
  59         the two drem and the two dremu macros.
  60
  61 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
  62
  63         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
  64         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
  65         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
  66         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
  67
  68 2008-04-25  David S. Miller  <davem@davemloft.net>
  69
  70         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
  71         instead of %sys_tick_cmpr, as suggested in architecture manuals.
  72
  73 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
  74
  75         * aclocal.m4: Regenerate.
  76         * configure: Regenerate.
  77
  78 2008-04-23  David S. Miller  <davem@davemloft.net>
  79
  80         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
  81         extended values.
  82         (prefetch_table): Add missing values.
  83
  84 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
  85
  86         * i386-gen.c (opcode_modifiers): Add NoAVX.
  87
  88         * i386-opc.h (NoAVX): New.
  89         (OldGcc): Updated.
  90         (i386_opcode_modifier): Add noavx.
  91
  92         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
  93         instructions which don't have AVX equivalent.
  94         * i386-tbl.h: Regenerated.
  95
  96 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * i386-dis.c (OP_VEX_FMA): New.
  99         (OP_EX_VexImmW): Likewise.
 100         (VexFMA): Likewise.
 101         (Vex128FMA): Likewise.
 102         (EXVexImmW): Likewise.
 103         (get_vex_imm8): Likewise.
 104         (OP_EX_VexReg): Likewise.
 105         (vex_i4_done): Renamed to ...
 106         (vex_w_done): This.
 107         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 108         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 109         FMA instructions.
 110         (print_insn): Updated.
 111         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 112         (OP_REG_VexI4): Check invalid high registers.
 113
 114 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 115             Michael Meissner  <michael.meissner@amd.com>
 116
 117         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 118         * i386-tbl.h: Regenerate from i386-opc.tbl.
 119
 120 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 121
 122         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 123         accept Power E500MC instructions.
 124         (print_ppc_disassembler_options): Document -Me500mc.
 125         * ppc-opc.c (DUIS, DUI, T): New.
 126         (XRT, XRTRA): Likewise.
 127         (E500MC): Likewise.
 128         (powerpc_opcodes): Add new Power E500MC instructions.
 129
 130 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 131
 132         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 133         (print_s390_disassembler_options): New function.
 134         * disassemble.c (disassembler_usage): Invoke
 135         print_s390_disassembler_options.
 136
 137 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 138
 139         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 140         of local variables used for mnemonic parsing: prefix, suffix and
 141         number.
 142
 143 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 144
 145         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 146         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 147         (s390_crb_extensions): New extensions table.
 148         (insertExpandedMnemonic): Handle '$' tag.
 149         * s390-opc.txt: Remove conditional jump variants which can now
 150         be expanded automatically.
 151         Replace '*' tag with '$' in the compare and branch instructions.
 152
 153 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 154
 155         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 156         (PREFIX_VEX_3AXX): Likewis.
 157
 158 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 159
 160         * i386-opc.tbl: Remove 4 extra blank lines.
 161
 162 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 163
 164         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 165         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 166         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 167         * i386-opc.tbl: Likewise.
 168
 169         * i386-opc.h (CpuCLMUL): Renamed to ...
 170         (CpuPCLMUL): This.
 171         (CpuFMA): Updated.
 172         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 173
 174         * i386-init.h: Regenerated.
 175
 176 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 177
 178         * i386-dis.c (OP_E_register): New.
 179         (OP_E_memory): Likewise.
 180         (OP_VEX): Likewise.
 181         (OP_EX_Vex): Likewise.
 182         (OP_EX_VexW): Likewise.
 183         (OP_XMM_Vex): Likewise.
 184         (OP_XMM_VexW): Likewise.
 185         (OP_REG_VexI4): Likewise.
 186         (PCLMUL_Fixup): Likewise.
 187         (VEXI4_Fixup): Likewise.
 188         (VZERO_Fixup): Likewise.
 189         (VCMP_Fixup): Likewise.
 190         (VPERMIL2_Fixup): Likewise.
 191         (rex_original): Likewise.
 192         (rex_ignored): Likewise.
 193         (Mxmm): Likewise.
 194         (XMM): Likewise.
 195         (EXxmm): Likewise.
 196         (EXxmmq): Likewise.
 197         (EXymmq): Likewise.
 198         (Vex): Likewise.
 199         (Vex128): Likewise.
 200         (Vex256): Likewise.
 201         (VexI4): Likewise.
 202         (EXdVex): Likewise.
 203         (EXqVex): Likewise.
 204         (EXVexW): Likewise.
 205         (EXdVexW): Likewise.
 206         (EXqVexW): Likewise.
 207         (XMVex): Likewise.
 208         (XMVexW): Likewise.
 209         (XMVexI4): Likewise.
 210         (PCLMUL): Likewise.
 211         (VZERO): Likewise.
 212         (VCMP): Likewise.
 213         (VPERMIL2): Likewise.
 214         (xmm_mode): Likewise.
 215         (xmmq_mode): Likewise.
 216         (ymmq_mode): Likewise.
 217         (vex_mode): Likewise.
 218         (vex128_mode): Likewise.
 219         (vex256_mode): Likewise.
 220         (USE_VEX_C4_TABLE): Likewise.
 221         (USE_VEX_C5_TABLE): Likewise.
 222         (USE_VEX_LEN_TABLE): Likewise.
 223         (VEX_C4_TABLE): Likewise.
 224         (VEX_C5_TABLE): Likewise.
 225         (VEX_LEN_TABLE): Likewise.
 226         (REG_VEX_XX): Likewise.
 227         (MOD_VEX_XXX): Likewise.
 228         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 229         (PREFIX_0F3A44): Likewise.
 230         (PREFIX_0F3ADF): Likewise.
 231         (PREFIX_VEX_XXX): Likewise.
 232         (VEX_OF): Likewise.
 233         (VEX_OF38): Likewise.
 234         (VEX_OF3A): Likewise.
 235         (VEX_LEN_XXX): Likewise.
 236         (vex): Likewise.
 237         (need_vex): Likewise.
 238         (need_vex_reg): Likewise.
 239         (vex_i4_done): Likewise.
 240         (vex_table): Likewise.
 241         (vex_len_table): Likewise.
 242         (OP_REG_VexI4): Likewise.
 243         (vex_cmp_op): Likewise.
 244         (pclmul_op): Likewise.
 245         (vpermil2_op): Likewise.
 246         (m_mode): Updated.
 247         (es_reg): Likewise.
 248         (PREFIX_0F38F0): Likewise.
 249         (PREFIX_0F3A60): Likewise.
 250         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 251         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 252         and PREFIX_VEX_XXX entries.
 253         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 254         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 255         PREFIX_0F3ADF.
 256         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 257         Add MOD_VEX_XXX entries.
 258         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 259         REX byte in rex_original.
 260         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 261         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 262         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 263         calling get_valid_dis386.  Use rex_original and rex_ignored when
 264         printing out REX.
 265         (putop): Handle "XY".
 266         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 267         ymmq_mode.
 268         (OP_E_extended): Updated to use OP_E_register and
 269         OP_E_memory.
 270         (OP_XMM): Handle VEX.
 271         (OP_EX): Likewise.
 272         (XMM_Fixup): Likewise.
 273         (CMP_Fixup): Use ARRAY_SIZE.
 274
 275         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 276         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 277         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 278         OPERAND_TYPE_VEX_IMM4.
 279         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 280         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 281         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 282         VexImmExt and SSE2AVX.
 283         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 284
 285         * i386-opc.h (CpuAVX): New.
 286         (CpuAES): Likewise.
 287         (CpuCLMUL): Likewise.
 288         (CpuFMA): Likewise.
 289         (Vex): Likewise.
 290         (Vex256): Likewise.
 291         (VexNDS): Likewise.
 292         (VexNDD): Likewise.
 293         (VexW0): Likewise.
 294         (VexW1): Likewise.
 295         (Vex0F): Likewise.
 296         (Vex0F38): Likewise.
 297         (Vex0F3A): Likewise.
 298         (Vex3Sources): Likewise.
 299         (VexImmExt): Likewise.
 300         (SSE2AVX): Likewise.
 301         (RegYMM): Likewise.
 302         (Ymmword): Likewise.
 303         (Vex_Imm4): Likewise.
 304         (Implicit1stXmm0): Likewise.
 305         (CpuXsave): Updated.
 306         (CpuLM): Likewise.
 307         (ByteOkIntel): Likewise.
 308         (OldGcc): Likewise.
 309         (Control): Likewise.
 310         (Unspecified): Likewise.
 311         (OTMax): Likewise.
 312         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 313         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 314         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 315         vex3sources, veximmext and sse2avx.
 316         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 317
 318         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 319
 320         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 321
 322         * i386-init.h: Regenerated.
 323         * i386-tbl.h: Likewise.
 324
 325 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 326
 327         From  Robin Getz  <robin.getz@analog.com>
 328         * bfin-dis.c (bu32): Typedef.
 329         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 330         (constant_formats[]): Add uimm32 and huimm16.
 331         (fmtconst_val): New.
 332         (uimm32): Define.
 333         (huimm32): Define.
 334         (imm16_val): Define.
 335         (luimm16_val): Define.
 336         (struct saved_state): Define.
 337         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 338         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 339         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 340         (get_allreg): New.
 341         (decode_LDIMMhalf_0): Print out the whole register value.
 342
 343         From Jie Zhang  <jie.zhang@analog.com>
 344         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 345         multiply and multiply-accumulate to data register instruction.
 346
 347         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 348         c_imm32, c_huimm32e): Define.
 349         (constant_formats): Add flags for printing decimal, leading spaces, and
 350         exact symbols.
 351         (comment, parallel): Add global flags in all disassembly.
 352         (fmtconst): Take advantage of new flags, and print default in hex.
 353         (fmtconst_val): Likewise.
 354         (decode_macfunc): Be consistant with spaces, tabs, comments,
 355         capitalization in disassembly, fix minor coding style issues.
 356         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 357         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 358         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 359         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 360         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 361         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 362         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 363         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 364         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 365         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 366         _print_insn_bfin, print_insn_bfin): Likewise.
 367
 368 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 369
 370         * aclocal.m4: Regenerate.
 371         * configure: Likewise.
 372         * Makefile.in: Likewise.
 373
 374 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 375
 376         * Makefile.am: Run "make dep-am".
 377         * Makefile.in: Regenerate.
 378         * configure: Regenerate.
 379
 380 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 381
 382         * ppc-opc.c (powerpc_opcodes): Order and format.
 383
 384 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 385
 386         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 387         * i386-tbl.h: Regenerated.
 388
 389 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 390
 391         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 392         x86-64.
 393         * i386-tbl.h: Regenerated.
 394
 395 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 396
 397         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 398         and Fword for far indirect jmp. Allow Reg16 and Word for near
 399         indirect jmp on x86-64. Disallow Fword for lcall.
 400         * i386-tbl.h: Re-generate.
 401
 402 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 403
 404         * cr16-opc.c  (cr16_num_optab): Defined
 405
 406 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 407
 408         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 409         * i386-init.h: Regenerated.
 410
 411 2008-02-14  Nick Clifton  <nickc@redhat.com>
 412
 413         PR binutils/5524
 414         * configure.in (SHARED_LIBADD): Select the correct host specific
 415         file extension for shared libraries.
 416         * configure: Regenerate.
 417
 418 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 419
 420         * i386-opc.h (RegFlat): New.
 421         * i386-reg.tbl (flat): Add.
 422         * i386-tbl.h: Re-generate.
 423
 424 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 425
 426         * i386-dis.c (a_mode): New.
 427         (cond_jump_mode): Adjust.
 428         (Ma): Change to a_mode.
 429         (intel_operand_size): Handle a_mode.
 430         * i386-opc.tbl: Allow Dword and Qword for bound.
 431         * i386-tbl.h: Re-generate.
 432
 433 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 434
 435         * i386-gen.c (process_i386_registers): Process new fields.
 436         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 437         unsigned char. Add dw2_regnum and Dw2Inval.
 438         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 439         register names.
 440         * i386-tbl.h: Re-generate.
 441
 442 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 443
 444         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 445         * i386-init.h: Updated.
 446
 447 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 448
 449         * i386-gen.c (cpu_flags): Add CpuXsave.
 450
 451         * i386-opc.h (CpuXsave): New.
 452         (CpuLM): Updated.
 453         (i386_cpu_flags): Add cpuxsave.
 454
 455         * i386-dis.c (MOD_0FAE_REG_4): New.
 456         (RM_0F01_REG_2): Likewise.
 457         (MOD_0FAE_REG_5): Updated.
 458         (RM_0F01_REG_3): Likewise.
 459         (reg_table): Use MOD_0FAE_REG_4.
 460         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 461         for xrstor.
 462         (rm_table): Add RM_0F01_REG_2.
 463
 464         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 465         * i386-init.h: Regenerated.
 466         * i386-tbl.h: Likewise.
 467
 468 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 469
 470         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 471         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 472         * i386-tbl.h: Re-generate.
 473
 474 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 475
 476         PR 5715
 477         * configure: Regenerated.
 478
 479 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 480
 481         * mips-dis.c: Update copyright.
 482         (mips_arch_choices): Add Octeon.
 483         * mips-opc.c: Update copyright.
 484         (IOCT): New macro.
 485         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 486
 487 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 488
 489         * ppc-opc.c: Support optional L form mtmsr.
 490
 491 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 492
 493         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 494
 495 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 496
 497         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 498         * i386-init.h: Regenerated.
 499
 500 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 501
 502         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 503         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 504
 505 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 506
 507         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 508         (cpu_flags): Likewise.
 509
 510         * i386-opc.h (CpuMMX2): Removed.
 511         (CpuSSE): Updated.
 512
 513         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 514         * i386-init.h: Regenerated.
 515         * i386-tbl.h: Likewise.
 516
 517 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 518
 519         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 520         CPU_SMX_FLAGS.
 521         * i386-init.h: Regenerated.
 522
 523 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 524
 525         * i386-opc.tbl: Use Qword on movddup.
 526         * i386-tbl.h: Regenerated.
 527
 528 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 529
 530         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 531         * i386-tbl.h: Regenerated.
 532
 533 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 534
 535         * i386-dis.c (Mx): New.
 536         (PREFIX_0FC3): Likewise.
 537         (PREFIX_0FC7_REG_6): Updated.
 538         (dis386_twobyte): Use PREFIX_0FC3.
 539         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 540         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 541         movntss.
 542
 543 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 544
 545         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 546         (operand_types): Add Mem.
 547
 548         * i386-opc.h (IntelSyntax): New.
 549         * i386-opc.h (Mem): New.
 550         (Byte): Updated.
 551         (Opcode_Modifier_Max): Updated.
 552         (i386_opcode_modifier): Add intelsyntax.
 553         (i386_operand_type): Add mem.
 554
 555         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 556         instructions.
 557
 558         * i386-reg.tbl: Add size for accumulator.
 559
 560         * i386-init.h: Regenerated.
 561         * i386-tbl.h: Likewise.
 562
 563 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 564
 565         * i386-opc.h (Byte): Fix a typo.
 566
 567 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 568
 569         PR gas/5534
 570         * i386-gen.c (operand_type_init): Add Dword to
 571         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 572         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 573         Qword and Xmmword.
 574         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 575         Xmmword, Unspecified and Anysize.
 576         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 577         an alias of Xmmword.
 578
 579         * i386-opc.h (CheckSize): Removed.
 580         (Byte): Updated.
 581         (Word): Likewise.
 582         (Dword): Likewise.
 583         (Qword): Likewise.
 584         (Xmmword): Likewise.
 585         (FWait): Updated.
 586         (OTMax): Likewise.
 587         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 588         qword and xmmword.
 589         (Fword): New.
 590         (TBYTE): Likewise.
 591         (Unspecified): Likewise.
 592         (Anysize): Likewise.
 593         (i386_operand_type): Add byte, word, dword, fword, qword,
 594         tbyte xmmword, unspecified and anysize.
 595
 596         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 597         Tbyte, Xmmword, Unspecified and Anysize.
 598
 599         * i386-reg.tbl: Add size for accumulator.
 600
 601         * i386-init.h: Regenerated.
 602         * i386-tbl.h: Likewise.
 603
 604 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 605
 606         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 607         (REG_0F18): Updated.
 608         (reg_table): Updated.
 609         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 610         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 611
 612 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 613
 614         * i386-gen.c (set_bitfield): Use fail () on error.
 615
 616 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 617
 618         * i386-gen.c (lineno): New.
 619         (filename): Likewise.
 620         (set_bitfield): Report filename and line numer on error.
 621         (process_i386_opcodes): Set filename and update lineno.
 622         (process_i386_registers): Likewise.
 623
 624 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 625
 626         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 627         ATTSyntax.
 628
 629         * i386-opc.h (IntelMnemonic): Renamed to ..
 630         (ATTSyntax): This
 631         (Opcode_Modifier_Max): Updated.
 632         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 633         and intelsyntax.
 634
 635         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 636         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 637         * i386-tbl.h: Regenerated.
 638
 639 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 640
 641         * i386-gen.c: Update copyright to 2008.
 642         * i386-opc.h: Likewise.
 643         * i386-opc.tbl: Likewise.
 644
 645         * i386-init.h: Regenerated.
 646         * i386-tbl.h: Likewise.
 647
 648 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 649
 650         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 651         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 652         * i386-tbl.h: Regenerated.
 653
 654 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 655
 656         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 657         CpuSSE4_2_Or_ABM.
 658         (cpu_flags): Likewise.
 659
 660         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 661         (CpuSSE4_2_Or_ABM): Likewise.
 662         (CpuLM): Updated.
 663         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 664
 665         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 666         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 667         and CpuPadLock, respectively.
 668         * i386-init.h: Regenerated.
 669         * i386-tbl.h: Likewise.
 670
 671 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 672
 673         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 674
 675         * i386-opc.h (No_xSuf): Removed.
 676         (CheckSize): Updated.
 677
 678         * i386-tbl.h: Regenerated.
 679
 680 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 681
 682         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 683         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 684         CPU_SSE5_FLAGS.
 685         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 686
 687         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 688         (CpuLM): Updated.
 689         (i386_cpu_flags): Add cpusse4_2_or_abm.
 690
 691         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 692         CpuABM|CpuSSE4_2 on popcnt.
 693         * i386-init.h: Regenerated.
 694         * i386-tbl.h: Likewise.
 695
 696 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 697
 698         * i386-opc.h: Update comments.
 699
 700 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 701
 702         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 703         * i386-opc.h: Likewise.
 704         * i386-opc.tbl: Likewise.
 705
 706 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 707
 708         PR gas/5534
 709         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 710         Byte, Word, Dword, QWord and Xmmword.
 711
 712         * i386-opc.h (No_xSuf): New.
 713         (CheckSize): Likewise.
 714         (Byte): Likewise.
 715         (Word): Likewise.
 716         (Dword): Likewise.
 717         (QWord): Likewise.
 718         (Xmmword): Likewise.
 719         (FWait): Updated.
 720         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 721         Dword, QWord and Xmmword.
 722
 723         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 724         used.
 725         * i386-tbl.h: Regenerated.
 726
 727 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 728
 729         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 730         From Miod Vallat.
 731
 732 For older changes see ChangeLog-2007
 733 \f
 734 Local Variables:
 735 mode: change-log
 736 left-margin: 8
 737 fill-column: 74
 738 version-control: never
 739 End: