opcodes/
[binutils-gdb.git] / opcodes / ChangeLog
1 2008-02-21 Jan Beulich <jbeulich@novell.com>
2
3 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
4 and Fword for far indirect jmp. Allow Reg16 and Word for near
5 indirect jmp on x86-64. Disallow Fword for lcall.
6 * i386-tbl.h: Re-generate.
7
8 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
9
10 * cr16-opc.c (cr16_num_optab): Defined
11
12 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
13
14 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
15 * i386-init.h: Regenerated.
16
17 2008-02-14 Nick Clifton <nickc@redhat.com>
18
19 PR binutils/5524
20 * configure.in (SHARED_LIBADD): Select the correct host specific
21 file extension for shared libraries.
22 * configure: Regenerate.
23
24 2008-02-13 Jan Beulich <jbeulich@novell.com>
25
26 * i386-opc.h (RegFlat): New.
27 * i386-reg.tbl (flat): Add.
28 * i386-tbl.h: Re-generate.
29
30 2008-02-13 Jan Beulich <jbeulich@novell.com>
31
32 * i386-dis.c (a_mode): New.
33 (cond_jump_mode): Adjust.
34 (Ma): Change to a_mode.
35 (intel_operand_size): Handle a_mode.
36 * i386-opc.tbl: Allow Dword and Qword for bound.
37 * i386-tbl.h: Re-generate.
38
39 2008-02-13 Jan Beulich <jbeulich@novell.com>
40
41 * i386-gen.c (process_i386_registers): Process new fields.
42 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
43 unsigned char. Add dw2_regnum and Dw2Inval.
44 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
45 register names.
46 * i386-tbl.h: Re-generate.
47
48 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
49
50 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
51 * i386-init.h: Updated.
52
53 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
54
55 * i386-gen.c (cpu_flags): Add CpuXsave.
56
57 * i386-opc.h (CpuXsave): New.
58 (CpuLM): Updated.
59 (i386_cpu_flags): Add cpuxsave.
60
61 * i386-dis.c (MOD_0FAE_REG_4): New.
62 (RM_0F01_REG_2): Likewise.
63 (MOD_0FAE_REG_5): Updated.
64 (RM_0F01_REG_3): Likewise.
65 (reg_table): Use MOD_0FAE_REG_4.
66 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
67 for xrstor.
68 (rm_table): Add RM_0F01_REG_2.
69
70 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
71 * i386-init.h: Regenerated.
72 * i386-tbl.h: Likewise.
73
74 2008-02-11 Jan Beulich <jbeulich@novell.com>
75
76 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
77 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
78 * i386-tbl.h: Re-generate.
79
80 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
81
82 PR 5715
83 * configure: Regenerated.
84
85 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
86
87 * mips-dis.c: Update copyright.
88 (mips_arch_choices): Add Octeon.
89 * mips-opc.c: Update copyright.
90 (IOCT): New macro.
91 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
92
93 2008-01-29 Alan Modra <amodra@bigpond.net.au>
94
95 * ppc-opc.c: Support optional L form mtmsr.
96
97 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
98
99 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
100
101 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
102
103 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
104 * i386-init.h: Regenerated.
105
106 2008-01-23 Tristan Gingold <gingold@adacore.com>
107
108 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
109 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
110
111 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
112
113 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
114 (cpu_flags): Likewise.
115
116 * i386-opc.h (CpuMMX2): Removed.
117 (CpuSSE): Updated.
118
119 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
120 * i386-init.h: Regenerated.
121 * i386-tbl.h: Likewise.
122
123 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
124
125 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
126 CPU_SMX_FLAGS.
127 * i386-init.h: Regenerated.
128
129 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
130
131 * i386-opc.tbl: Use Qword on movddup.
132 * i386-tbl.h: Regenerated.
133
134 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
135
136 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
137 * i386-tbl.h: Regenerated.
138
139 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
140
141 * i386-dis.c (Mx): New.
142 (PREFIX_0FC3): Likewise.
143 (PREFIX_0FC7_REG_6): Updated.
144 (dis386_twobyte): Use PREFIX_0FC3.
145 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
146 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
147 movntss.
148
149 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
150
151 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
152 (operand_types): Add Mem.
153
154 * i386-opc.h (IntelSyntax): New.
155 * i386-opc.h (Mem): New.
156 (Byte): Updated.
157 (Opcode_Modifier_Max): Updated.
158 (i386_opcode_modifier): Add intelsyntax.
159 (i386_operand_type): Add mem.
160
161 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
162 instructions.
163
164 * i386-reg.tbl: Add size for accumulator.
165
166 * i386-init.h: Regenerated.
167 * i386-tbl.h: Likewise.
168
169 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
170
171 * i386-opc.h (Byte): Fix a typo.
172
173 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
174
175 PR gas/5534
176 * i386-gen.c (operand_type_init): Add Dword to
177 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
178 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
179 Qword and Xmmword.
180 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
181 Xmmword, Unspecified and Anysize.
182 (set_bitfield): Make Mmword an alias of Qword. Make Oword
183 an alias of Xmmword.
184
185 * i386-opc.h (CheckSize): Removed.
186 (Byte): Updated.
187 (Word): Likewise.
188 (Dword): Likewise.
189 (Qword): Likewise.
190 (Xmmword): Likewise.
191 (FWait): Updated.
192 (OTMax): Likewise.
193 (i386_opcode_modifier): Remove checksize, byte, word, dword,
194 qword and xmmword.
195 (Fword): New.
196 (TBYTE): Likewise.
197 (Unspecified): Likewise.
198 (Anysize): Likewise.
199 (i386_operand_type): Add byte, word, dword, fword, qword,
200 tbyte xmmword, unspecified and anysize.
201
202 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
203 Tbyte, Xmmword, Unspecified and Anysize.
204
205 * i386-reg.tbl: Add size for accumulator.
206
207 * i386-init.h: Regenerated.
208 * i386-tbl.h: Likewise.
209
210 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
211
212 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
213 (REG_0F18): Updated.
214 (reg_table): Updated.
215 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
216 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
217
218 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
219
220 * i386-gen.c (set_bitfield): Use fail () on error.
221
222 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
223
224 * i386-gen.c (lineno): New.
225 (filename): Likewise.
226 (set_bitfield): Report filename and line numer on error.
227 (process_i386_opcodes): Set filename and update lineno.
228 (process_i386_registers): Likewise.
229
230 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
231
232 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
233 ATTSyntax.
234
235 * i386-opc.h (IntelMnemonic): Renamed to ..
236 (ATTSyntax): This
237 (Opcode_Modifier_Max): Updated.
238 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
239 and intelsyntax.
240
241 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
242 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
243 * i386-tbl.h: Regenerated.
244
245 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
246
247 * i386-gen.c: Update copyright to 2008.
248 * i386-opc.h: Likewise.
249 * i386-opc.tbl: Likewise.
250
251 * i386-init.h: Regenerated.
252 * i386-tbl.h: Likewise.
253
254 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
255
256 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
257 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
258 * i386-tbl.h: Regenerated.
259
260 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
261
262 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
263 CpuSSE4_2_Or_ABM.
264 (cpu_flags): Likewise.
265
266 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
267 (CpuSSE4_2_Or_ABM): Likewise.
268 (CpuLM): Updated.
269 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
270
271 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
272 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
273 and CpuPadLock, respectively.
274 * i386-init.h: Regenerated.
275 * i386-tbl.h: Likewise.
276
277 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
278
279 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
280
281 * i386-opc.h (No_xSuf): Removed.
282 (CheckSize): Updated.
283
284 * i386-tbl.h: Regenerated.
285
286 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
287
288 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
289 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
290 CPU_SSE5_FLAGS.
291 (cpu_flags): Add CpuSSE4_2_Or_ABM.
292
293 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
294 (CpuLM): Updated.
295 (i386_cpu_flags): Add cpusse4_2_or_abm.
296
297 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
298 CpuABM|CpuSSE4_2 on popcnt.
299 * i386-init.h: Regenerated.
300 * i386-tbl.h: Likewise.
301
302 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
303
304 * i386-opc.h: Update comments.
305
306 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
307
308 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
309 * i386-opc.h: Likewise.
310 * i386-opc.tbl: Likewise.
311
312 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
313
314 PR gas/5534
315 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
316 Byte, Word, Dword, QWord and Xmmword.
317
318 * i386-opc.h (No_xSuf): New.
319 (CheckSize): Likewise.
320 (Byte): Likewise.
321 (Word): Likewise.
322 (Dword): Likewise.
323 (QWord): Likewise.
324 (Xmmword): Likewise.
325 (FWait): Updated.
326 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
327 Dword, QWord and Xmmword.
328
329 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
330 used.
331 * i386-tbl.h: Regenerated.
332
333 2008-01-02 Mark Kettenis <kettenis@gnu.org>
334
335 * m88k-dis.c (instructions): Fix fcvt.* instructions.
336 From Miod Vallat.
337
338 For older changes see ChangeLog-2007
339 \f
340 Local Variables:
341 mode: change-log
342 left-margin: 8
343 fill-column: 74
344 version-control: never
345 End: