* cr16.h (cr16_num_optab): Declared.
[binutils-gdb.git] / opcodes / ChangeLog
1 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
2
3 * cr16-opc.c (cr16_num_optab): Defined
4
5 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
8 * i386-init.h: Regenerated.
9
10 2008-02-14 Nick Clifton <nickc@redhat.com>
11
12 PR binutils/5524
13 * configure.in (SHARED_LIBADD): Select the correct host specific
14 file extension for shared libraries.
15 * configure: Regenerate.
16
17 2008-02-13 Jan Beulich <jbeulich@novell.com>
18
19 * i386-opc.h (RegFlat): New.
20 * i386-reg.tbl (flat): Add.
21 * i386-tbl.h: Re-generate.
22
23 2008-02-13 Jan Beulich <jbeulich@novell.com>
24
25 * i386-dis.c (a_mode): New.
26 (cond_jump_mode): Adjust.
27 (Ma): Change to a_mode.
28 (intel_operand_size): Handle a_mode.
29 * i386-opc.tbl: Allow Dword and Qword for bound.
30 * i386-tbl.h: Re-generate.
31
32 2008-02-13 Jan Beulich <jbeulich@novell.com>
33
34 * i386-gen.c (process_i386_registers): Process new fields.
35 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
36 unsigned char. Add dw2_regnum and Dw2Inval.
37 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
38 register names.
39 * i386-tbl.h: Re-generate.
40
41 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
42
43 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
44 * i386-init.h: Updated.
45
46 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
47
48 * i386-gen.c (cpu_flags): Add CpuXsave.
49
50 * i386-opc.h (CpuXsave): New.
51 (CpuLM): Updated.
52 (i386_cpu_flags): Add cpuxsave.
53
54 * i386-dis.c (MOD_0FAE_REG_4): New.
55 (RM_0F01_REG_2): Likewise.
56 (MOD_0FAE_REG_5): Updated.
57 (RM_0F01_REG_3): Likewise.
58 (reg_table): Use MOD_0FAE_REG_4.
59 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
60 for xrstor.
61 (rm_table): Add RM_0F01_REG_2.
62
63 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
64 * i386-init.h: Regenerated.
65 * i386-tbl.h: Likewise.
66
67 2008-02-11 Jan Beulich <jbeulich@novell.com>
68
69 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
70 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
71 * i386-tbl.h: Re-generate.
72
73 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
74
75 PR 5715
76 * configure: Regenerated.
77
78 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
79
80 * mips-dis.c: Update copyright.
81 (mips_arch_choices): Add Octeon.
82 * mips-opc.c: Update copyright.
83 (IOCT): New macro.
84 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
85
86 2008-01-29 Alan Modra <amodra@bigpond.net.au>
87
88 * ppc-opc.c: Support optional L form mtmsr.
89
90 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
91
92 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
93
94 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
95
96 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
97 * i386-init.h: Regenerated.
98
99 2008-01-23 Tristan Gingold <gingold@adacore.com>
100
101 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
102 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
103
104 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
105
106 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
107 (cpu_flags): Likewise.
108
109 * i386-opc.h (CpuMMX2): Removed.
110 (CpuSSE): Updated.
111
112 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
113 * i386-init.h: Regenerated.
114 * i386-tbl.h: Likewise.
115
116 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
117
118 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
119 CPU_SMX_FLAGS.
120 * i386-init.h: Regenerated.
121
122 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
123
124 * i386-opc.tbl: Use Qword on movddup.
125 * i386-tbl.h: Regenerated.
126
127 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
128
129 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
130 * i386-tbl.h: Regenerated.
131
132 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
133
134 * i386-dis.c (Mx): New.
135 (PREFIX_0FC3): Likewise.
136 (PREFIX_0FC7_REG_6): Updated.
137 (dis386_twobyte): Use PREFIX_0FC3.
138 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
139 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
140 movntss.
141
142 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
143
144 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
145 (operand_types): Add Mem.
146
147 * i386-opc.h (IntelSyntax): New.
148 * i386-opc.h (Mem): New.
149 (Byte): Updated.
150 (Opcode_Modifier_Max): Updated.
151 (i386_opcode_modifier): Add intelsyntax.
152 (i386_operand_type): Add mem.
153
154 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
155 instructions.
156
157 * i386-reg.tbl: Add size for accumulator.
158
159 * i386-init.h: Regenerated.
160 * i386-tbl.h: Likewise.
161
162 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
163
164 * i386-opc.h (Byte): Fix a typo.
165
166 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
167
168 PR gas/5534
169 * i386-gen.c (operand_type_init): Add Dword to
170 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
171 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
172 Qword and Xmmword.
173 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
174 Xmmword, Unspecified and Anysize.
175 (set_bitfield): Make Mmword an alias of Qword. Make Oword
176 an alias of Xmmword.
177
178 * i386-opc.h (CheckSize): Removed.
179 (Byte): Updated.
180 (Word): Likewise.
181 (Dword): Likewise.
182 (Qword): Likewise.
183 (Xmmword): Likewise.
184 (FWait): Updated.
185 (OTMax): Likewise.
186 (i386_opcode_modifier): Remove checksize, byte, word, dword,
187 qword and xmmword.
188 (Fword): New.
189 (TBYTE): Likewise.
190 (Unspecified): Likewise.
191 (Anysize): Likewise.
192 (i386_operand_type): Add byte, word, dword, fword, qword,
193 tbyte xmmword, unspecified and anysize.
194
195 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
196 Tbyte, Xmmword, Unspecified and Anysize.
197
198 * i386-reg.tbl: Add size for accumulator.
199
200 * i386-init.h: Regenerated.
201 * i386-tbl.h: Likewise.
202
203 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
204
205 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
206 (REG_0F18): Updated.
207 (reg_table): Updated.
208 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
209 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
210
211 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
212
213 * i386-gen.c (set_bitfield): Use fail () on error.
214
215 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
216
217 * i386-gen.c (lineno): New.
218 (filename): Likewise.
219 (set_bitfield): Report filename and line numer on error.
220 (process_i386_opcodes): Set filename and update lineno.
221 (process_i386_registers): Likewise.
222
223 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
224
225 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
226 ATTSyntax.
227
228 * i386-opc.h (IntelMnemonic): Renamed to ..
229 (ATTSyntax): This
230 (Opcode_Modifier_Max): Updated.
231 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
232 and intelsyntax.
233
234 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
235 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
236 * i386-tbl.h: Regenerated.
237
238 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
239
240 * i386-gen.c: Update copyright to 2008.
241 * i386-opc.h: Likewise.
242 * i386-opc.tbl: Likewise.
243
244 * i386-init.h: Regenerated.
245 * i386-tbl.h: Likewise.
246
247 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
248
249 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
250 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
251 * i386-tbl.h: Regenerated.
252
253 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
254
255 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
256 CpuSSE4_2_Or_ABM.
257 (cpu_flags): Likewise.
258
259 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
260 (CpuSSE4_2_Or_ABM): Likewise.
261 (CpuLM): Updated.
262 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
263
264 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
265 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
266 and CpuPadLock, respectively.
267 * i386-init.h: Regenerated.
268 * i386-tbl.h: Likewise.
269
270 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
271
272 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
273
274 * i386-opc.h (No_xSuf): Removed.
275 (CheckSize): Updated.
276
277 * i386-tbl.h: Regenerated.
278
279 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
280
281 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
282 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
283 CPU_SSE5_FLAGS.
284 (cpu_flags): Add CpuSSE4_2_Or_ABM.
285
286 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
287 (CpuLM): Updated.
288 (i386_cpu_flags): Add cpusse4_2_or_abm.
289
290 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
291 CpuABM|CpuSSE4_2 on popcnt.
292 * i386-init.h: Regenerated.
293 * i386-tbl.h: Likewise.
294
295 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
296
297 * i386-opc.h: Update comments.
298
299 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
300
301 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
302 * i386-opc.h: Likewise.
303 * i386-opc.tbl: Likewise.
304
305 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
306
307 PR gas/5534
308 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
309 Byte, Word, Dword, QWord and Xmmword.
310
311 * i386-opc.h (No_xSuf): New.
312 (CheckSize): Likewise.
313 (Byte): Likewise.
314 (Word): Likewise.
315 (Dword): Likewise.
316 (QWord): Likewise.
317 (Xmmword): Likewise.
318 (FWait): Updated.
319 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
320 Dword, QWord and Xmmword.
321
322 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
323 used.
324 * i386-tbl.h: Regenerated.
325
326 2008-01-02 Mark Kettenis <kettenis@gnu.org>
327
328 * m88k-dis.c (instructions): Fix fcvt.* instructions.
329 From Miod Vallat.
330
331 For older changes see ChangeLog-2007
332 \f
333 Local Variables:
334 mode: change-log
335 left-margin: 8
336 fill-column: 74
337 version-control: never
338 End: