1 2008-12-15 Richard Earnshaw <rearnsha@arm.com>
3 * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
6 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
8 * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
10 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
12 * i386-dis.c (putop): Remove strayed comments.
14 2008-12-04 Ben Elliston <bje@au.ibm.com>
16 * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
18 (print_ppc_disassembler_options): Update usage.
19 * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
21 (PPCCHLK64): Likewise.
22 (powerpc_opcodes): Remove all BOOKE64 instructions.
24 2008-11-28 Joshua Kinard <kumba@gentoo.org>
26 * mips-dis.c (mips_arch_choices): Add r14000, r16000.
28 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
30 * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
31 adjusted the mask for 32-bit branch instruction.
33 2008-11-27 Alan Modra <amodra@bigpond.net.au>
35 * ppc-opc.c (extract_sprg): Correct operand range check.
37 2008-11-26 Andreas Schwab <schwab@suse.de>
39 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
40 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
41 (save_printer, save_print_address): Remove.
42 (fetch_data): Don't use them.
43 (match_insn_m68k): Always restore printing functions.
44 (print_insn_m68k): Don't save/restore printing functions.
46 2008-11-25 Nick Clifton <nickc@redhat.com>
48 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
50 2008-11-18 Catherine Moore <clm@codesourcery.com>
52 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
54 (neon_opcodes): Likewise.
55 (print_insn_coprocessor): Print 't' or 'b' for vcvt
58 2008-11-14 Tristan Gingold <gingold@adacore.com>
60 * makefile.vms (OBJS): Update list of objects.
64 2008-11-06 Chao-ying Fu <fu@mips.com>
66 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
68 (sync): New instruction with 5-bit sync type.
69 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
71 2008-11-06 Nick Clifton <nickc@redhat.com>
73 * avr-dis.c: Replace uses of sprintf without a format string with
76 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
78 * i386-opc.tbl: Add cmovpe and cmovpo.
79 * i386-tbl.h: Regenerated.
81 2008-10-22 Nick Clifton <nickc@redhat.com>
84 * configure.in (SHARED_LIBADD): Revert previous change.
85 Add a comment explaining why.
86 (SHARED_DEPENDENCIES): Revert previous change.
87 * configure: Regenerate.
89 2008-10-10 Nick Clifton <nickc@redhat.com>
92 * configure.in (SHARED_LIBADD): Add libiberty.a.
93 (SHARED_DEPENDENCIES): Add libiberty.a.
95 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
97 * i386-gen.c: Include "hashtab.h".
98 (next_field): Take a new argument, last. Check last.
99 (process_i386_cpu_flag): Updated.
100 (process_i386_opcode_modifier): Likewise.
101 (process_i386_operand_type): Likewise.
102 (process_i386_registers): Likewise.
103 (output_i386_opcode): New.
104 (opcode_hash_entry): Likewise.
105 (opcode_hash_table): Likewise.
106 (opcode_hash_hash): Likewise.
107 (opcode_hash_eq): Likewise.
108 (process_i386_opcodes): Use opcode hash table and opcode array.
110 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
112 * s390-opc.txt (stdy, stey): Fix description
114 2008-09-30 Alan Modra <amodra@bigpond.net.au>
116 * Makefile.am: Run "make dep-am".
117 * Makefile.in: Regenerate.
119 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
121 * aclocal.m4: Regenerated.
122 * configure: Likewise.
123 * Makefile.in: Likewise.
125 2008-09-29 Nick Clifton <nickc@redhat.com>
127 * po/vi.po: Updated Vietnamese translation.
128 * po/fr.po: Updated French translation.
130 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
132 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
133 (cfxr, cfdr, cfer, clclu): Add esa flag.
134 (sqd): Instruction added.
135 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
136 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
138 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
140 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
141 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
143 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
145 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
146 * i386-tbl.h: Regenerated.
148 2008-08-28 Jan Beulich <jbeulich@novell.com>
150 * i386-dis.c (dis386): Adjust far return mnemonics.
151 * i386-opc.tbl: Add retf.
152 * i386-tbl.h: Re-generate.
154 2008-08-28 Jan Beulich <jbeulich@novell.com>
156 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
158 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
160 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
161 * ia64-gen.c (lookup_specifier): Likewise.
163 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
164 * ia64-raw.tbl: Likewise.
165 * ia64-waw.tbl: Likewise.
166 * ia64-asmtab.c: Regenerated.
168 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
170 * i386-opc.tbl: Correct fidivr operand size.
172 * i386-tbl.h: Regenerated.
174 2008-08-24 Alan Modra <amodra@bigpond.net.au>
176 * configure.in: Update a number of obsolete autoconf macros.
177 * aclocal.m4: Regenerate.
179 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
181 AVX Programming Reference (August, 2008)
182 * i386-dis.c (PREFIX_VEX_38DB): New.
183 (PREFIX_VEX_38DC): Likewise.
184 (PREFIX_VEX_38DD): Likewise.
185 (PREFIX_VEX_38DE): Likewise.
186 (PREFIX_VEX_38DF): Likewise.
187 (PREFIX_VEX_3ADF): Likewise.
188 (VEX_LEN_38DB_P_2): Likewise.
189 (VEX_LEN_38DC_P_2): Likewise.
190 (VEX_LEN_38DD_P_2): Likewise.
191 (VEX_LEN_38DE_P_2): Likewise.
192 (VEX_LEN_38DF_P_2): Likewise.
193 (VEX_LEN_3ADF_P_2): Likewise.
194 (PREFIX_VEX_3A04): Updated.
195 (VEX_LEN_3A06_P_2): Likewise.
196 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
197 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
198 (x86_64_table): Likewise.
199 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
200 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
203 * i386-opc.tbl: Add AES + AVX instructions.
204 * i386-init.h: Regenerated.
205 * i386-tbl.h: Likewise.
207 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
209 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
210 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
212 2008-08-15 Alan Modra <amodra@bigpond.net.au>
215 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
216 * Makefile.in: Regenerate.
217 * aclocal.m4: Regenerate.
218 * config.in: Regenerate.
219 * configure: Regenerate.
221 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
224 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
226 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
228 * i386-opc.tbl: Add syscall and sysret for Cpu64.
230 * i386-tbl.h: Regenerated.
232 2008-08-04 Alan Modra <amodra@bigpond.net.au>
234 * Makefile.am (POTFILES.in): Set LC_ALL=C.
235 * Makefile.in: Regenerate.
236 * po/POTFILES.in: Regenerate.
238 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
240 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
241 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
242 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
243 * ppc-opc.c (insert_xt6): New static function.
244 (extract_xt6): Likewise.
245 (insert_xa6): Likewise.
246 (extract_xa6: Likewise.
247 (insert_xb6): Likewise.
248 (extract_xb6): Likewise.
249 (insert_xb6s): Likewise.
250 (extract_xb6s): Likewise.
251 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
252 XX3DM_MASK, PPCVSX): New.
253 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
254 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
256 2008-08-01 Pedro Alves <pedro@codesourcery.com>
258 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
259 * Makefile.in: Regenerate.
261 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
263 * i386-reg.tbl: Use Dw2Inval on AVX registers.
264 * i386-tbl.h: Regenerated.
266 2008-07-30 Michael J. Eager <eager@eagercon.com>
268 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
269 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
270 (insert_sprg, PPC405): Use PPC_OPCODE_405.
271 (powerpc_opcodes): Add Xilinx APU related opcodes.
273 2008-07-30 Alan Modra <amodra@bigpond.net.au>
275 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
277 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
279 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
281 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
283 * mips-opc.c (CP): New macro.
284 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
285 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
286 dmtc2 Octeon instructions.
288 2008-07-07 Stan Shebs <stan@codesourcery.com>
290 * dis-init.c (init_disassemble_info): Init endian_code field.
291 * arm-dis.c (print_insn): Disassemble code according to
292 setting of endian_code.
293 (print_insn_big_arm): Detect when BE8 extension flag has been set.
295 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
297 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
300 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
302 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
303 (print_ppc_disassembler_options): Likewise.
304 * ppc-opc.c (PPC464): Define.
305 (powerpc_opcodes): Add mfdcrux and mtdcrux.
307 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
309 * configure: Regenerate.
311 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
313 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
315 (struct dis_private): New.
316 (POWERPC_DIALECT): New define.
317 (powerpc_dialect): Renamed to...
318 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
320 (print_insn_big_powerpc): Update for using structure in
322 (print_insn_little_powerpc): Likewise.
323 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
324 (skip_optional_operands): Likewise.
325 (print_insn_powerpc): Likewise. Remove initialization of dialect.
326 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
327 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
328 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
329 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
330 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
331 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
332 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
333 param to be of type ppc_cpu_t. Update prototype.
335 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
337 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
339 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
340 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
341 syncw, syncws, vm3mulu, vm0 and vmulu.
343 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
344 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
347 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
349 * i386-opc.tbl: Add vmovd with 64bit operand.
350 * i386-tbl.h: Regenerated.
352 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
354 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
356 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
358 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
359 * i386-tbl.h: Regenerated.
361 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
364 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
365 into 32bit and 64bit. Remove Reg64|Qword and add
366 IgnoreSize|No_qSuf on 32bit version.
367 * i386-tbl.h: Regenerated.
369 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
371 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
372 * i386-tbl.h: Regenerated.
374 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
376 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
378 2008-05-14 Alan Modra <amodra@bigpond.net.au>
380 * Makefile.am: Run "make dep-am".
381 * Makefile.in: Regenerate.
383 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
385 * i386-dis.c (MOVBE_Fixup): New.
387 (PREFIX_0F3880): Likewise.
388 (PREFIX_0F3881): Likewise.
389 (PREFIX_0F38F0): Updated.
390 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
391 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
392 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
394 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
396 (cpu_flags): Add CpuMovbe and CpuEPT.
398 * i386-opc.h (CpuMovbe): New.
401 (i386_cpu_flags): Add cpumovbe and cpuept.
403 * i386-opc.tbl: Add entries for movbe and EPT instructions.
404 * i386-init.h: Regenerated.
405 * i386-tbl.h: Likewise.
407 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
409 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
410 the two drem and the two dremu macros.
412 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
414 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
415 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
416 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
417 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
419 2008-04-25 David S. Miller <davem@davemloft.net>
421 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
422 instead of %sys_tick_cmpr, as suggested in architecture manuals.
424 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
426 * aclocal.m4: Regenerate.
427 * configure: Regenerate.
429 2008-04-23 David S. Miller <davem@davemloft.net>
431 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
433 (prefetch_table): Add missing values.
435 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
437 * i386-gen.c (opcode_modifiers): Add NoAVX.
439 * i386-opc.h (NoAVX): New.
441 (i386_opcode_modifier): Add noavx.
443 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
444 instructions which don't have AVX equivalent.
445 * i386-tbl.h: Regenerated.
447 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
449 * i386-dis.c (OP_VEX_FMA): New.
450 (OP_EX_VexImmW): Likewise.
452 (Vex128FMA): Likewise.
453 (EXVexImmW): Likewise.
454 (get_vex_imm8): Likewise.
455 (OP_EX_VexReg): Likewise.
456 (vex_i4_done): Renamed to ...
458 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
459 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
461 (print_insn): Updated.
462 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
463 (OP_REG_VexI4): Check invalid high registers.
465 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
466 Michael Meissner <michael.meissner@amd.com>
468 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
469 * i386-tbl.h: Regenerate from i386-opc.tbl.
471 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
473 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
474 accept Power E500MC instructions.
475 (print_ppc_disassembler_options): Document -Me500mc.
476 * ppc-opc.c (DUIS, DUI, T): New.
477 (XRT, XRTRA): Likewise.
479 (powerpc_opcodes): Add new Power E500MC instructions.
481 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
483 * s390-dis.c (init_disasm): Evaluate disassembler_options.
484 (print_s390_disassembler_options): New function.
485 * disassemble.c (disassembler_usage): Invoke
486 print_s390_disassembler_options.
488 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
490 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
491 of local variables used for mnemonic parsing: prefix, suffix and
494 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
496 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
497 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
498 (s390_crb_extensions): New extensions table.
499 (insertExpandedMnemonic): Handle '$' tag.
500 * s390-opc.txt: Remove conditional jump variants which can now
501 be expanded automatically.
502 Replace '*' tag with '$' in the compare and branch instructions.
504 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
506 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
507 (PREFIX_VEX_3AXX): Likewis.
509 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
511 * i386-opc.tbl: Remove 4 extra blank lines.
513 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
515 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
516 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
517 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
518 * i386-opc.tbl: Likewise.
520 * i386-opc.h (CpuCLMUL): Renamed to ...
523 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
525 * i386-init.h: Regenerated.
527 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
529 * i386-dis.c (OP_E_register): New.
530 (OP_E_memory): Likewise.
532 (OP_EX_Vex): Likewise.
533 (OP_EX_VexW): Likewise.
534 (OP_XMM_Vex): Likewise.
535 (OP_XMM_VexW): Likewise.
536 (OP_REG_VexI4): Likewise.
537 (PCLMUL_Fixup): Likewise.
538 (VEXI4_Fixup): Likewise.
539 (VZERO_Fixup): Likewise.
540 (VCMP_Fixup): Likewise.
541 (VPERMIL2_Fixup): Likewise.
542 (rex_original): Likewise.
543 (rex_ignored): Likewise.
564 (VPERMIL2): Likewise.
565 (xmm_mode): Likewise.
566 (xmmq_mode): Likewise.
567 (ymmq_mode): Likewise.
568 (vex_mode): Likewise.
569 (vex128_mode): Likewise.
570 (vex256_mode): Likewise.
571 (USE_VEX_C4_TABLE): Likewise.
572 (USE_VEX_C5_TABLE): Likewise.
573 (USE_VEX_LEN_TABLE): Likewise.
574 (VEX_C4_TABLE): Likewise.
575 (VEX_C5_TABLE): Likewise.
576 (VEX_LEN_TABLE): Likewise.
577 (REG_VEX_XX): Likewise.
578 (MOD_VEX_XXX): Likewise.
579 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
580 (PREFIX_0F3A44): Likewise.
581 (PREFIX_0F3ADF): Likewise.
582 (PREFIX_VEX_XXX): Likewise.
584 (VEX_OF38): Likewise.
585 (VEX_OF3A): Likewise.
586 (VEX_LEN_XXX): Likewise.
588 (need_vex): Likewise.
589 (need_vex_reg): Likewise.
590 (vex_i4_done): Likewise.
591 (vex_table): Likewise.
592 (vex_len_table): Likewise.
593 (OP_REG_VexI4): Likewise.
594 (vex_cmp_op): Likewise.
595 (pclmul_op): Likewise.
596 (vpermil2_op): Likewise.
599 (PREFIX_0F38F0): Likewise.
600 (PREFIX_0F3A60): Likewise.
601 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
602 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
603 and PREFIX_VEX_XXX entries.
604 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
605 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
607 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
608 Add MOD_VEX_XXX entries.
609 (ckprefix): Initialize rex_original and rex_ignored. Store the
610 REX byte in rex_original.
611 (get_valid_dis386): Handle the implicit prefix in VEX prefix
612 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
613 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
614 calling get_valid_dis386. Use rex_original and rex_ignored when
616 (putop): Handle "XY".
617 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
619 (OP_E_extended): Updated to use OP_E_register and
621 (OP_XMM): Handle VEX.
623 (XMM_Fixup): Likewise.
624 (CMP_Fixup): Use ARRAY_SIZE.
626 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
627 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
628 (operand_type_init): Add OPERAND_TYPE_REGYMM and
629 OPERAND_TYPE_VEX_IMM4.
630 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
631 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
632 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
633 VexImmExt and SSE2AVX.
634 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
636 * i386-opc.h (CpuAVX): New.
638 (CpuCLMUL): Likewise.
649 (Vex3Sources): Likewise.
650 (VexImmExt): Likewise.
654 (Vex_Imm4): Likewise.
655 (Implicit1stXmm0): Likewise.
658 (ByteOkIntel): Likewise.
661 (Unspecified): Likewise.
663 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
664 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
665 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
666 vex3sources, veximmext and sse2avx.
667 (i386_operand_type): Add regymm, ymmword and vex_imm4.
669 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
671 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
673 * i386-init.h: Regenerated.
674 * i386-tbl.h: Likewise.
676 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
678 From Robin Getz <robin.getz@analog.com>
679 * bfin-dis.c (bu32): Typedef.
680 (enum const_forms_t): Add c_uimm32 and c_huimm32.
681 (constant_formats[]): Add uimm32 and huimm16.
686 (luimm16_val): Define.
687 (struct saved_state): Define.
688 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
689 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
690 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
692 (decode_LDIMMhalf_0): Print out the whole register value.
694 From Jie Zhang <jie.zhang@analog.com>
695 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
696 multiply and multiply-accumulate to data register instruction.
698 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
699 c_imm32, c_huimm32e): Define.
700 (constant_formats): Add flags for printing decimal, leading spaces, and
702 (comment, parallel): Add global flags in all disassembly.
703 (fmtconst): Take advantage of new flags, and print default in hex.
704 (fmtconst_val): Likewise.
705 (decode_macfunc): Be consistant with spaces, tabs, comments,
706 capitalization in disassembly, fix minor coding style issues.
707 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
708 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
709 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
710 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
711 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
712 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
713 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
714 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
715 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
716 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
717 _print_insn_bfin, print_insn_bfin): Likewise.
719 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
721 * aclocal.m4: Regenerate.
722 * configure: Likewise.
723 * Makefile.in: Likewise.
725 2008-03-13 Alan Modra <amodra@bigpond.net.au>
727 * Makefile.am: Run "make dep-am".
728 * Makefile.in: Regenerate.
729 * configure: Regenerate.
731 2008-03-07 Alan Modra <amodra@bigpond.net.au>
733 * ppc-opc.c (powerpc_opcodes): Order and format.
735 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
737 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
738 * i386-tbl.h: Regenerated.
740 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
742 * i386-opc.tbl: Disallow 16-bit near indirect branches for
744 * i386-tbl.h: Regenerated.
746 2008-02-21 Jan Beulich <jbeulich@novell.com>
748 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
749 and Fword for far indirect jmp. Allow Reg16 and Word for near
750 indirect jmp on x86-64. Disallow Fword for lcall.
751 * i386-tbl.h: Re-generate.
753 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
755 * cr16-opc.c (cr16_num_optab): Defined
757 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
759 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
760 * i386-init.h: Regenerated.
762 2008-02-14 Nick Clifton <nickc@redhat.com>
765 * configure.in (SHARED_LIBADD): Select the correct host specific
766 file extension for shared libraries.
767 * configure: Regenerate.
769 2008-02-13 Jan Beulich <jbeulich@novell.com>
771 * i386-opc.h (RegFlat): New.
772 * i386-reg.tbl (flat): Add.
773 * i386-tbl.h: Re-generate.
775 2008-02-13 Jan Beulich <jbeulich@novell.com>
777 * i386-dis.c (a_mode): New.
778 (cond_jump_mode): Adjust.
779 (Ma): Change to a_mode.
780 (intel_operand_size): Handle a_mode.
781 * i386-opc.tbl: Allow Dword and Qword for bound.
782 * i386-tbl.h: Re-generate.
784 2008-02-13 Jan Beulich <jbeulich@novell.com>
786 * i386-gen.c (process_i386_registers): Process new fields.
787 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
788 unsigned char. Add dw2_regnum and Dw2Inval.
789 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
791 * i386-tbl.h: Re-generate.
793 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
795 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
796 * i386-init.h: Updated.
798 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
800 * i386-gen.c (cpu_flags): Add CpuXsave.
802 * i386-opc.h (CpuXsave): New.
804 (i386_cpu_flags): Add cpuxsave.
806 * i386-dis.c (MOD_0FAE_REG_4): New.
807 (RM_0F01_REG_2): Likewise.
808 (MOD_0FAE_REG_5): Updated.
809 (RM_0F01_REG_3): Likewise.
810 (reg_table): Use MOD_0FAE_REG_4.
811 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
813 (rm_table): Add RM_0F01_REG_2.
815 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
816 * i386-init.h: Regenerated.
817 * i386-tbl.h: Likewise.
819 2008-02-11 Jan Beulich <jbeulich@novell.com>
821 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
822 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
823 * i386-tbl.h: Re-generate.
825 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
828 * configure: Regenerated.
830 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
832 * mips-dis.c: Update copyright.
833 (mips_arch_choices): Add Octeon.
834 * mips-opc.c: Update copyright.
836 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
838 2008-01-29 Alan Modra <amodra@bigpond.net.au>
840 * ppc-opc.c: Support optional L form mtmsr.
842 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
844 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
846 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
848 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
849 * i386-init.h: Regenerated.
851 2008-01-23 Tristan Gingold <gingold@adacore.com>
853 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
854 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
856 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
858 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
859 (cpu_flags): Likewise.
861 * i386-opc.h (CpuMMX2): Removed.
864 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
865 * i386-init.h: Regenerated.
866 * i386-tbl.h: Likewise.
868 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
870 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
872 * i386-init.h: Regenerated.
874 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
876 * i386-opc.tbl: Use Qword on movddup.
877 * i386-tbl.h: Regenerated.
879 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
881 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
882 * i386-tbl.h: Regenerated.
884 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
886 * i386-dis.c (Mx): New.
887 (PREFIX_0FC3): Likewise.
888 (PREFIX_0FC7_REG_6): Updated.
889 (dis386_twobyte): Use PREFIX_0FC3.
890 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
891 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
894 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
896 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
897 (operand_types): Add Mem.
899 * i386-opc.h (IntelSyntax): New.
900 * i386-opc.h (Mem): New.
902 (Opcode_Modifier_Max): Updated.
903 (i386_opcode_modifier): Add intelsyntax.
904 (i386_operand_type): Add mem.
906 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
909 * i386-reg.tbl: Add size for accumulator.
911 * i386-init.h: Regenerated.
912 * i386-tbl.h: Likewise.
914 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
916 * i386-opc.h (Byte): Fix a typo.
918 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
921 * i386-gen.c (operand_type_init): Add Dword to
922 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
923 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
925 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
926 Xmmword, Unspecified and Anysize.
927 (set_bitfield): Make Mmword an alias of Qword. Make Oword
930 * i386-opc.h (CheckSize): Removed.
938 (i386_opcode_modifier): Remove checksize, byte, word, dword,
942 (Unspecified): Likewise.
944 (i386_operand_type): Add byte, word, dword, fword, qword,
945 tbyte xmmword, unspecified and anysize.
947 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
948 Tbyte, Xmmword, Unspecified and Anysize.
950 * i386-reg.tbl: Add size for accumulator.
952 * i386-init.h: Regenerated.
953 * i386-tbl.h: Likewise.
955 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
957 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
959 (reg_table): Updated.
960 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
961 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
963 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
965 * i386-gen.c (set_bitfield): Use fail () on error.
967 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
969 * i386-gen.c (lineno): New.
970 (filename): Likewise.
971 (set_bitfield): Report filename and line numer on error.
972 (process_i386_opcodes): Set filename and update lineno.
973 (process_i386_registers): Likewise.
975 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
977 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
980 * i386-opc.h (IntelMnemonic): Renamed to ..
982 (Opcode_Modifier_Max): Updated.
983 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
986 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
987 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
988 * i386-tbl.h: Regenerated.
990 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
992 * i386-gen.c: Update copyright to 2008.
993 * i386-opc.h: Likewise.
994 * i386-opc.tbl: Likewise.
996 * i386-init.h: Regenerated.
997 * i386-tbl.h: Likewise.
999 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1001 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1002 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1003 * i386-tbl.h: Regenerated.
1005 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1007 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1009 (cpu_flags): Likewise.
1011 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1012 (CpuSSE4_2_Or_ABM): Likewise.
1014 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1016 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1017 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1018 and CpuPadLock, respectively.
1019 * i386-init.h: Regenerated.
1020 * i386-tbl.h: Likewise.
1022 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1024 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1026 * i386-opc.h (No_xSuf): Removed.
1027 (CheckSize): Updated.
1029 * i386-tbl.h: Regenerated.
1031 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1033 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1034 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1036 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1038 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1040 (i386_cpu_flags): Add cpusse4_2_or_abm.
1042 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1043 CpuABM|CpuSSE4_2 on popcnt.
1044 * i386-init.h: Regenerated.
1045 * i386-tbl.h: Likewise.
1047 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1049 * i386-opc.h: Update comments.
1051 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1053 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1054 * i386-opc.h: Likewise.
1055 * i386-opc.tbl: Likewise.
1057 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1060 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1061 Byte, Word, Dword, QWord and Xmmword.
1063 * i386-opc.h (No_xSuf): New.
1064 (CheckSize): Likewise.
1069 (Xmmword): Likewise.
1071 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1072 Dword, QWord and Xmmword.
1074 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1076 * i386-tbl.h: Regenerated.
1078 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1080 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1083 For older changes see ChangeLog-2007
1089 version-control: never